[deliverable/linux.git] / arch / m32r / kernel / setup.c

/*
 *  linux/arch/m32r/kernel/setup.c
 *
 *  Setup routines for Renesas M32R
 *
 *  Copyright (c) 2001, 2002  Hiroyuki Kondo, Hirokazu Takata,
 *                            Hitoshi Yamamoto
 */

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/fs.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/console.h>
#include <linux/initrd.h>
#include <linux/major.h>
#include <linux/root_dev.h>
#include <linux/seq_file.h>
#include <linux/timex.h>
#include <linux/screen_info.h>
#include <linux/cpu.h>
#include <linux/nodemask.h>
#include <linux/pfn.h>

#include <asm/processor.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/m32r.h>
#include <asm/setup.h>
#include <asm/sections.h>

#ifdef CONFIG_MMU
extern void init_mmu(void);
#endif

extern char _end[];

/*
 * Machine setup..
 */
struct cpuinfo_m32r boot_cpu_data;

#ifdef CONFIG_BLK_DEV_RAM
extern int rd_doload;	/* 1 = load ramdisk, 0 = don't load */
extern int rd_prompt;	/* 1 = prompt for ramdisk, 0 = don't prompt */
extern int rd_image_start;	/* starting block # of image */
#endif

#if defined(CONFIG_VGA_CONSOLE)
struct screen_info screen_info = {
	.orig_video_lines      = 25,
	.orig_video_cols       = 80,
	.orig_video_mode       = 0,
	.orig_video_ega_bx     = 0,
	.orig_video_isVGA      = 1,
	.orig_video_points     = 8
};
#endif

extern int root_mountflags;

static char command_line[COMMAND_LINE_SIZE];

static struct resource data_resource = {
	.name   = "Kernel data",
	.start  = 0,
	.end    = 0,
	.flags  = IORESOURCE_BUSY | IORESOURCE_MEM
};

static struct resource code_resource = {
	.name   = "Kernel code",
	.start  = 0,
	.end    = 0,
	.flags  = IORESOURCE_BUSY | IORESOURCE_MEM
};

unsigned long memory_start;
unsigned long memory_end;

void __init setup_arch(char **);
int get_cpuinfo(char *);

static __inline__ void parse_mem_cmdline(char ** cmdline_p)
{
	char c = ' ';
	char *to = command_line;
	char *from = COMMAND_LINE;
	int len = 0;
	int usermem = 0;

	/* Save unparsed command line copy for /proc/cmdline */
	memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
	saved_command_line[COMMAND_LINE_SIZE-1] = '\0';

	memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET;
	memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE;

	for ( ; ; ) {
		if (c == ' ' && !memcmp(from, "mem=", 4)) {
			if (to != command_line)
				to--;

			{
				unsigned long mem_size;

				usermem = 1;
				mem_size = memparse(from+4, &from);
				memory_end = memory_start + mem_size;
			}
		}
		c = *(from++);
		if (!c)
			break;

		if (COMMAND_LINE_SIZE <= ++len)
			break;

		*(to++) = c;
	}
	*to = '\0';
	*cmdline_p = command_line;
	if (usermem)
		printk(KERN_INFO "user-defined physical RAM map:\n");
}

#ifndef CONFIG_DISCONTIGMEM
static unsigned long __init setup_memory(void)
{
	unsigned long start_pfn, max_low_pfn, bootmap_size;

	start_pfn = PFN_UP( __pa(_end) );
	max_low_pfn = PFN_DOWN( __pa(memory_end) );

	/*
	 * Initialize the boot-time allocator (with low memory only):
	 */
	bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
		CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn);

	/*
	 * Register fully available low RAM pages with the bootmem allocator.
	 */
	{
		unsigned long curr_pfn;
		unsigned long last_pfn;
		unsigned long pages;

		/*
		 * We are rounding up the start address of usable memory:
		 */
		curr_pfn = PFN_UP(__pa(memory_start));

		/*
		 * ... and at the end of the usable range downwards:
		 */
		last_pfn = PFN_DOWN(__pa(memory_end));

		if (last_pfn > max_low_pfn)
			last_pfn = max_low_pfn;

		pages = last_pfn - curr_pfn;
		free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages));
	}

	/*
	 * Reserve the kernel text and
	 * Reserve the bootmem bitmap. We do this in two steps (first step
	 * was init_bootmem()), because this catches the (definitely buggy)
	 * case of us accidentally initializing the bootmem allocator with
	 * an invalid RAM area.
	 */
	reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE,
		(PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1)
		- CONFIG_MEMORY_START);

	/*
	 * reserve physical page 0 - it's a special BIOS page on many boxes,
	 * enabling clean reboots, SMP operation, laptop functions.
	 */
	reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE);

	/*
	 * reserve memory hole
	 */
#ifdef CONFIG_MEMHOLE
	reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE);
#endif

#ifdef CONFIG_BLK_DEV_INITRD
	if (LOADER_TYPE && INITRD_START) {
		if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
			reserve_bootmem(INITRD_START, INITRD_SIZE);
			initrd_start = INITRD_START ?
				INITRD_START + PAGE_OFFSET : 0;

			initrd_end = initrd_start + INITRD_SIZE;
			printk("initrd:start[%08lx],size[%08lx]\n",
				initrd_start, INITRD_SIZE);
		} else {
			printk("initrd extends beyond end of memory "
				"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
				INITRD_START + INITRD_SIZE,
				max_low_pfn << PAGE_SHIFT);

			initrd_start = 0;
		}
	}
#endif

	return max_low_pfn;
}
#else	/* CONFIG_DISCONTIGMEM */
extern unsigned long setup_memory(void);
#endif	/* CONFIG_DISCONTIGMEM */

void __init setup_arch(char **cmdline_p)
{
	ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);

	boot_cpu_data.cpu_clock = M32R_CPUCLK;
	boot_cpu_data.bus_clock = M32R_BUSCLK;
	boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE;

#ifdef CONFIG_BLK_DEV_RAM
	rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
	rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
	rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
#endif

	if (!MOUNT_ROOT_RDONLY)
		root_mountflags &= ~MS_RDONLY;

#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
	conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif
#endif

#ifdef CONFIG_DISCONTIGMEM
	nodes_clear(node_online_map);
	node_set_online(0);
	node_set_online(1);
#endif	/* CONFIG_DISCONTIGMEM */

	init_mm.start_code = (unsigned long) _text;
	init_mm.end_code = (unsigned long) _etext;
	init_mm.end_data = (unsigned long) _edata;
	init_mm.brk = (unsigned long) _end;

	code_resource.start = virt_to_phys(_text);
	code_resource.end = virt_to_phys(_etext)-1;
	data_resource.start = virt_to_phys(_etext);
	data_resource.end = virt_to_phys(_edata)-1;

	parse_mem_cmdline(cmdline_p);

	setup_memory();

	paging_init();
}

static struct cpu cpu_devices[NR_CPUS];

static int __init topology_init(void)
{
	int i;

	for_each_present_cpu(i)
		register_cpu(&cpu_devices[i], i);

	return 0;
}

subsys_initcall(topology_init);

#ifdef CONFIG_PROC_FS
/*
 *	Get CPU information for use by the procfs.
 */
static int show_cpuinfo(struct seq_file *m, void *v)
{
	struct cpuinfo_m32r *c = v;
	unsigned long cpu = c - cpu_data;

#ifdef CONFIG_SMP
	if (!cpu_online(cpu))
		return 0;
#endif	/* CONFIG_SMP */

	seq_printf(m, "processor\t: %ld\n", cpu);

#if defined(CONFIG_CHIP_VDEC2)
	seq_printf(m, "cpu family\t: VDEC2\n"
		"cache size\t: Unknown\n");
#elif defined(CONFIG_CHIP_M32700)
	seq_printf(m,"cpu family\t: M32700\n"
		"cache size\t: I-8KB/D-8KB\n");
#elif defined(CONFIG_CHIP_M32102)
	seq_printf(m,"cpu family\t: M32102\n"
		"cache size\t: I-8KB\n");
#elif defined(CONFIG_CHIP_OPSP)
	seq_printf(m,"cpu family\t: OPSP\n"
		"cache size\t: I-8KB/D-8KB\n");
#elif defined(CONFIG_CHIP_MP)
	seq_printf(m, "cpu family\t: M32R-MP\n"
		"cache size\t: I-xxKB/D-xxKB\n");
#elif  defined(CONFIG_CHIP_M32104)
	seq_printf(m,"cpu family\t: M32104\n"
		"cache size\t: I-8KB/D-8KB\n");
#else
	seq_printf(m, "cpu family\t: Unknown\n");
#endif
	seq_printf(m, "bogomips\t: %lu.%02lu\n",
		c->loops_per_jiffy/(500000/HZ),
		(c->loops_per_jiffy/(5000/HZ)) % 100);
#if defined(CONFIG_PLAT_MAPPI)
	seq_printf(m, "Machine\t\t: Mappi Evaluation board\n");
#elif defined(CONFIG_PLAT_MAPPI2)
	seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n");
#elif defined(CONFIG_PLAT_MAPPI3)
	seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n");
#elif defined(CONFIG_PLAT_M32700UT)
	seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n");
#elif defined(CONFIG_PLAT_OPSPUT)
	seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n");
#elif defined(CONFIG_PLAT_USRV)
	seq_printf(m, "Machine\t\t: uServer\n");
#elif defined(CONFIG_PLAT_OAKS32R)
	seq_printf(m, "Machine\t\t: OAKS32R\n");
#elif  defined(CONFIG_PLAT_M32104UT)
	seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n");
#else
	seq_printf(m, "Machine\t\t: Unknown\n");
#endif

#define PRINT_CLOCK(name, value)				\
	seq_printf(m, name " clock\t: %d.%02dMHz\n",		\
		((value) / 1000000), ((value) % 1000000)/10000)

	PRINT_CLOCK("CPU", (int)c->cpu_clock);
	PRINT_CLOCK("Bus", (int)c->bus_clock);

	seq_printf(m, "\n");

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	return *pos < NR_CPUS ? cpu_data + *pos : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

struct seq_operations cpuinfo_op = {
	.start = c_start,
	.next = c_next,
	.stop = c_stop,
	.show = show_cpuinfo,
};
#endif	/* CONFIG_PROC_FS */

unsigned long cpu_initialized __initdata = 0;

/*
 * cpu_init() initializes state that is per-CPU. Some data is already
 * initialized (naturally) in the bootstrap process.
 * We reload them nevertheless, this function acts as a
 * 'CPU state barrier', nothing should get across.
 */
#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2)	\
	|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
	|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
void __init cpu_init (void)
{
	int cpu_id = smp_processor_id();

	if (test_and_set_bit(cpu_id, &cpu_initialized)) {
		printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
		for ( ; ; )
			local_irq_enable();
	}
	printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);

	/* Set up and load the per-CPU TSS and LDT */
	atomic_inc(&init_mm.mm_count);
	current->active_mm = &init_mm;
	if (current->mm)
		BUG();

	/* Force FPU initialization */
	current_thread_info()->status = 0;
	clear_used_math();

#ifdef CONFIG_MMU
	/* Set up MMU */
	init_mmu();
#endif

	/* Set up ICUIMASK */
	outl(0x00070000, M32R_ICU_IMASK_PORTL);		/* imask=111 */
}
#endif	/* defined(CONFIG_CHIP_VDEC2) ... */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/m32r/kernel/setup.c
	3	*
	4	* Setup routines for Renesas M32R
	5	*
	6	* Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
	7	* Hitoshi Yamamoto
	8	*/
	9
1da177e4	10	#include <linux/init.h>
7c1c4e54	11	#include <linux/kernel.h>
1da177e4 LT	12	#include <linux/stddef.h>
	13	#include <linux/fs.h>
	14	#include <linux/sched.h>
	15	#include <linux/ioport.h>
	16	#include <linux/mm.h>
	17	#include <linux/bootmem.h>
	18	#include <linux/console.h>
	19	#include <linux/initrd.h>
	20	#include <linux/major.h>
	21	#include <linux/root_dev.h>
	22	#include <linux/seq_file.h>
	23	#include <linux/timex.h>
894673ee	24	#include <linux/screen_info.h>
1da177e4 LT	25	#include <linux/cpu.h>
1da177e4 LT	26	#include <linux/nodemask.h>
22a9835c	27	#include <linux/pfn.h>
1da177e4 LT	28
	29	#include <asm/processor.h>
	30	#include <asm/pgtable.h>
	31	#include <asm/io.h>
	32	#include <asm/mmu_context.h>
	33	#include <asm/m32r.h>
	34	#include <asm/setup.h>
	35	#include <asm/sections.h>
	36
	37	#ifdef CONFIG_MMU
	38	extern void init_mmu(void);
	39	#endif
	40
1da177e4 LT	41	extern char _end[];
	42
	43	/*
	44	* Machine setup..
	45	*/
	46	struct cpuinfo_m32r boot_cpu_data;
	47
	48	#ifdef CONFIG_BLK_DEV_RAM
	49	extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */
	50	extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */
	51	extern int rd_image_start; /* starting block # of image */
	52	#endif
	53
	54	#if defined(CONFIG_VGA_CONSOLE)
	55	struct screen_info screen_info = {
	56	.orig_video_lines = 25,
	57	.orig_video_cols = 80,
	58	.orig_video_mode = 0,
	59	.orig_video_ega_bx = 0,
	60	.orig_video_isVGA = 1,
	61	.orig_video_points = 8
	62	};
	63	#endif
	64
	65	extern int root_mountflags;
	66
	67	static char command_line[COMMAND_LINE_SIZE];
	68
	69	static struct resource data_resource = {
	70	.name = "Kernel data",
	71	.start = 0,
	72	.end = 0,
	73	.flags = IORESOURCE_BUSY \| IORESOURCE_MEM
	74	};
	75
	76	static struct resource code_resource = {
	77	.name = "Kernel code",
	78	.start = 0,
	79	.end = 0,
	80	.flags = IORESOURCE_BUSY \| IORESOURCE_MEM
	81	};
	82
	83	unsigned long memory_start;
	84	unsigned long memory_end;
	85
	86	void __init setup_arch(char **);
	87	int get_cpuinfo(char *);
	88
	89	static __inline__ void parse_mem_cmdline(char ** cmdline_p)
	90	{
	91	char c = ' ';
	92	char *to = command_line;
	93	char *from = COMMAND_LINE;
	94	int len = 0;
	95	int usermem = 0;
	96
	97	/* Save unparsed command line copy for /proc/cmdline */
	98	memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
	99	saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
	100
	101	memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET;
	102	memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE;
	103
	104	for ( ; ; ) {
105	if (c == ' ' && !memcmp(from, "mem=", 4)) {
106	if (to != command_line)
107	to--;
108
109	{
110	unsigned long mem_size;
111
112	usermem = 1;
113	mem_size = memparse(from+4, &from);
114	memory_end = memory_start + mem_size;
115	}
116	}
117	c = *(from++);
118	if (!c)
119	break;
120
121	if (COMMAND_LINE_SIZE <= ++len)
122	break;
123
124	*(to++) = c;
125	}
126	*to = '\0';
127	*cmdline_p = command_line;
128	if (usermem)
129	printk(KERN_INFO "user-defined physical RAM map:\n");
130	}
131
132	#ifndef CONFIG_DISCONTIGMEM
133	static unsigned long __init setup_memory(void)
134	{
135	unsigned long start_pfn, max_low_pfn, bootmap_size;
136
137	start_pfn = PFN_UP( __pa(_end) );
138	max_low_pfn = PFN_DOWN( __pa(memory_end) );
139
140	/*
141	* Initialize the boot-time allocator (with low memory only):
142	*/
143	bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
144	CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn);
145
146	/*
147	* Register fully available low RAM pages with the bootmem allocator.
148	*/
149	{
150	unsigned long curr_pfn;
151	unsigned long last_pfn;
152	unsigned long pages;
153
154	/*
155	* We are rounding up the start address of usable memory:
156	*/
157	curr_pfn = PFN_UP(__pa(memory_start));
158
159	/*
160	* ... and at the end of the usable range downwards:
161	*/
162	last_pfn = PFN_DOWN(__pa(memory_end));
163
164	if (last_pfn > max_low_pfn)
165	last_pfn = max_low_pfn;
166
167	pages = last_pfn - curr_pfn;
168	free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages));
169	}
170
171	/*
172	* Reserve the kernel text and
173	* Reserve the bootmem bitmap. We do this in two steps (first step
174	* was init_bootmem()), because this catches the (definitely buggy)
175	* case of us accidentally initializing the bootmem allocator with
176	* an invalid RAM area.
177	*/
178	reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE,
179	(PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1)
180	- CONFIG_MEMORY_START);
181
182	/*
183	* reserve physical page 0 - it's a special BIOS page on many boxes,
184	* enabling clean reboots, SMP operation, laptop functions.
185	*/
186	reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE);
187
188	/*
189	* reserve memory hole
190	*/
191	#ifdef CONFIG_MEMHOLE
192	reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE);
193	#endif
194
195	#ifdef CONFIG_BLK_DEV_INITRD
196	if (LOADER_TYPE && INITRD_START) {
197	if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
198	reserve_bootmem(INITRD_START, INITRD_SIZE);
199	initrd_start = INITRD_START ?
200	INITRD_START + PAGE_OFFSET : 0;
201
202	initrd_end = initrd_start + INITRD_SIZE;
203	printk("initrd:start[%08lx],size[%08lx]\n",
204	initrd_start, INITRD_SIZE);
205	} else {
206	printk("initrd extends beyond end of memory "
207	"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
208	INITRD_START + INITRD_SIZE,
209	max_low_pfn << PAGE_SHIFT);
210
211	initrd_start = 0;
212	}
213	}
214	#endif
215
216	return max_low_pfn;
217	}
218	#else /* CONFIG_DISCONTIGMEM */
219	extern unsigned long setup_memory(void);
220	#endif /* CONFIG_DISCONTIGMEM */
221
1da177e4 LT	222	void __init setup_arch(char **cmdline_p)
	223	{
	224	ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
	225
	226	boot_cpu_data.cpu_clock = M32R_CPUCLK;
	227	boot_cpu_data.bus_clock = M32R_BUSCLK;
	228	boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE;
	229
	230	#ifdef CONFIG_BLK_DEV_RAM
	231	rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
	232	rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
	233	rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
	234	#endif
	235
	236	if (!MOUNT_ROOT_RDONLY)
	237	root_mountflags &= ~MS_RDONLY;
	238
	239	#ifdef CONFIG_VT
	240	#if defined(CONFIG_VGA_CONSOLE)
	241	conswitchp = &vga_con;
	242	#elif defined(CONFIG_DUMMY_CONSOLE)
	243	conswitchp = &dummy_con;
	244	#endif
	245	#endif
	246
	247	#ifdef CONFIG_DISCONTIGMEM
	248	nodes_clear(node_online_map);
	249	node_set_online(0);
	250	node_set_online(1);
	251	#endif /* CONFIG_DISCONTIGMEM */
	252
	253	init_mm.start_code = (unsigned long) _text;
	254	init_mm.end_code = (unsigned long) _etext;
	255	init_mm.end_data = (unsigned long) _edata;
	256	init_mm.brk = (unsigned long) _end;
	257
	258	code_resource.start = virt_to_phys(_text);
	259	code_resource.end = virt_to_phys(_etext)-1;
	260	data_resource.start = virt_to_phys(_etext);
	261	data_resource.end = virt_to_phys(_edata)-1;
	262
	263	parse_mem_cmdline(cmdline_p);
	264
	265	setup_memory();
	266
	267	paging_init();
	268	}
	269
7c1c4e54	270	static struct cpu cpu_devices[NR_CPUS];
1da177e4 LT	271
	272	static int __init topology_init(void)
	273	{
7c1c4e54	274	int i;
1da177e4	275
7c1c4e54	276	for_each_present_cpu(i)
76b67ed9	277	register_cpu(&cpu_devices[i], i);
1da177e4 LT	278
	279	return 0;
	280	}
	281
	282	subsys_initcall(topology_init);
	283
	284	#ifdef CONFIG_PROC_FS
	285	/*
	286	* Get CPU information for use by the procfs.
	287	*/
	288	static int show_cpuinfo(struct seq_file m, void v)
	289	{
	290	struct cpuinfo_m32r *c = v;
	291	unsigned long cpu = c - cpu_data;
	292
	293	#ifdef CONFIG_SMP
	294	if (!cpu_online(cpu))
	295	return 0;
	296	#endif /* CONFIG_SMP */
	297
	298	seq_printf(m, "processor\t: %ld\n", cpu);
	299
c978b017	300	#if defined(CONFIG_CHIP_VDEC2)
1da177e4 LT	301	seq_printf(m, "cpu family\t: VDEC2\n"
1da177e4 LT	302	"cache size\t: Unknown\n");
c978b017	303	#elif defined(CONFIG_CHIP_M32700)
1da177e4 LT	304	seq_printf(m,"cpu family\t: M32700\n"
1da177e4 LT	305	"cache size\t: I-8KB/D-8KB\n");
c978b017	306	#elif defined(CONFIG_CHIP_M32102)
1da177e4 LT	307	seq_printf(m,"cpu family\t: M32102\n"
1da177e4 LT	308	"cache size\t: I-8KB\n");
c978b017	309	#elif defined(CONFIG_CHIP_OPSP)
1da177e4 LT	310	seq_printf(m,"cpu family\t: OPSP\n"
1da177e4 LT	311	"cache size\t: I-8KB/D-8KB\n");
c978b017	312	#elif defined(CONFIG_CHIP_MP)
1da177e4 LT	313	seq_printf(m, "cpu family\t: M32R-MP\n"
1da177e4 LT	314	"cache size\t: I-xxKB/D-xxKB\n");
9287d95e HT	315	#elif defined(CONFIG_CHIP_M32104)
	316	seq_printf(m,"cpu family\t: M32104\n"
	317	"cache size\t: I-8KB/D-8KB\n");
1da177e4 LT	318	#else
	319	seq_printf(m, "cpu family\t: Unknown\n");
	320	#endif
	321	seq_printf(m, "bogomips\t: %lu.%02lu\n",
	322	c->loops_per_jiffy/(500000/HZ),
	323	(c->loops_per_jiffy/(5000/HZ)) % 100);
c978b017	324	#if defined(CONFIG_PLAT_MAPPI)
1da177e4	325	seq_printf(m, "Machine\t\t: Mappi Evaluation board\n");
c978b017	326	#elif defined(CONFIG_PLAT_MAPPI2)
1da177e4	327	seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n");
c978b017	328	#elif defined(CONFIG_PLAT_MAPPI3)
23680863	329	seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n");
c978b017	330	#elif defined(CONFIG_PLAT_M32700UT)
1da177e4	331	seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n");
c978b017	332	#elif defined(CONFIG_PLAT_OPSPUT)
1da177e4	333	seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n");
c978b017	334	#elif defined(CONFIG_PLAT_USRV)
1da177e4	335	seq_printf(m, "Machine\t\t: uServer\n");
c978b017	336	#elif defined(CONFIG_PLAT_OAKS32R)
1da177e4	337	seq_printf(m, "Machine\t\t: OAKS32R\n");
9287d95e HT	338	#elif defined(CONFIG_PLAT_M32104UT)
9287d95e HT	339	seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n");
1da177e4 LT	340	#else
	341	seq_printf(m, "Machine\t\t: Unknown\n");
	342	#endif
	343
	344	#define PRINT_CLOCK(name, value) \
	345	seq_printf(m, name " clock\t: %d.%02dMHz\n", \
	346	((value) / 1000000), ((value) % 1000000)/10000)
	347
	348	PRINT_CLOCK("CPU", (int)c->cpu_clock);
	349	PRINT_CLOCK("Bus", (int)c->bus_clock);
	350
	351	seq_printf(m, "\n");
	352
	353	return 0;
	354	}
	355
	356	static void c_start(struct seq_file m, loff_t *pos)
	357	{
	358	return pos < NR_CPUS ? cpu_data + pos : NULL;
	359	}
	360
	361	static void c_next(struct seq_file m, void v, loff_t pos)
	362	{
	363	++*pos;
	364	return c_start(m, pos);
	365	}
	366
	367	static void c_stop(struct seq_file m, void v)
	368	{
	369	}
	370
	371	struct seq_operations cpuinfo_op = {
7857a7f5 AV	372	.start = c_start,
	373	.next = c_next,
	374	.stop = c_stop,
	375	.show = show_cpuinfo,
1da177e4 LT	376	};
	377	#endif /* CONFIG_PROC_FS */
	378
	379	unsigned long cpu_initialized __initdata = 0;
	380
	381	/*
	382	* cpu_init() initializes state that is per-CPU. Some data is already
	383	* initialized (naturally) in the bootstrap process.
	384	* We reload them nevertheless, this function acts as a
	385	* 'CPU state barrier', nothing should get across.
	386	*/
	387	#if defined(CONFIG_CHIP_VDEC2) \|\| defined(CONFIG_CHIP_XNUX2) \
	388	\|\| defined(CONFIG_CHIP_M32700) \|\| defined(CONFIG_CHIP_M32102) \
9287d95e	389	\|\| defined(CONFIG_CHIP_OPSP) \|\| defined(CONFIG_CHIP_M32104)
1da177e4 LT	390	void __init cpu_init (void)
	391	{
	392	int cpu_id = smp_processor_id();
	393
	394	if (test_and_set_bit(cpu_id, &cpu_initialized)) {
	395	printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
	396	for ( ; ; )
	397	local_irq_enable();
	398	}
	399	printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
	400
	401	/* Set up and load the per-CPU TSS and LDT */
	402	atomic_inc(&init_mm.mm_count);
	403	current->active_mm = &init_mm;
	404	if (current->mm)
	405	BUG();
	406
	407	/* Force FPU initialization */
	408	current_thread_info()->status = 0;
	409	clear_used_math();
	410
	411	#ifdef CONFIG_MMU
	412	/* Set up MMU */
	413	init_mmu();
	414	#endif
	415
	416	/* Set up ICUIMASK */
	417	outl(0x00070000, M32R_ICU_IMASK_PORTL); /* imask=111 */
	418	}
	419	#endif /* defined(CONFIG_CHIP_VDEC2) ... */