Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / arch / m68k / 68360 / config.c
CommitLineData
1da177e4 1/*
6f4a8856 2 * config.c - non-mmu 68360 platform initialization code
1da177e4
LT
3 *
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 * Copyright (C) 1993 Hamish Macdonald
6 * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <stdarg.h>
df592eb5 14#include <linux/init.h>
1da177e4
LT
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
b032fde9 18#include <linux/interrupt.h>
aa1f1d10 19#include <linux/irq.h>
1da177e4
LT
20
21#include <asm/setup.h>
1da177e4 22#include <asm/pgtable.h>
1da177e4
LT
23#include <asm/machdep.h>
24#include <asm/m68360.h>
25
26#ifdef CONFIG_UCQUICC
27#include <asm/bootstd.h>
28#endif
29
30extern void m360_cpm_reset(void);
31
32// Mask to select if the PLL prescaler is enabled.
33#define MCU_PREEN ((unsigned short)(0x0001 << 13))
34
35#if defined(CONFIG_UCQUICC)
36#define OSCILLATOR (unsigned long int)33000000
37#endif
38
1b461d76 39static irq_handler_t timer_interrupt;
1da177e4
LT
40unsigned long int system_clock;
41
1da177e4
LT
42extern QUICC *pquicc;
43
44/* TODO DON"T Hard Code this */
45/* calculate properly using the right PLL and prescaller */
46// unsigned int system_clock = 33000000l;
47extern unsigned long int system_clock; //In kernel setup.c
48
7e6a3d40
GU
49
50static irqreturn_t hw_tick(int irq, void *dummy)
51{
52 /* Reset Timer1 */
53 /* TSTAT &= 0; */
54
55 pquicc->timer_ter1 = 0x0002; /* clear timer event */
56
1b461d76 57 return timer_interrupt(irq, dummy);
7e6a3d40 58}
1da177e4 59
aa1f1d10 60static struct irqaction m68360_timer_irq = {
7e6a3d40 61 .name = "timer",
77a42796 62 .flags = IRQF_TIMER,
7e6a3d40 63 .handler = hw_tick,
aa1f1d10
GU
64};
65
1b461d76 66void hw_timer_init(irq_handler_t handler)
1da177e4
LT
67{
68 unsigned char prescaler;
69 unsigned short tgcr_save;
1da177e4
LT
70
71#if 0
72 /* Restart mode, Enable int, 32KHz, Enable timer */
73 TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
74 /* Set prescaler (Divide 32KHz by 32)*/
75 TPRER = 31;
76 /* Set compare register 32Khz / 32 / 10 = 100 */
77 TCMP = 10;
78
4531dab4 79 request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL);
1da177e4
LT
80#endif
81
82 /* General purpose quicc timers: MC68360UM p7-20 */
83
84 /* Set up timer 1 (in [1..4]) to do 100Hz */
85 tgcr_save = pquicc->timer_tgcr & 0xfff0;
86 pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */
87 /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
88
89 prescaler = 8;
90 pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
91 (unsigned short)((prescaler - 1) << 8);
92
93 pquicc->timer_tcn1 = 0x0000; /* initial count */
94 /* calculate interval for 100Hz based on the _system_clock: */
95 pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
96
97 pquicc->timer_ter1 = 0x0003; /* clear timer events */
98
1b461d76
GU
99 timer_interrupt = handler;
100
1da177e4 101 /* enable timer 1 interrupt in CIMR */
aa1f1d10 102 setup_irq(CPMVEC_TIMER1, &m68360_timer_irq);
1da177e4
LT
103
104 /* Start timer 1: */
105 tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
106 pquicc->timer_tgcr = tgcr_save;
107}
108
1da177e4
LT
109void BSP_reset (void)
110{
111 local_irq_disable();
bda65838
GU
112 asm volatile (
113 "moveal #_start, %a0;\n"
114 "moveb #0, 0xFFFFF300;\n"
115 "moveal 0(%a0), %sp;\n"
116 "moveal 4(%a0), %a0;\n"
117 "jmp (%a0);\n"
118 );
1da177e4
LT
119}
120
121unsigned char *scc1_hwaddr;
122static int errno;
123
124#if defined (CONFIG_UCQUICC)
125_bsc0(char *, getserialnum)
126_bsc1(unsigned char *, gethwaddr, int, a)
127_bsc1(char *, getbenv, char *, a)
128#endif
129
130
df592eb5 131void __init config_BSP(char *command, int len)
1da177e4
LT
132{
133 unsigned char *p;
134
135 m360_cpm_reset();
136
137 /* Calculate the real system clock value. */
138 {
139 unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
140 if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
141 {
142 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
143 system_clock = (OSCILLATOR / 128) * (mf + 1);
144 }
145 else
146 {
147 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
148 system_clock = (OSCILLATOR) * (mf + 1);
149 }
150 }
151
152 printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
153
154#if defined(CONFIG_UCQUICC) && 0
155 printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
156 p = scc1_hwaddr = gethwaddr(0);
157 printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
158 p[0], p[1], p[2], p[3], p[4], p[5]);
159
160 p = getbenv("APPEND");
161 if (p)
162 strcpy(p,command);
163 else
164 command[0] = 0;
165#else
166 scc1_hwaddr = "\00\01\02\03\04\05";
167#endif
168
95177461 169 mach_reset = BSP_reset;
1da177e4 170}
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