Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / arch / m68k / 68360 / ints.c
CommitLineData
1da177e4 1/*
6f4a8856 2 * ints.c - first level interrupt handlers
1da177e4
LT
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
9 * Copyright (c) 1996 Roman Zippel
10 * Copyright (c) 1999 D. Jeff Dionne <jeff@uclinux.org>
11 */
12
1da177e4
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13#include <linux/types.h>
14#include <linux/kernel.h>
2502b667
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15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
1da177e4 18#include <asm/traps.h>
1da177e4 19#include <asm/machdep.h>
1da177e4
LT
20#include <asm/m68360.h>
21
22/* from quicc/commproc.c: */
23extern QUICC *pquicc;
24extern void cpm_interrupt_init(void);
25
26#define INTERNAL_IRQS (96)
27
28/* assembler routines */
29asmlinkage void system_call(void);
30asmlinkage void buserr(void);
31asmlinkage void trap(void);
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32asmlinkage void bad_interrupt(void);
33asmlinkage void inthandler(void);
1da177e4 34
be497ddf 35static void intc_irq_unmask(struct irq_data *d)
0531d7b3 36{
be497ddf 37 pquicc->intr_cimr |= (1 << d->irq);
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38}
39
be497ddf 40static void intc_irq_mask(struct irq_data *d)
0531d7b3 41{
be497ddf 42 pquicc->intr_cimr &= ~(1 << d->irq);
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GU
43}
44
be497ddf 45static void intc_irq_ack(struct irq_data *d)
0531d7b3 46{
be497ddf 47 pquicc->intr_cisr = (1 << d->irq);
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48}
49
50static struct irq_chip intc_irq_chip = {
51 .name = "M68K-INTC",
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52 .irq_mask = intc_irq_mask,
53 .irq_unmask = intc_irq_unmask,
54 .irq_ack = intc_irq_ack,
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55};
56
1da177e4
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57/*
58 * This function should be called during kernel startup to initialize
2502b667 59 * the vector table.
1da177e4 60 */
622e9472 61void __init trap_init(void)
1da177e4 62{
1da177e4
LT
63 int vba = (CPM_VECTOR_BASE<<4);
64
65 /* set up the vectors */
66 _ramvec[2] = buserr;
67 _ramvec[3] = trap;
68 _ramvec[4] = trap;
69 _ramvec[5] = trap;
70 _ramvec[6] = trap;
71 _ramvec[7] = trap;
72 _ramvec[8] = trap;
73 _ramvec[9] = trap;
74 _ramvec[10] = trap;
75 _ramvec[11] = trap;
76 _ramvec[12] = trap;
77 _ramvec[13] = trap;
78 _ramvec[14] = trap;
79 _ramvec[15] = trap;
80
81 _ramvec[32] = system_call;
82 _ramvec[33] = trap;
83
1da177e4
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84 cpm_interrupt_init();
85
86 /* set up CICR for vector base address and irq level */
87 /* irl = 4, hp = 1f - see MC68360UM p 7-377 */
88 pquicc->intr_cicr = 0x00e49f00 | vba;
89
90 /* CPM interrupt vectors: (p 7-376) */
91 _ramvec[vba+CPMVEC_ERROR] = bad_interrupt; /* Error */
92 _ramvec[vba+CPMVEC_PIO_PC11] = inthandler; /* pio - pc11 */
93 _ramvec[vba+CPMVEC_PIO_PC10] = inthandler; /* pio - pc10 */
94 _ramvec[vba+CPMVEC_SMC2] = inthandler; /* smc2/pip */
95 _ramvec[vba+CPMVEC_SMC1] = inthandler; /* smc1 */
96 _ramvec[vba+CPMVEC_SPI] = inthandler; /* spi */
97 _ramvec[vba+CPMVEC_PIO_PC9] = inthandler; /* pio - pc9 */
98 _ramvec[vba+CPMVEC_TIMER4] = inthandler; /* timer 4 */
99 _ramvec[vba+CPMVEC_RESERVED1] = inthandler; /* reserved */
100 _ramvec[vba+CPMVEC_PIO_PC8] = inthandler; /* pio - pc8 */
101 _ramvec[vba+CPMVEC_PIO_PC7] = inthandler; /* pio - pc7 */
102 _ramvec[vba+CPMVEC_PIO_PC6] = inthandler; /* pio - pc6 */
103 _ramvec[vba+CPMVEC_TIMER3] = inthandler; /* timer 3 */
1da177e4
LT
104 _ramvec[vba+CPMVEC_PIO_PC5] = inthandler; /* pio - pc5 */
105 _ramvec[vba+CPMVEC_PIO_PC4] = inthandler; /* pio - pc4 */
106 _ramvec[vba+CPMVEC_RESERVED2] = inthandler; /* reserved */
107 _ramvec[vba+CPMVEC_RISCTIMER] = inthandler; /* timer table */
108 _ramvec[vba+CPMVEC_TIMER2] = inthandler; /* timer 2 */
109 _ramvec[vba+CPMVEC_RESERVED3] = inthandler; /* reserved */
110 _ramvec[vba+CPMVEC_IDMA2] = inthandler; /* idma 2 */
111 _ramvec[vba+CPMVEC_IDMA1] = inthandler; /* idma 1 */
112 _ramvec[vba+CPMVEC_SDMA_CB_ERR] = inthandler; /* sdma channel bus error */
113 _ramvec[vba+CPMVEC_PIO_PC3] = inthandler; /* pio - pc3 */
114 _ramvec[vba+CPMVEC_PIO_PC2] = inthandler; /* pio - pc2 */
115 /* _ramvec[vba+CPMVEC_TIMER1] = cpm_isr_timer1; */ /* timer 1 */
116 _ramvec[vba+CPMVEC_TIMER1] = inthandler; /* timer 1 */
117 _ramvec[vba+CPMVEC_PIO_PC1] = inthandler; /* pio - pc1 */
118 _ramvec[vba+CPMVEC_SCC4] = inthandler; /* scc 4 */
119 _ramvec[vba+CPMVEC_SCC3] = inthandler; /* scc 3 */
120 _ramvec[vba+CPMVEC_SCC2] = inthandler; /* scc 2 */
121 _ramvec[vba+CPMVEC_SCC1] = inthandler; /* scc 1 */
122 _ramvec[vba+CPMVEC_PIO_PC0] = inthandler; /* pio - pc0 */
123
124
125 /* turn off all CPM interrupts */
126 pquicc->intr_cimr = 0x00000000;
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GU
127}
128
129void init_IRQ(void)
130{
131 int i;
1da177e4 132
0531d7b3 133 for (i = 0; (i < NR_IRQS); i++) {
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134 irq_set_chip(i, &intc_irq_chip);
135 irq_set_handler(i, handle_level_irq);
0531d7b3 136 }
1da177e4
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137}
138
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