Commit | Line | Data |
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0e152d80 GU |
1 | comment "Processor Type" |
2 | ||
ad8f955d GU |
3 | choice |
4 | prompt "CPU family support" | |
5 | default M68KCLASSIC if MMU | |
6 | default COLDFIRE if !MMU | |
7 | help | |
8 | The Freescale (was Motorola) M68K family of processors implements | |
9 | the full 68000 processor instruction set. | |
10 | The Freescale ColdFire family of processors is a modern derivitive | |
11 | of the 68000 processor family. They are mainly targeted at embedded | |
12 | applications, and are all System-On-Chip (SOC) devices, as opposed | |
13 | to stand alone CPUs. They implement a subset of the original 68000 | |
14 | processor instruction set. | |
15 | If you anticipate running this kernel on a computer with a classic | |
16 | MC68xxx processor, select M68KCLASSIC. | |
17 | If you anticipate running this kernel on a computer with a ColdFire | |
18 | processor, select COLDFIRE. | |
19 | ||
20 | config M68KCLASSIC | |
21 | bool "Classic M68K CPU family support" | |
22 | ||
23 | config COLDFIRE | |
24 | bool "Coldfire CPU family support" | |
25 | select GENERIC_GPIO | |
26 | select ARCH_REQUIRE_GPIOLIB | |
27 | select CPU_HAS_NO_BITFIELDS | |
28 | select CPU_HAS_NO_MULDIV64 | |
29 | select GENERIC_CSUM | |
30 | ||
31 | endchoice | |
32 | ||
33 | if M68KCLASSIC | |
34 | ||
0e152d80 GU |
35 | config M68000 |
36 | bool | |
37 | select CPU_HAS_NO_BITFIELDS | |
84f3fb7a | 38 | select CPU_HAS_NO_MULDIV64 |
7f73bafc | 39 | select GENERIC_CSUM |
0e152d80 GU |
40 | help |
41 | The Freescale (was Motorola) 68000 CPU is the first generation of | |
42 | the well known M68K family of processors. The CPU core as well as | |
43 | being available as a stand alone CPU was also used in many | |
44 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain | |
45 | a paging MMU. | |
46 | ||
47 | config MCPU32 | |
48 | bool | |
49 | select CPU_HAS_NO_BITFIELDS | |
50 | help | |
51 | The Freescale (was then Motorola) CPU32 is a CPU core that is | |
52 | based on the 68020 processor. For the most part it is used in | |
53 | System-On-Chip parts, and does not contain a paging MMU. | |
54 | ||
0e152d80 GU |
55 | config M68020 |
56 | bool "68020 support" | |
57 | depends on MMU | |
5717a02b | 58 | select GENERIC_ATOMIC64 |
e08d703c | 59 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
60 | help |
61 | If you anticipate running this kernel on a computer with a MC68020 | |
62 | processor, say Y. Otherwise, say N. Note that the 68020 requires a | |
63 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the | |
64 | Sun 3, which provides its own version. | |
65 | ||
66 | config M68030 | |
67 | bool "68030 support" | |
68 | depends on MMU && !MMU_SUN3 | |
5717a02b | 69 | select GENERIC_ATOMIC64 |
e08d703c | 70 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
71 | help |
72 | If you anticipate running this kernel on a computer with a MC68030 | |
73 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not | |
74 | work, as it does not include an MMU (Memory Management Unit). | |
75 | ||
76 | config M68040 | |
77 | bool "68040 support" | |
78 | depends on MMU && !MMU_SUN3 | |
5717a02b | 79 | select GENERIC_ATOMIC64 |
e08d703c | 80 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
81 | help |
82 | If you anticipate running this kernel on a computer with a MC68LC040 | |
83 | or MC68040 processor, say Y. Otherwise, say N. Note that an | |
84 | MC68EC040 will not work, as it does not include an MMU (Memory | |
85 | Management Unit). | |
86 | ||
87 | config M68060 | |
88 | bool "68060 support" | |
89 | depends on MMU && !MMU_SUN3 | |
5717a02b | 90 | select GENERIC_ATOMIC64 |
e08d703c | 91 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
92 | help |
93 | If you anticipate running this kernel on a computer with a MC68060 | |
94 | processor, say Y. Otherwise, say N. | |
95 | ||
96 | config M68328 | |
97 | bool "MC68328" | |
98 | depends on !MMU | |
99 | select M68000 | |
100 | help | |
101 | Motorola 68328 processor support. | |
102 | ||
103 | config M68EZ328 | |
104 | bool "MC68EZ328" | |
105 | depends on !MMU | |
106 | select M68000 | |
107 | help | |
108 | Motorola 68EX328 processor support. | |
109 | ||
110 | config M68VZ328 | |
111 | bool "MC68VZ328" | |
112 | depends on !MMU | |
113 | select M68000 | |
114 | help | |
115 | Motorola 68VZ328 processor support. | |
116 | ||
117 | config M68360 | |
118 | bool "MC68360" | |
119 | depends on !MMU | |
120 | select MCPU32 | |
121 | help | |
122 | Motorola 68360 processor support. | |
123 | ||
ad8f955d GU |
124 | endif # M68KCLASSIC |
125 | ||
126 | if COLDFIRE | |
127 | ||
0e152d80 GU |
128 | config M5206 |
129 | bool "MCF5206" | |
130 | depends on !MMU | |
0e152d80 GU |
131 | select COLDFIRE_SW_A7 |
132 | select HAVE_MBAR | |
133 | help | |
134 | Motorola ColdFire 5206 processor support. | |
135 | ||
136 | config M5206e | |
137 | bool "MCF5206e" | |
138 | depends on !MMU | |
0e152d80 GU |
139 | select COLDFIRE_SW_A7 |
140 | select HAVE_MBAR | |
141 | help | |
142 | Motorola ColdFire 5206e processor support. | |
143 | ||
144 | config M520x | |
145 | bool "MCF520x" | |
146 | depends on !MMU | |
0e152d80 GU |
147 | select GENERIC_CLOCKEVENTS |
148 | select HAVE_CACHE_SPLIT | |
149 | help | |
150 | Freescale Coldfire 5207/5208 processor support. | |
151 | ||
152 | config M523x | |
153 | bool "MCF523x" | |
154 | depends on !MMU | |
0e152d80 GU |
155 | select GENERIC_CLOCKEVENTS |
156 | select HAVE_CACHE_SPLIT | |
157 | select HAVE_IPSBAR | |
158 | help | |
159 | Freescale Coldfire 5230/1/2/4/5 processor support | |
160 | ||
161 | config M5249 | |
162 | bool "MCF5249" | |
163 | depends on !MMU | |
0e152d80 GU |
164 | select COLDFIRE_SW_A7 |
165 | select HAVE_MBAR | |
166 | help | |
167 | Motorola ColdFire 5249 processor support. | |
168 | ||
169 | config M527x | |
170 | bool | |
171 | ||
172 | config M5271 | |
173 | bool "MCF5271" | |
174 | depends on !MMU | |
0e152d80 GU |
175 | select M527x |
176 | select HAVE_CACHE_SPLIT | |
177 | select HAVE_IPSBAR | |
178 | select GENERIC_CLOCKEVENTS | |
179 | help | |
180 | Freescale (Motorola) ColdFire 5270/5271 processor support. | |
181 | ||
182 | config M5272 | |
183 | bool "MCF5272" | |
184 | depends on !MMU | |
0e152d80 GU |
185 | select COLDFIRE_SW_A7 |
186 | select HAVE_MBAR | |
187 | help | |
188 | Motorola ColdFire 5272 processor support. | |
189 | ||
190 | config M5275 | |
191 | bool "MCF5275" | |
192 | depends on !MMU | |
0e152d80 GU |
193 | select M527x |
194 | select HAVE_CACHE_SPLIT | |
195 | select HAVE_IPSBAR | |
196 | select GENERIC_CLOCKEVENTS | |
197 | help | |
198 | Freescale (Motorola) ColdFire 5274/5275 processor support. | |
199 | ||
200 | config M528x | |
201 | bool "MCF528x" | |
202 | depends on !MMU | |
0e152d80 GU |
203 | select GENERIC_CLOCKEVENTS |
204 | select HAVE_CACHE_SPLIT | |
205 | select HAVE_IPSBAR | |
206 | help | |
207 | Motorola ColdFire 5280/5282 processor support. | |
208 | ||
209 | config M5307 | |
210 | bool "MCF5307" | |
211 | depends on !MMU | |
0e152d80 GU |
212 | select COLDFIRE_SW_A7 |
213 | select HAVE_CACHE_CB | |
214 | select HAVE_MBAR | |
215 | help | |
216 | Motorola ColdFire 5307 processor support. | |
217 | ||
218 | config M532x | |
219 | bool "MCF532x" | |
220 | depends on !MMU | |
0e152d80 GU |
221 | select HAVE_CACHE_CB |
222 | help | |
223 | Freescale (Motorola) ColdFire 532x processor support. | |
224 | ||
225 | config M5407 | |
226 | bool "MCF5407" | |
227 | depends on !MMU | |
0e152d80 GU |
228 | select COLDFIRE_SW_A7 |
229 | select HAVE_CACHE_CB | |
230 | select HAVE_MBAR | |
231 | help | |
232 | Motorola ColdFire 5407 processor support. | |
233 | ||
234 | config M54xx | |
235 | bool | |
236 | ||
237 | config M547x | |
238 | bool "MCF547x" | |
0e152d80 | 239 | select M54xx |
1f7034b9 | 240 | select MMU_COLDFIRE if MMU |
0e152d80 GU |
241 | select HAVE_CACHE_CB |
242 | select HAVE_MBAR | |
243 | help | |
244 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. | |
245 | ||
246 | config M548x | |
247 | bool "MCF548x" | |
1f7034b9 | 248 | select MMU_COLDFIRE if MMU |
0e152d80 GU |
249 | select M54xx |
250 | select HAVE_CACHE_CB | |
251 | select HAVE_MBAR | |
252 | help | |
253 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. | |
254 | ||
ad8f955d GU |
255 | endif # COLDFIRE |
256 | ||
0e152d80 GU |
257 | |
258 | comment "Processor Specific Options" | |
259 | ||
260 | config M68KFPU_EMU | |
261 | bool "Math emulation support (EXPERIMENTAL)" | |
262 | depends on MMU | |
263 | depends on EXPERIMENTAL | |
264 | help | |
265 | At some point in the future, this will cause floating-point math | |
266 | instructions to be emulated by the kernel on machines that lack a | |
267 | floating-point math coprocessor. Thrill-seekers and chronically | |
268 | sleep-deprived psychotic hacker types can say Y now, everyone else | |
269 | should probably wait a while. | |
270 | ||
271 | config M68KFPU_EMU_EXTRAPREC | |
272 | bool "Math emulation extra precision" | |
273 | depends on M68KFPU_EMU | |
274 | help | |
275 | The fpu uses normally a few bit more during calculations for | |
276 | correct rounding, the emulator can (often) do the same but this | |
277 | extra calculation can cost quite some time, so you can disable | |
278 | it here. The emulator will then "only" calculate with a 64 bit | |
279 | mantissa and round slightly incorrect, what is more than enough | |
280 | for normal usage. | |
281 | ||
282 | config M68KFPU_EMU_ONLY | |
283 | bool "Math emulation only kernel" | |
284 | depends on M68KFPU_EMU | |
285 | help | |
286 | This option prevents any floating-point instructions from being | |
287 | compiled into the kernel, thereby the kernel doesn't save any | |
288 | floating point context anymore during task switches, so this | |
289 | kernel will only be usable on machines without a floating-point | |
290 | math coprocessor. This makes the kernel a bit faster as no tests | |
291 | needs to be executed whether a floating-point instruction in the | |
292 | kernel should be executed or not. | |
293 | ||
294 | config ADVANCED | |
295 | bool "Advanced configuration options" | |
296 | depends on MMU | |
297 | ---help--- | |
298 | This gives you access to some advanced options for the CPU. The | |
299 | defaults should be fine for most users, but these options may make | |
300 | it possible for you to improve performance somewhat if you know what | |
301 | you are doing. | |
302 | ||
303 | Note that the answer to this question won't directly affect the | |
304 | kernel: saying N will just cause the configurator to skip all | |
305 | the questions about these options. | |
306 | ||
307 | Most users should say N to this question. | |
308 | ||
309 | config RMW_INSNS | |
310 | bool "Use read-modify-write instructions" | |
311 | depends on ADVANCED | |
312 | ---help--- | |
313 | This allows to use certain instructions that work with indivisible | |
314 | read-modify-write bus cycles. While this is faster than the | |
315 | workaround of disabling interrupts, it can conflict with DMA | |
316 | ( = direct memory access) on many Amiga systems, and it is also said | |
317 | to destabilize other machines. It is very likely that this will | |
318 | cause serious problems on any Amiga or Atari Medusa if set. The only | |
319 | configuration where it should work are 68030-based Ataris, where it | |
320 | apparently improves performance. But you've been warned! Unless you | |
321 | really know what you are doing, say N. Try Y only if you're quite | |
322 | adventurous. | |
323 | ||
324 | config SINGLE_MEMORY_CHUNK | |
325 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 | |
326 | depends on MMU | |
327 | default y if SUN3 | |
328 | select NEED_MULTIPLE_NODES | |
329 | help | |
330 | Ignore all but the first contiguous chunk of physical memory for VM | |
331 | purposes. This will save a few bytes kernel size and may speed up | |
332 | some operations. Say N if not sure. | |
333 | ||
334 | config ARCH_DISCONTIGMEM_ENABLE | |
335 | def_bool MMU && !SINGLE_MEMORY_CHUNK | |
336 | ||
337 | config 060_WRITETHROUGH | |
338 | bool "Use write-through caching for 68060 supervisor accesses" | |
339 | depends on ADVANCED && M68060 | |
340 | ---help--- | |
341 | The 68060 generally uses copyback caching of recently accessed data. | |
342 | Copyback caching means that memory writes will be held in an on-chip | |
343 | cache and only written back to memory some time later. Saying Y | |
344 | here will force supervisor (kernel) accesses to use writethrough | |
345 | caching. Writethrough caching means that data is written to memory | |
346 | straight away, so that cache and memory data always agree. | |
347 | Writethrough caching is less efficient, but is needed for some | |
348 | drivers on 68060 based systems where the 68060 bus snooping signal | |
349 | is hardwired on. The 53c710 SCSI driver is known to suffer from | |
350 | this problem. | |
351 | ||
352 | config M68K_L2_CACHE | |
353 | bool | |
354 | depends on MAC | |
355 | default y | |
356 | ||
357 | config NODES_SHIFT | |
358 | int | |
359 | default "3" | |
360 | depends on !SINGLE_MEMORY_CHUNK | |
361 | ||
362 | config FPU | |
363 | bool | |
364 | ||
365 | config COLDFIRE_SW_A7 | |
366 | bool | |
367 | ||
368 | config HAVE_CACHE_SPLIT | |
369 | bool | |
370 | ||
371 | config HAVE_CACHE_CB | |
372 | bool | |
373 | ||
374 | config HAVE_MBAR | |
375 | bool | |
376 | ||
377 | config HAVE_IPSBAR | |
378 | bool | |
379 | ||
380 | config CLOCK_SET | |
381 | bool "Enable setting the CPU clock frequency" | |
382 | depends on COLDFIRE | |
383 | default n | |
384 | help | |
385 | On some CPU's you do not need to know what the core CPU clock | |
386 | frequency is. On these you can disable clock setting. On some | |
387 | traditional 68K parts, and on all ColdFire parts you need to set | |
388 | the appropriate CPU clock frequency. On these devices many of the | |
389 | onboard peripherals derive their timing from the master CPU clock | |
390 | frequency. | |
391 | ||
392 | config CLOCK_FREQ | |
393 | int "Set the core clock frequency" | |
394 | default "66666666" | |
395 | depends on CLOCK_SET | |
396 | help | |
397 | Define the CPU clock frequency in use. This is the core clock | |
398 | frequency, it may or may not be the same as the external clock | |
399 | crystal fitted to your board. Some processors have an internal | |
400 | PLL and can have their frequency programmed at run time, others | |
401 | use internal dividers. In general the kernel won't setup a PLL | |
402 | if it is fitted (there are some exceptions). This value will be | |
403 | specific to the exact CPU that you are using. | |
404 | ||
405 | config OLDMASK | |
406 | bool "Old mask 5307 (1H55J) silicon" | |
407 | depends on M5307 | |
408 | help | |
409 | Build support for the older revision ColdFire 5307 silicon. | |
410 | Specifically this is the 1H55J mask revision. | |
411 | ||
412 | if HAVE_CACHE_SPLIT | |
413 | choice | |
414 | prompt "Split Cache Configuration" | |
415 | default CACHE_I | |
416 | ||
417 | config CACHE_I | |
418 | bool "Instruction" | |
419 | help | |
420 | Use all of the ColdFire CPU cache memory as an instruction cache. | |
421 | ||
422 | config CACHE_D | |
423 | bool "Data" | |
424 | help | |
425 | Use all of the ColdFire CPU cache memory as a data cache. | |
426 | ||
427 | config CACHE_BOTH | |
428 | bool "Both" | |
429 | help | |
430 | Split the ColdFire CPU cache, and use half as an instruction cache | |
431 | and half as a data cache. | |
432 | endchoice | |
433 | endif | |
434 | ||
435 | if HAVE_CACHE_CB | |
436 | choice | |
437 | prompt "Data cache mode" | |
438 | default CACHE_WRITETHRU | |
439 | ||
440 | config CACHE_WRITETHRU | |
441 | bool "Write-through" | |
442 | help | |
443 | The ColdFire CPU cache is set into Write-through mode. | |
444 | ||
445 | config CACHE_COPYBACK | |
446 | bool "Copy-back" | |
447 | help | |
448 | The ColdFire CPU cache is set into Copy-back mode. | |
449 | endchoice | |
450 | endif | |
451 |