Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * arch/m68k/bvme6000/config.c | |
3 | * | |
4 | * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk] | |
5 | * | |
6 | * Based on: | |
7 | * | |
8 | * linux/amiga/config.c | |
9 | * | |
10 | * Copyright (C) 1993 Hamish Macdonald | |
11 | * | |
12 | * This file is subject to the terms and conditions of the GNU General Public | |
13 | * License. See the file README.legal in the main directory of this archive | |
14 | * for more details. | |
15 | */ | |
16 | ||
17 | #include <linux/types.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/mm.h> | |
20 | #include <linux/tty.h> | |
21 | #include <linux/console.h> | |
22 | #include <linux/linkage.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/major.h> | |
25 | #include <linux/genhd.h> | |
26 | #include <linux/rtc.h> | |
27 | #include <linux/interrupt.h> | |
28 | ||
29 | #include <asm/bootinfo.h> | |
30 | #include <asm/system.h> | |
31 | #include <asm/pgtable.h> | |
32 | #include <asm/setup.h> | |
33 | #include <asm/irq.h> | |
34 | #include <asm/traps.h> | |
35 | #include <asm/rtc.h> | |
36 | #include <asm/machdep.h> | |
37 | #include <asm/bvme6000hw.h> | |
38 | ||
39 | extern irqreturn_t bvme6000_process_int (int level, struct pt_regs *regs); | |
40 | extern void bvme6000_init_IRQ (void); | |
41 | extern void bvme6000_free_irq (unsigned int, void *); | |
42 | extern int show_bvme6000_interrupts(struct seq_file *, void *); | |
43 | extern void bvme6000_enable_irq (unsigned int); | |
44 | extern void bvme6000_disable_irq (unsigned int); | |
45 | static void bvme6000_get_model(char *model); | |
46 | static int bvme6000_get_hardware_list(char *buffer); | |
47 | extern int bvme6000_request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id); | |
48 | extern void bvme6000_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *)); | |
49 | extern unsigned long bvme6000_gettimeoffset (void); | |
50 | extern int bvme6000_hwclk (int, struct rtc_time *); | |
51 | extern int bvme6000_set_clock_mmss (unsigned long); | |
52 | extern void bvme6000_reset (void); | |
53 | extern void bvme6000_waitbut(void); | |
54 | void bvme6000_set_vectors (void); | |
55 | ||
56 | static unsigned char bcd2bin (unsigned char b); | |
57 | static unsigned char bin2bcd (unsigned char b); | |
58 | ||
59 | /* Save tick handler routine pointer, will point to do_timer() in | |
60 | * kernel/sched.c, called via bvme6000_process_int() */ | |
61 | ||
62 | static irqreturn_t (*tick_handler)(int, void *, struct pt_regs *); | |
63 | ||
64 | ||
65 | int bvme6000_parse_bootinfo(const struct bi_record *bi) | |
66 | { | |
67 | if (bi->tag == BI_VME_TYPE) | |
68 | return 0; | |
69 | else | |
70 | return 1; | |
71 | } | |
72 | ||
73 | void bvme6000_reset(void) | |
74 | { | |
75 | volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; | |
76 | ||
77 | printk ("\r\n\nCalled bvme6000_reset\r\n" | |
78 | "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r"); | |
79 | /* The string of returns is to delay the reset until the whole | |
80 | * message is output. */ | |
81 | /* Enable the watchdog, via PIT port C bit 4 */ | |
82 | ||
83 | pit->pcddr |= 0x10; /* WDOG enable */ | |
84 | ||
85 | while(1) | |
86 | ; | |
87 | } | |
88 | ||
89 | static void bvme6000_get_model(char *model) | |
90 | { | |
91 | sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4); | |
92 | } | |
93 | ||
94 | ||
95 | /* No hardware options on BVME6000? */ | |
96 | ||
97 | static int bvme6000_get_hardware_list(char *buffer) | |
98 | { | |
99 | *buffer = '\0'; | |
100 | return 0; | |
101 | } | |
102 | ||
103 | ||
104 | void __init config_bvme6000(void) | |
105 | { | |
106 | volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; | |
107 | ||
108 | /* Board type is only set by newer versions of vmelilo/tftplilo */ | |
109 | if (!vme_brdtype) { | |
110 | if (m68k_cputype == CPU_68060) | |
111 | vme_brdtype = VME_TYPE_BVME6000; | |
112 | else | |
113 | vme_brdtype = VME_TYPE_BVME4000; | |
114 | } | |
115 | #if 0 | |
116 | /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug | |
117 | * debugger. Note trap_init() will splat the abort vector, but | |
118 | * bvme6000_init_IRQ() will put it back again. Hopefully. */ | |
119 | ||
120 | bvme6000_set_vectors(); | |
121 | #endif | |
122 | ||
123 | mach_max_dma_address = 0xffffffff; | |
124 | mach_sched_init = bvme6000_sched_init; | |
125 | mach_init_IRQ = bvme6000_init_IRQ; | |
126 | mach_gettimeoffset = bvme6000_gettimeoffset; | |
127 | mach_hwclk = bvme6000_hwclk; | |
128 | mach_set_clock_mmss = bvme6000_set_clock_mmss; | |
129 | mach_reset = bvme6000_reset; | |
130 | mach_free_irq = bvme6000_free_irq; | |
131 | mach_process_int = bvme6000_process_int; | |
132 | mach_get_irq_list = show_bvme6000_interrupts; | |
133 | mach_request_irq = bvme6000_request_irq; | |
134 | enable_irq = bvme6000_enable_irq; | |
135 | disable_irq = bvme6000_disable_irq; | |
136 | mach_get_model = bvme6000_get_model; | |
137 | mach_get_hardware_list = bvme6000_get_hardware_list; | |
138 | ||
139 | printk ("Board is %sconfigured as a System Controller\n", | |
140 | *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not "); | |
141 | ||
142 | /* Now do the PIT configuration */ | |
143 | ||
144 | pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */ | |
0b28002f | 145 | pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */ |
1da177e4 LT |
146 | pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */ |
147 | pit->padr = 0x00; /* Just to be tidy! */ | |
148 | pit->paddr = 0x00; /* All inputs for now (safest) */ | |
149 | pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */ | |
150 | pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40); | |
151 | /* PRI, SYSCON?, Level3, SCC clks from xtal */ | |
152 | pit->pbddr = 0xf3; /* Mostly outputs */ | |
153 | pit->pcdr = 0x01; /* PA transceiver disabled */ | |
154 | pit->pcddr = 0x03; /* WDOG disable */ | |
155 | ||
156 | /* Disable snooping for Ethernet and VME accesses */ | |
157 | ||
158 | bvme_acr_addrctl = 0; | |
159 | } | |
160 | ||
161 | ||
162 | irqreturn_t bvme6000_abort_int (int irq, void *dev_id, struct pt_regs *fp) | |
163 | { | |
164 | unsigned long *new = (unsigned long *)vectors; | |
165 | unsigned long *old = (unsigned long *)0xf8000000; | |
166 | ||
167 | /* Wait for button release */ | |
168 | while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS) | |
169 | ; | |
170 | ||
171 | *(new+4) = *(old+4); /* Illegal instruction */ | |
172 | *(new+9) = *(old+9); /* Trace */ | |
173 | *(new+47) = *(old+47); /* Trap #15 */ | |
174 | *(new+0x1f) = *(old+0x1f); /* ABORT switch */ | |
175 | return IRQ_HANDLED; | |
176 | } | |
177 | ||
178 | ||
179 | static irqreturn_t bvme6000_timer_int (int irq, void *dev_id, struct pt_regs *fp) | |
180 | { | |
181 | volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; | |
182 | unsigned char msr = rtc->msr & 0xc0; | |
183 | ||
184 | rtc->msr = msr | 0x20; /* Ack the interrupt */ | |
185 | ||
186 | return tick_handler(irq, dev_id, fp); | |
187 | } | |
188 | ||
189 | /* | |
190 | * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms | |
191 | * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low. | |
192 | * So, when reading the elapsed time, you should read timer1, | |
193 | * subtract it from 39999, and then add 40000 if T1 is high. | |
194 | * That gives you the number of 125ns ticks in to the 10ms period, | |
195 | * so divide by 8 to get the microsecond result. | |
196 | */ | |
197 | ||
198 | void bvme6000_sched_init (irqreturn_t (*timer_routine)(int, void *, struct pt_regs *)) | |
199 | { | |
200 | volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; | |
201 | unsigned char msr = rtc->msr & 0xc0; | |
202 | ||
203 | rtc->msr = 0; /* Ensure timer registers accessible */ | |
204 | ||
205 | tick_handler = timer_routine; | |
206 | if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0, | |
207 | "timer", bvme6000_timer_int)) | |
208 | panic ("Couldn't register timer int"); | |
209 | ||
210 | rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */ | |
211 | rtc->t1msb = 39999 >> 8; | |
212 | rtc->t1lsb = 39999 & 0xff; | |
213 | rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */ | |
214 | rtc->msr = 0x40; /* Access int.cntrl, etc */ | |
215 | rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */ | |
216 | rtc->irr_icr1 = 0; | |
217 | rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */ | |
218 | rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */ | |
219 | rtc->msr = 0; /* Access timer 1 control */ | |
220 | rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */ | |
221 | ||
222 | rtc->msr = msr; | |
223 | ||
224 | if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0, | |
225 | "abort", bvme6000_abort_int)) | |
226 | panic ("Couldn't register abort int"); | |
227 | } | |
228 | ||
229 | ||
230 | /* This is always executed with interrupts disabled. */ | |
231 | ||
232 | /* | |
233 | * NOTE: Don't accept any readings within 5us of rollover, as | |
234 | * the T1INT bit may be a little slow getting set. There is also | |
235 | * a fault in the chip, meaning that reads may produce invalid | |
236 | * results... | |
237 | */ | |
238 | ||
239 | unsigned long bvme6000_gettimeoffset (void) | |
240 | { | |
241 | volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; | |
242 | volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; | |
243 | unsigned char msr = rtc->msr & 0xc0; | |
244 | unsigned char t1int, t1op; | |
245 | unsigned long v = 800000, ov; | |
246 | ||
247 | rtc->msr = 0; /* Ensure timer registers accessible */ | |
248 | ||
249 | do { | |
250 | ov = v; | |
251 | t1int = rtc->msr & 0x20; | |
252 | t1op = pit->pcdr & 0x04; | |
253 | rtc->t1cr_omr |= 0x40; /* Latch timer1 */ | |
254 | v = rtc->t1msb << 8; /* Read timer1 */ | |
255 | v |= rtc->t1lsb; /* Read timer1 */ | |
256 | } while (t1int != (rtc->msr & 0x20) || | |
257 | t1op != (pit->pcdr & 0x04) || | |
258 | abs(ov-v) > 80 || | |
259 | v > 39960); | |
260 | ||
261 | v = 39999 - v; | |
262 | if (!t1op) /* If in second half cycle.. */ | |
263 | v += 40000; | |
264 | v /= 8; /* Convert ticks to microseconds */ | |
265 | if (t1int) | |
266 | v += 10000; /* Int pending, + 10ms */ | |
267 | rtc->msr = msr; | |
268 | ||
269 | return v; | |
270 | } | |
271 | ||
272 | static unsigned char bcd2bin (unsigned char b) | |
273 | { | |
274 | return ((b>>4)*10 + (b&15)); | |
275 | } | |
276 | ||
277 | static unsigned char bin2bcd (unsigned char b) | |
278 | { | |
279 | return (((b/10)*16) + (b%10)); | |
280 | } | |
281 | ||
282 | ||
283 | /* | |
284 | * Looks like op is non-zero for setting the clock, and zero for | |
285 | * reading the clock. | |
286 | * | |
287 | * struct hwclk_time { | |
288 | * unsigned sec; 0..59 | |
289 | * unsigned min; 0..59 | |
290 | * unsigned hour; 0..23 | |
291 | * unsigned day; 1..31 | |
292 | * unsigned mon; 0..11 | |
293 | * unsigned year; 00... | |
294 | * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set | |
295 | * }; | |
296 | */ | |
297 | ||
298 | int bvme6000_hwclk(int op, struct rtc_time *t) | |
299 | { | |
300 | volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; | |
301 | unsigned char msr = rtc->msr & 0xc0; | |
302 | ||
303 | rtc->msr = 0x40; /* Ensure clock and real-time-mode-register | |
304 | * are accessible */ | |
305 | if (op) | |
306 | { /* Write.... */ | |
307 | rtc->t0cr_rtmr = t->tm_year%4; | |
308 | rtc->bcd_tenms = 0; | |
309 | rtc->bcd_sec = bin2bcd(t->tm_sec); | |
310 | rtc->bcd_min = bin2bcd(t->tm_min); | |
311 | rtc->bcd_hr = bin2bcd(t->tm_hour); | |
312 | rtc->bcd_dom = bin2bcd(t->tm_mday); | |
313 | rtc->bcd_mth = bin2bcd(t->tm_mon + 1); | |
314 | rtc->bcd_year = bin2bcd(t->tm_year%100); | |
315 | if (t->tm_wday >= 0) | |
316 | rtc->bcd_dow = bin2bcd(t->tm_wday+1); | |
317 | rtc->t0cr_rtmr = t->tm_year%4 | 0x08; | |
318 | } | |
319 | else | |
320 | { /* Read.... */ | |
321 | do { | |
322 | t->tm_sec = bcd2bin(rtc->bcd_sec); | |
323 | t->tm_min = bcd2bin(rtc->bcd_min); | |
324 | t->tm_hour = bcd2bin(rtc->bcd_hr); | |
325 | t->tm_mday = bcd2bin(rtc->bcd_dom); | |
326 | t->tm_mon = bcd2bin(rtc->bcd_mth)-1; | |
327 | t->tm_year = bcd2bin(rtc->bcd_year); | |
328 | if (t->tm_year < 70) | |
329 | t->tm_year += 100; | |
330 | t->tm_wday = bcd2bin(rtc->bcd_dow)-1; | |
331 | } while (t->tm_sec != bcd2bin(rtc->bcd_sec)); | |
332 | } | |
333 | ||
334 | rtc->msr = msr; | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
339 | /* | |
340 | * Set the minutes and seconds from seconds value 'nowtime'. Fail if | |
341 | * clock is out by > 30 minutes. Logic lifted from atari code. | |
342 | * Algorithm is to wait for the 10ms register to change, and then to | |
343 | * wait a short while, and then set it. | |
344 | */ | |
345 | ||
346 | int bvme6000_set_clock_mmss (unsigned long nowtime) | |
347 | { | |
348 | int retval = 0; | |
349 | short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; | |
350 | unsigned char rtc_minutes, rtc_tenms; | |
351 | volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; | |
352 | unsigned char msr = rtc->msr & 0xc0; | |
353 | unsigned long flags; | |
354 | volatile int i; | |
355 | ||
356 | rtc->msr = 0; /* Ensure clock accessible */ | |
357 | rtc_minutes = bcd2bin (rtc->bcd_min); | |
358 | ||
359 | if ((rtc_minutes < real_minutes | |
360 | ? real_minutes - rtc_minutes | |
361 | : rtc_minutes - real_minutes) < 30) | |
362 | { | |
363 | local_irq_save(flags); | |
364 | rtc_tenms = rtc->bcd_tenms; | |
365 | while (rtc_tenms == rtc->bcd_tenms) | |
366 | ; | |
367 | for (i = 0; i < 1000; i++) | |
368 | ; | |
369 | rtc->bcd_min = bin2bcd(real_minutes); | |
370 | rtc->bcd_sec = bin2bcd(real_seconds); | |
371 | local_irq_restore(flags); | |
372 | } | |
373 | else | |
374 | retval = -1; | |
375 | ||
376 | rtc->msr = msr; | |
377 | ||
378 | return retval; | |
379 | } | |
380 |