[deliverable/linux.git] / arch / metag / kernel / irq.c

/*
 * Linux/Meta general interrupt handling code
 *
 */

#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irqchip/metag-ext.h>
#include <linux/irqchip/metag.h>
#include <linux/irqdomain.h>
#include <linux/ratelimit.h>

#include <asm/core_reg.h>
#include <asm/mach/arch.h>
#include <asm/uaccess.h>

#ifdef CONFIG_4KSTACKS
union irq_ctx {
	struct thread_info      tinfo;
	u32                     stack[THREAD_SIZE/sizeof(u32)];
};

static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
#endif

static struct irq_domain *root_domain;

static unsigned int startup_meta_irq(struct irq_data *data)
{
	tbi_startup_interrupt(data->hwirq);
	return 0;
}

static void shutdown_meta_irq(struct irq_data *data)
{
	tbi_shutdown_interrupt(data->hwirq);
}

void do_IRQ(int irq, struct pt_regs *regs)
{
	struct pt_regs *old_regs = set_irq_regs(regs);
#ifdef CONFIG_4KSTACKS
	struct irq_desc *desc;
	union irq_ctx *curctx, *irqctx;
	u32 *isp;
#endif

	irq_enter();

	irq = irq_linear_revmap(root_domain, irq);

#ifdef CONFIG_DEBUG_STACKOVERFLOW
	/* Debugging check for stack overflow: is there less than 1KB free? */
	{
		unsigned long sp;

		sp = __core_reg_get(A0StP);
		sp &= THREAD_SIZE - 1;

		if (unlikely(sp > (THREAD_SIZE - 1024)))
			pr_err("Stack overflow in do_IRQ: %ld\n", sp);
	}
#endif


#ifdef CONFIG_4KSTACKS
	curctx = (union irq_ctx *) current_thread_info();
	irqctx = hardirq_ctx[smp_processor_id()];

	/*
	 * this is where we switch to the IRQ stack. However, if we are
	 * already using the IRQ stack (because we interrupted a hardirq
	 * handler) we can't do that and just have to keep using the
	 * current stack (which is the irq stack already after all)
	 */
	if (curctx != irqctx) {
		/* build the stack frame on the IRQ stack */
		isp = (u32 *) ((char *)irqctx + sizeof(struct thread_info));
		irqctx->tinfo.task = curctx->tinfo.task;

		/*
		 * Copy the softirq bits in preempt_count so that the
		 * softirq checks work in the hardirq context.
		 */
		irqctx->tinfo.preempt_count =
			(irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
			(curctx->tinfo.preempt_count & SOFTIRQ_MASK);

		desc = irq_to_desc(irq);

		asm volatile (
			"MOV   D0.5,%0\n"
			"MOV   D1Ar1,%1\n"
			"MOV   D1RtP,%2\n"
			"MOV   D0Ar2,%3\n"
			"SWAP  A0StP,D0.5\n"
			"SWAP  PC,D1RtP\n"
			"MOV   A0StP,D0.5\n"
			:
			: "r" (isp), "r" (irq), "r" (desc->handle_irq),
			  "r" (desc)
			: "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
			  "D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
			  "D0.5"
			);
	} else
#endif
		generic_handle_irq(irq);

	irq_exit();

	set_irq_regs(old_regs);
}

#ifdef CONFIG_4KSTACKS

static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;

static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;

/*
 * allocate per-cpu stacks for hardirq and for softirq processing
 */
void irq_ctx_init(int cpu)
{
	union irq_ctx *irqctx;

	if (hardirq_ctx[cpu])
		return;

	irqctx = (union irq_ctx *) &hardirq_stack[cpu * THREAD_SIZE];
	irqctx->tinfo.task              = NULL;
	irqctx->tinfo.exec_domain       = NULL;
	irqctx->tinfo.cpu               = cpu;
	irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
	irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);

	hardirq_ctx[cpu] = irqctx;

	irqctx = (union irq_ctx *) &softirq_stack[cpu * THREAD_SIZE];
	irqctx->tinfo.task              = NULL;
	irqctx->tinfo.exec_domain       = NULL;
	irqctx->tinfo.cpu               = cpu;
	irqctx->tinfo.preempt_count     = 0;
	irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);

	softirq_ctx[cpu] = irqctx;

	pr_info("CPU %u irqstacks, hard=%p soft=%p\n",
		cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
}

void irq_ctx_exit(int cpu)
{
	hardirq_ctx[smp_processor_id()] = NULL;
}

extern asmlinkage void __do_softirq(void);

void do_softirq_own_stack(void)
{
	struct thread_info *curctx;
	union irq_ctx *irqctx;
	u32 *isp;

	curctx = current_thread_info();
	irqctx = softirq_ctx[smp_processor_id()];
	irqctx->tinfo.task = curctx->task;

	/* build the stack frame on the softirq stack */
	isp = (u32 *) ((char *)irqctx + sizeof(struct thread_info));

	asm volatile (
		"MOV   D0.5,%0\n"
		"SWAP  A0StP,D0.5\n"
		"CALLR D1RtP,___do_softirq\n"
		"MOV   A0StP,D0.5\n"
		:
		: "r" (isp)
		: "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
		  "D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
		  "D0.5"
		);
}
#endif

static struct irq_chip meta_irq_type = {
	.name = "META-IRQ",
	.irq_startup = startup_meta_irq,
	.irq_shutdown = shutdown_meta_irq,
};

/**
 * tbisig_map() - Map a TBI signal number to a virtual IRQ number.
 * @hw:		Number of the TBI signal. Must be in range.
 *
 * Returns:	The virtual IRQ number of the TBI signal number IRQ specified by
 *		@hw.
 */
int tbisig_map(unsigned int hw)
{
	return irq_create_mapping(root_domain, hw);
}

/**
 * metag_tbisig_map() - map a tbi signal to a Linux virtual IRQ number
 * @d:		root irq domain
 * @irq:	virtual irq number
 * @hw:		hardware irq number (TBI signal number)
 *
 * This sets up a virtual irq for a specified TBI signal number.
 */
static int metag_tbisig_map(struct irq_domain *d, unsigned int irq,
			    irq_hw_number_t hw)
{
#ifdef CONFIG_SMP
	irq_set_chip_and_handler(irq, &meta_irq_type, handle_percpu_irq);
#else
	irq_set_chip_and_handler(irq, &meta_irq_type, handle_simple_irq);
#endif
	return 0;
}

static const struct irq_domain_ops metag_tbisig_domain_ops = {
	.map = metag_tbisig_map,
};

/*
 * void init_IRQ(void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function should be called during kernel startup to initialize
 * the IRQ handling routines.
 */
void __init init_IRQ(void)
{
	root_domain = irq_domain_add_linear(NULL, 32,
					    &metag_tbisig_domain_ops, NULL);
	if (unlikely(!root_domain))
		panic("init_IRQ: cannot add root IRQ domain");

	irq_ctx_init(smp_processor_id());

	init_internal_IRQ();
	init_external_IRQ();

	if (machine_desc->init_irq)
		machine_desc->init_irq();
}

int __init arch_probe_nr_irqs(void)
{
	if (machine_desc->nr_irqs)
		nr_irqs = machine_desc->nr_irqs;
	return 0;
}

#ifdef CONFIG_HOTPLUG_CPU
static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
{
	struct irq_desc *desc = irq_to_desc(irq);
	struct irq_chip *chip = irq_data_get_irq_chip(data);
	unsigned long flags;

	raw_spin_lock_irqsave(&desc->lock, flags);
	if (chip->irq_set_affinity)
		chip->irq_set_affinity(data, cpumask_of(cpu), false);
	raw_spin_unlock_irqrestore(&desc->lock, flags);
}

/*
 * The CPU has been marked offline.  Migrate IRQs off this CPU.  If
 * the affinity settings do not allow other CPUs, force them onto any
 * available CPU.
 */
void migrate_irqs(void)
{
	unsigned int i, cpu = smp_processor_id();
	struct irq_desc *desc;

	for_each_irq_desc(i, desc) {
		struct irq_data *data = irq_desc_get_irq_data(desc);
		unsigned int newcpu;

		if (irqd_is_per_cpu(data))
			continue;

		if (!cpumask_test_cpu(cpu, data->affinity))
			continue;

		newcpu = cpumask_any_and(data->affinity, cpu_online_mask);

		if (newcpu >= nr_cpu_ids) {
			pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
					    i, cpu);

			cpumask_setall(data->affinity);
			newcpu = cpumask_any_and(data->affinity,
						 cpu_online_mask);
		}

		route_irq(data, i, newcpu);
	}
}
#endif /* CONFIG_HOTPLUG_CPU */
Commit	Line	Data
63047ea3 JH	1	/*
	2	* Linux/Meta general interrupt handling code
	3	*
	4	*/
	5
	6	#include <linux/kernel.h>
	7	#include <linux/interrupt.h>
	8	#include <linux/init.h>
5698c50d JH	9	#include <linux/irqchip/metag-ext.h>
5698c50d JH	10	#include <linux/irqchip/metag.h>
63047ea3 JH	11	#include <linux/irqdomain.h>
	12	#include <linux/ratelimit.h>
	13
	14	#include <asm/core_reg.h>
	15	#include <asm/mach/arch.h>
	16	#include <asm/uaccess.h>
	17
	18	#ifdef CONFIG_4KSTACKS
	19	union irq_ctx {
	20	struct thread_info tinfo;
	21	u32 stack[THREAD_SIZE/sizeof(u32)];
	22	};
	23
	24	static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
	25	static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
	26	#endif
	27
32580ae7	28	static struct irq_domain *root_domain;
63047ea3 JH	29
	30	static unsigned int startup_meta_irq(struct irq_data *data)
	31	{
	32	tbi_startup_interrupt(data->hwirq);
	33	return 0;
	34	}
	35
	36	static void shutdown_meta_irq(struct irq_data *data)
	37	{
	38	tbi_shutdown_interrupt(data->hwirq);
	39	}
	40
	41	void do_IRQ(int irq, struct pt_regs *regs)
	42	{
	43	struct pt_regs *old_regs = set_irq_regs(regs);
	44	#ifdef CONFIG_4KSTACKS
	45	struct irq_desc *desc;
	46	union irq_ctx curctx, irqctx;
	47	u32 *isp;
	48	#endif
	49
	50	irq_enter();
	51
	52	irq = irq_linear_revmap(root_domain, irq);
	53
	54	#ifdef CONFIG_DEBUG_STACKOVERFLOW
	55	/* Debugging check for stack overflow: is there less than 1KB free? */
	56	{
	57	unsigned long sp;
	58
	59	sp = __core_reg_get(A0StP);
	60	sp &= THREAD_SIZE - 1;
	61
	62	if (unlikely(sp > (THREAD_SIZE - 1024)))
	63	pr_err("Stack overflow in do_IRQ: %ld\n", sp);
	64	}
	65	#endif
	66
	67
	68	#ifdef CONFIG_4KSTACKS
	69	curctx = (union irq_ctx *) current_thread_info();
	70	irqctx = hardirq_ctx[smp_processor_id()];
	71
	72	/*
	73	* this is where we switch to the IRQ stack. However, if we are
	74	* already using the IRQ stack (because we interrupted a hardirq
	75	* handler) we can't do that and just have to keep using the
	76	* current stack (which is the irq stack already after all)
	77	*/
	78	if (curctx != irqctx) {
	79	/* build the stack frame on the IRQ stack */
	80	isp = (u32 ) ((char )irqctx + sizeof(struct thread_info));
	81	irqctx->tinfo.task = curctx->tinfo.task;
	82
	83	/*
	84	* Copy the softirq bits in preempt_count so that the
	85	* softirq checks work in the hardirq context.
	86	*/
	87	irqctx->tinfo.preempt_count =
	88	(irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) \|
	89	(curctx->tinfo.preempt_count & SOFTIRQ_MASK);
	90
	91	desc = irq_to_desc(irq);
	92
93	asm volatile (
94	"MOV D0.5,%0\n"
95	"MOV D1Ar1,%1\n"
96	"MOV D1RtP,%2\n"
97	"MOV D0Ar2,%3\n"
98	"SWAP A0StP,D0.5\n"
99	"SWAP PC,D1RtP\n"
100	"MOV A0StP,D0.5\n"
101	:
102	: "r" (isp), "r" (irq), "r" (desc->handle_irq),
103	"r" (desc)
104	: "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
105	"D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
106	"D0.5"
107	);
108	} else
109	#endif
110	generic_handle_irq(irq);
111
112	irq_exit();
113
114	set_irq_regs(old_regs);
115	}
116
117	#ifdef CONFIG_4KSTACKS
118
119	static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
120
121	static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
122
123	/*
124	* allocate per-cpu stacks for hardirq and for softirq processing
125	*/
126	void irq_ctx_init(int cpu)
127	{
128	union irq_ctx *irqctx;
129
130	if (hardirq_ctx[cpu])
131	return;
132
133	irqctx = (union irq_ctx ) &hardirq_stack[cpu THREAD_SIZE];
134	irqctx->tinfo.task = NULL;
135	irqctx->tinfo.exec_domain = NULL;
136	irqctx->tinfo.cpu = cpu;
137	irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
138	irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
139
140	hardirq_ctx[cpu] = irqctx;
141
142	irqctx = (union irq_ctx ) &softirq_stack[cpu THREAD_SIZE];
143	irqctx->tinfo.task = NULL;
144	irqctx->tinfo.exec_domain = NULL;
145	irqctx->tinfo.cpu = cpu;
146	irqctx->tinfo.preempt_count = 0;
147	irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
148
149	softirq_ctx[cpu] = irqctx;
150
151	pr_info("CPU %u irqstacks, hard=%p soft=%p\n",
152	cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
153	}
154
155	void irq_ctx_exit(int cpu)
156	{
157	hardirq_ctx[smp_processor_id()] = NULL;
158	}
159
160	extern asmlinkage void __do_softirq(void);
161
7d65f4a6	162	void do_softirq_own_stack(void)
63047ea3	163	{
63047ea3 JH	164	struct thread_info *curctx;
	165	union irq_ctx *irqctx;
	166	u32 *isp;
	167
7d65f4a6 FW	168	curctx = current_thread_info();
	169	irqctx = softirq_ctx[smp_processor_id()];
	170	irqctx->tinfo.task = curctx->task;
	171
	172	/* build the stack frame on the softirq stack */
	173	isp = (u32 ) ((char )irqctx + sizeof(struct thread_info));
	174
	175	asm volatile (
	176	"MOV D0.5,%0\n"
	177	"SWAP A0StP,D0.5\n"
	178	"CALLR D1RtP,___do_softirq\n"
	179	"MOV A0StP,D0.5\n"
	180	:
	181	: "r" (isp)
	182	: "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
	183	"D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
	184	"D0.5"
	185	);
63047ea3 JH	186	}
	187	#endif
	188
	189	static struct irq_chip meta_irq_type = {
	190	.name = "META-IRQ",
	191	.irq_startup = startup_meta_irq,
	192	.irq_shutdown = shutdown_meta_irq,
	193	};
	194
	195	/**
	196	* tbisig_map() - Map a TBI signal number to a virtual IRQ number.
	197	* @hw: Number of the TBI signal. Must be in range.
	198	*
	199	* Returns: The virtual IRQ number of the TBI signal number IRQ specified by
	200	* @hw.
	201	*/
	202	int tbisig_map(unsigned int hw)
	203	{
	204	return irq_create_mapping(root_domain, hw);
	205	}
	206
	207	/**
	208	* metag_tbisig_map() - map a tbi signal to a Linux virtual IRQ number
	209	* @d: root irq domain
	210	* @irq: virtual irq number
	211	* @hw: hardware irq number (TBI signal number)
	212	*
	213	* This sets up a virtual irq for a specified TBI signal number.
	214	*/
	215	static int metag_tbisig_map(struct irq_domain *d, unsigned int irq,
	216	irq_hw_number_t hw)
	217	{
	218	#ifdef CONFIG_SMP
	219	irq_set_chip_and_handler(irq, &meta_irq_type, handle_percpu_irq);
	220	#else
	221	irq_set_chip_and_handler(irq, &meta_irq_type, handle_simple_irq);
	222	#endif
	223	return 0;
	224	}
	225
	226	static const struct irq_domain_ops metag_tbisig_domain_ops = {
	227	.map = metag_tbisig_map,
	228	};
	229
	230	/*
	231	* void init_IRQ(void)
	232	*
	233	* Parameters: None
	234	*
	235	* Returns: Nothing
	236	*
	237	* This function should be called during kernel startup to initialize
	238	* the IRQ handling routines.
	239	*/
	240	void __init init_IRQ(void)
	241	{
	242	root_domain = irq_domain_add_linear(NULL, 32,
	243	&metag_tbisig_domain_ops, NULL);
	244	if (unlikely(!root_domain))
	245	panic("init_IRQ: cannot add root IRQ domain");
	246
	247	irq_ctx_init(smp_processor_id());
	248
5698c50d JH	249	init_internal_IRQ();
	250	init_external_IRQ();
	251
63047ea3 JH	252	if (machine_desc->init_irq)
	253	machine_desc->init_irq();
	254	}
	255
	256	int __init arch_probe_nr_irqs(void)
	257	{
	258	if (machine_desc->nr_irqs)
	259	nr_irqs = machine_desc->nr_irqs;
	260	return 0;
	261	}
	262
	263	#ifdef CONFIG_HOTPLUG_CPU
	264	static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
	265	{
	266	struct irq_desc *desc = irq_to_desc(irq);
	267	struct irq_chip *chip = irq_data_get_irq_chip(data);
8b8b2412	268	unsigned long flags;
63047ea3	269
8b8b2412	270	raw_spin_lock_irqsave(&desc->lock, flags);
63047ea3 JH	271	if (chip->irq_set_affinity)
63047ea3 JH	272	chip->irq_set_affinity(data, cpumask_of(cpu), false);
8b8b2412	273	raw_spin_unlock_irqrestore(&desc->lock, flags);
63047ea3 JH	274	}
	275
	276	/*
	277	* The CPU has been marked offline. Migrate IRQs off this CPU. If
	278	* the affinity settings do not allow other CPUs, force them onto any
	279	* available CPU.
	280	*/
	281	void migrate_irqs(void)
	282	{
	283	unsigned int i, cpu = smp_processor_id();
	284	struct irq_desc *desc;
	285
	286	for_each_irq_desc(i, desc) {
	287	struct irq_data *data = irq_desc_get_irq_data(desc);
	288	unsigned int newcpu;
	289
	290	if (irqd_is_per_cpu(data))
	291	continue;
	292
	293	if (!cpumask_test_cpu(cpu, data->affinity))
	294	continue;
	295
	296	newcpu = cpumask_any_and(data->affinity, cpu_online_mask);
	297
	298	if (newcpu >= nr_cpu_ids) {
	299	pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
	300	i, cpu);
	301
	302	cpumask_setall(data->affinity);
	303	newcpu = cpumask_any_and(data->affinity,
	304	cpu_online_mask);
	305	}
	306
	307	route_irq(data, i, newcpu);
	308	}
	309	}
	310	#endif /* CONFIG_HOTPLUG_CPU */