MIPS: Alchemy: more base address cleanup
[deliverable/linux.git] / arch / mips / alchemy / devboards / db1x00 / platform.c
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1/*
2 * DBAu1xxx board platform device registration
3 *
4 * Copyright (C) 2009 Manuel Lauss
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/init.h>
22#include <linux/platform_device.h>
23
24#include <asm/mach-au1x00/au1xxx.h>
206aa6cd 25#include <asm/mach-db1x00/bcsr.h>
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26#include "../platform.h"
27
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28/* DB1xxx PCMCIA interrupt sources:
29 * CD0/1 GPIO0/3
30 * STSCHG0/1 GPIO1/4
31 * CARD0/1 GPIO2/5
32 * Db1550: 0/1, 21/22, 3/5
33 */
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34
35#define DB1XXX_HAS_PCMCIA
206aa6cd 36#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
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37
38#if defined(CONFIG_MIPS_DB1000)
39#define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT
40#define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT
41#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT
42#define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT
43#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
44#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
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45#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
46#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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47#elif defined(CONFIG_MIPS_DB1100)
48#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
49#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
50#define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT
51#define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT
52#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
53#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
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54#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
55#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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56#elif defined(CONFIG_MIPS_DB1500)
57#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
58#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
59#define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT
60#define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT
61#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
62#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
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63#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
64#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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65#elif defined(CONFIG_MIPS_DB1550)
66#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
67#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
68#define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT
69#define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT
70#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
71#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
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72#define BOARD_FLASH_SIZE 0x08000000 /* 128MB */
73#define BOARD_FLASH_WIDTH 4 /* 32-bits */
27dd65ac 74#else
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75/* other board: no PCMCIA */
76#undef DB1XXX_HAS_PCMCIA
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77#undef F_SWAPPED
78#define F_SWAPPED 0
79#if defined(CONFIG_MIPS_BOSPORUS)
80#define BOARD_FLASH_SIZE 0x01000000 /* 16MB */
81#define BOARD_FLASH_WIDTH 2 /* 16-bits */
82#elif defined(CONFIG_MIPS_MIRAGE)
83#define BOARD_FLASH_SIZE 0x04000000 /* 64MB */
84#define BOARD_FLASH_WIDTH 4 /* 32-bits */
85#endif
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86#endif
87
88static int __init db1xxx_dev_init(void)
89{
90#ifdef DB1XXX_HAS_PCMCIA
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91 db1x_register_pcmcia_socket(
92 AU1000_PCMCIA_ATTR_PHYS_ADDR,
93 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
94 AU1000_PCMCIA_MEM_PHYS_ADDR,
95 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
96 AU1000_PCMCIA_IO_PHYS_ADDR,
97 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
98 DB1XXX_PCMCIA_CARD0, DB1XXX_PCMCIA_CD0,
99 /*DB1XXX_PCMCIA_STSCHG0*/0, 0, 0);
27dd65ac 100
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101 db1x_register_pcmcia_socket(
102 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
103 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
104 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
105 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
106 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
107 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
108 DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1,
109 /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1);
27dd65ac 110#endif
206aa6cd 111 db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
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112 return 0;
113}
114device_initcall(db1xxx_dev_init);
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