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1c0c13eb AJ |
1 | /* |
2 | * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
10 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
12 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
13 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
14 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
15 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
16 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
17 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
18 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License along | |
21 | * with this program; if not, write to the Free Software Foundation, Inc., | |
22 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/types.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/irq.h> | |
28 | #include <asm/irq_cpu.h> | |
a3e72cd2 | 29 | #include <bcm47xx.h> |
1c0c13eb AJ |
30 | |
31 | void plat_irq_dispatch(void) | |
32 | { | |
33 | u32 cause; | |
34 | ||
35 | cause = read_c0_cause() & read_c0_status() & CAUSEF_IP; | |
36 | ||
37 | clear_c0_status(cause); | |
38 | ||
39 | if (cause & CAUSEF_IP7) | |
40 | do_IRQ(7); | |
41 | if (cause & CAUSEF_IP2) | |
42 | do_IRQ(2); | |
43 | if (cause & CAUSEF_IP3) | |
44 | do_IRQ(3); | |
45 | if (cause & CAUSEF_IP4) | |
46 | do_IRQ(4); | |
47 | if (cause & CAUSEF_IP5) | |
48 | do_IRQ(5); | |
49 | if (cause & CAUSEF_IP6) | |
50 | do_IRQ(6); | |
51 | } | |
52 | ||
53 | void __init arch_init_irq(void) | |
54 | { | |
a3e72cd2 HM |
55 | #ifdef CONFIG_BCM47XX_BCMA |
56 | if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { | |
57 | bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core, | |
58 | BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31); | |
59 | /* | |
60 | * the kernel reads the timer irq from some register and thinks | |
61 | * it's #5, but we offset it by 2 and route to #7 | |
62 | */ | |
63 | cp0_compare_irq = 7; | |
64 | } | |
65 | #endif | |
1c0c13eb AJ |
66 | mips_cpu_irq_init(); |
67 | } |