Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / mips / bcm47xx / time.c
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1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25
26#include <linux/init.h>
27#include <linux/ssb/ssb.h>
28#include <asm/time.h>
29#include <bcm47xx.h>
2224de9d 30#include <bcm47xx_nvram.h>
8eae19cc 31#include <bcm47xx_board.h>
1c0c13eb 32
4b550488 33void __init plat_time_init(void)
1c0c13eb 34{
08ccf572 35 unsigned long hz = 0;
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36 u16 chip_id = 0;
37 char buf[10];
38 int len;
8eae19cc 39 enum bcm47xx_board board = bcm47xx_board_get();
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40
41 /*
42 * Use deterministic values for initial counter interrupt
43 * so that calibrate delay avoids encountering a counter wrap.
44 */
45 write_c0_count(0);
46 write_c0_compare(0xffff);
47
08ccf572 48 switch (bcm47xx_bus_type) {
a656ffcb 49#ifdef CONFIG_BCM47XX_SSB
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50 case BCM47XX_BUS_TYPE_SSB:
51 hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
2224de9d 52 chip_id = bcm47xx_bus.ssb.chip_id;
08ccf572 53 break;
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54#endif
55#ifdef CONFIG_BCM47XX_BCMA
56 case BCM47XX_BUS_TYPE_BCMA:
57 hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
2224de9d 58 chip_id = bcm47xx_bus.bcma.bus.chipinfo.id;
c1d1c5d4 59 break;
a656ffcb 60#endif
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61 }
62
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63 if (chip_id == 0x5354) {
64 len = bcm47xx_nvram_getenv("clkfreq", buf, sizeof(buf));
65 if (len >= 0 && !strncmp(buf, "200", 4))
66 hz = 100000000;
67 }
68
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69 switch (board) {
70 case BCM47XX_BOARD_ASUS_WL520GC:
71 case BCM47XX_BOARD_ASUS_WL520GU:
72 hz = 100000000;
73 break;
74 default:
75 break;
76 }
77
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78 if (!hz)
79 hz = 100000000;
80
81 /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
82 mips_hpt_frequency = hz;
83}
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