[deliverable/linux.git] / arch / mips / boot / dts / brcm / bcm7420.dtsi

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm7420";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		mips-hpt-frequency = <93750000>;

		cpu@0 {
			compatible = "brcm,bmips5000";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "brcm,bmips5000";
			device_type = "cpu";
			reg = <1>;
		};
	};

	aliases {
		uart0 = &uart0;
	};

	cpu_intc: cpu_intc {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	clocks {
		uart_clk: uart_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <81000000>;
		};
	};

	rdb {
		#address-cells = <1>;
		#size-cells = <1>;

		compatible = "simple-bus";
		ranges = <0 0x10000000 0x01000000>;

		periph_intc: periph_intc@441400 {
			compatible = "brcm,bcm7038-l1-intc";
			reg = <0x441400 0x30>, <0x441600 0x30>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <2>, <3>;
		};

		sun_l2_intc: sun_l2_intc@401800 {
			compatible = "brcm,l2-intc";
			reg = <0x401800 0x30>;
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&periph_intc>;
			interrupts = <23>;
		};

		gisb-arb@400000 {
			compatible = "brcm,bcm7400-gisb-arb";
			reg = <0x400000 0xdc>;
			native-endian;
			interrupt-parent = <&sun_l2_intc>;
			interrupts = <0>, <2>;
			brcm,gisb-arb-master-mask = <0x3ff>;
			brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
						     "pcie_0", "bsp_0", "rdc_0",
						     "rptd_0", "avd_0", "avd_1",
						     "jtag_0";
		};

		upg_irq0_intc: upg_irq0_intc@406780 {
			compatible = "brcm,bcm7120-l2-intc";
			reg = <0x406780 0x8>;

			brcm,int-map-mask = <0x44>, <0x1f000000>;
			brcm,int-fwd-mask = <0x70000>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&periph_intc>;
			interrupts = <18>, <19>;
			interrupt-names = "upg_main", "upg_bsc";
		};

		sun_top_ctrl: syscon@404000 {
			compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
			reg = <0x404000 0x60c>;
			native-endian;
		};

		reboot {
			compatible = "brcm,bcm7038-reboot";
			syscon = <&sun_top_ctrl 0x8 0x14>;
		};

		uart0: serial@406b00 {
			compatible = "ns16550a";
			reg = <0x406b00 0x20>;
			reg-io-width = <0x4>;
			reg-shift = <0x2>;
			interrupt-parent = <&periph_intc>;
			interrupts = <21>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		uart1: serial@406b40 {
			compatible = "ns16550a";
			reg = <0x406b40 0x20>;
			reg-io-width = <0x4>;
			reg-shift = <0x2>;
			interrupt-parent = <&periph_intc>;
			interrupts = <64>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		uart2: serial@406b80 {
			compatible = "ns16550a";
			reg = <0x406b80 0x20>;
			reg-io-width = <0x4>;
			reg-shift = <0x2>;
			interrupt-parent = <&periph_intc>;
			interrupts = <65>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		bsca: i2c@406200 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406200 0x58>;
		      interrupts = <24>;
		      interrupt-names = "upg_bsca";
		      status = "disabled";
		};

		bscb: i2c@406280 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406280 0x58>;
		      interrupts = <25>;
		      interrupt-names = "upg_bscb";
		      status = "disabled";
		};

		bscc: i2c@406300 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406300 0x58>;
		      interrupts = <26>;
		      interrupt-names = "upg_bscc";
		      status = "disabled";
		};

		bscd: i2c@406380 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406380 0x58>;
		      interrupts = <27>;
		      interrupt-names = "upg_bscd";
		      status = "disabled";
		};

		bsce: i2c@406800 {
		      clock-frequency = <390000>;
		      compatible = "brcm,brcmstb-i2c";
		      interrupt-parent = <&upg_irq0_intc>;
		      reg = <0x406800 0x58>;
		      interrupts = <28>;
		      interrupt-names = "upg_bsce";
		      status = "disabled";
		};

		enet0: ethernet@468000 {
			phy-mode = "internal";
			phy-handle = <&phy1>;
			mac-address = [ 00 10 18 36 23 1a ];
			compatible = "brcm,genet-v1";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x468000 0x3c8c>;
			interrupts = <69>, <79>;
			interrupt-parent = <&periph_intc>;
			status = "disabled";

			mdio@e14 {
				compatible = "brcm,genet-mdio-v1";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0xe14 0x8>;

				phy1: ethernet-phy@1 {
					max-speed = <100>;
					reg = <0x1>;
					compatible = "brcm,65nm-ephy",
						"ethernet-phy-ieee802.3-c22";
				};
			};
		};

		ehci0: usb@488300 {
			compatible = "brcm,bcm7420-ehci", "generic-ehci";
			reg = <0x488300 0x100>;
			interrupt-parent = <&periph_intc>;
			interrupts = <60>;
			status = "disabled";
		};

		ohci0: usb@488400 {
			compatible = "brcm,bcm7420-ohci", "generic-ohci";
			reg = <0x488400 0x100>;
			native-endian;
			no-big-frame-no;
			interrupt-parent = <&periph_intc>;
			interrupts = <61>;
			status = "disabled";
		};

		ehci1: usb@488500 {
			compatible = "brcm,bcm7420-ehci", "generic-ehci";
			reg = <0x488500 0x100>;
			interrupt-parent = <&periph_intc>;
			interrupts = <55>;
			status = "disabled";
		};

		ohci1: usb@488600 {
			compatible = "brcm,bcm7420-ohci", "generic-ohci";
			reg = <0x488600 0x100>;
			native-endian;
			no-big-frame-no;
			interrupt-parent = <&periph_intc>;
			interrupts = <62>;
			status = "disabled";
		};
	};
};
Commit	Line	Data
8945e37e KC	1	/ {
	2	#address-cells = <1>;
	3	#size-cells = <1>;
	4	compatible = "brcm,bcm7420";
	5
	6	cpus {
	7	#address-cells = <1>;
	8	#size-cells = <0>;
	9
	10	mips-hpt-frequency = <93750000>;
	11
	12	cpu@0 {
	13	compatible = "brcm,bmips5000";
	14	device_type = "cpu";
	15	reg = <0>;
	16	};
	17
	18	cpu@1 {
	19	compatible = "brcm,bmips5000";
	20	device_type = "cpu";
	21	reg = <1>;
	22	};
	23	};
	24
	25	aliases {
	26	uart0 = &uart0;
	27	};
	28
	29	cpu_intc: cpu_intc {
	30	#address-cells = <0>;
	31	compatible = "mti,cpu-interrupt-controller";
	32
	33	interrupt-controller;
	34	#interrupt-cells = <1>;
	35	};
	36
	37	clocks {
	38	uart_clk: uart_clk {
	39	compatible = "fixed-clock";
	40	#clock-cells = <0>;
	41	clock-frequency = <81000000>;
	42	};
	43	};
	44
	45	rdb {
	46	#address-cells = <1>;
	47	#size-cells = <1>;
	48
	49	compatible = "simple-bus";
	50	ranges = <0 0x10000000 0x01000000>;
	51
	52	periph_intc: periph_intc@441400 {
	53	compatible = "brcm,bcm7038-l1-intc";
	54	reg = <0x441400 0x30>, <0x441600 0x30>;
	55
	56	interrupt-controller;
	57	#interrupt-cells = <1>;
	58
	59	interrupt-parent = <&cpu_intc>;
	60	interrupts = <2>, <3>;
	61	};
	62
	63	sun_l2_intc: sun_l2_intc@401800 {
	64	compatible = "brcm,l2-intc";
65	reg = <0x401800 0x30>;
66	interrupt-controller;
67	#interrupt-cells = <1>;
68	interrupt-parent = <&periph_intc>;
69	interrupts = <23>;
70	};
71
72	gisb-arb@400000 {
73	compatible = "brcm,bcm7400-gisb-arb";
74	reg = <0x400000 0xdc>;
75	native-endian;
76	interrupt-parent = <&sun_l2_intc>;
77	interrupts = <0>, <2>;
78	brcm,gisb-arb-master-mask = <0x3ff>;
79	brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
80	"pcie_0", "bsp_0", "rdc_0",
81	"rptd_0", "avd_0", "avd_1",
82	"jtag_0";
83	};
84
85	upg_irq0_intc: upg_irq0_intc@406780 {
86	compatible = "brcm,bcm7120-l2-intc";
87	reg = <0x406780 0x8>;
88
5c40d493	89	brcm,int-map-mask = <0x44>, <0x1f000000>;
8945e37e KC	90	brcm,int-fwd-mask = <0x70000>;
	91
	92	interrupt-controller;
	93	#interrupt-cells = <1>;
	94
	95	interrupt-parent = <&periph_intc>;
5c40d493 JS	96	interrupts = <18>, <19>;
5c40d493 JS	97	interrupt-names = "upg_main", "upg_bsc";
8945e37e KC	98	};
	99
	100	sun_top_ctrl: syscon@404000 {
	101	compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
	102	reg = <0x404000 0x60c>;
25d6463e	103	native-endian;
8945e37e KC	104	};
	105
	106	reboot {
	107	compatible = "brcm,bcm7038-reboot";
	108	syscon = <&sun_top_ctrl 0x8 0x14>;
	109	};
	110
	111	uart0: serial@406b00 {
	112	compatible = "ns16550a";
	113	reg = <0x406b00 0x20>;
	114	reg-io-width = <0x4>;
	115	reg-shift = <0x2>;
	116	interrupt-parent = <&periph_intc>;
	117	interrupts = <21>;
	118	clocks = <&uart_clk>;
	119	status = "disabled";
	120	};
	121
5c40d493 JS	122	uart1: serial@406b40 {
	123	compatible = "ns16550a";
	124	reg = <0x406b40 0x20>;
	125	reg-io-width = <0x4>;
	126	reg-shift = <0x2>;
	127	interrupt-parent = <&periph_intc>;
	128	interrupts = <64>;
	129	clocks = <&uart_clk>;
	130	status = "disabled";
	131	};
	132
	133	uart2: serial@406b80 {
	134	compatible = "ns16550a";
	135	reg = <0x406b80 0x20>;
	136	reg-io-width = <0x4>;
	137	reg-shift = <0x2>;
	138	interrupt-parent = <&periph_intc>;
	139	interrupts = <65>;
	140	clocks = <&uart_clk>;
	141	status = "disabled";
	142	};
	143
	144	bsca: i2c@406200 {
	145	clock-frequency = <390000>;
	146	compatible = "brcm,brcmstb-i2c";
	147	interrupt-parent = <&upg_irq0_intc>;
	148	reg = <0x406200 0x58>;
	149	interrupts = <24>;
	150	interrupt-names = "upg_bsca";
	151	status = "disabled";
	152	};
	153
	154	bscb: i2c@406280 {
	155	clock-frequency = <390000>;
	156	compatible = "brcm,brcmstb-i2c";
	157	interrupt-parent = <&upg_irq0_intc>;
	158	reg = <0x406280 0x58>;
	159	interrupts = <25>;
	160	interrupt-names = "upg_bscb";
	161	status = "disabled";
	162	};
	163
	164	bscc: i2c@406300 {
	165	clock-frequency = <390000>;
	166	compatible = "brcm,brcmstb-i2c";
	167	interrupt-parent = <&upg_irq0_intc>;
	168	reg = <0x406300 0x58>;
	169	interrupts = <26>;
	170	interrupt-names = "upg_bscc";
	171	status = "disabled";
	172	};
	173
	174	bscd: i2c@406380 {
	175	clock-frequency = <390000>;
	176	compatible = "brcm,brcmstb-i2c";
	177	interrupt-parent = <&upg_irq0_intc>;
	178	reg = <0x406380 0x58>;
	179	interrupts = <27>;
	180	interrupt-names = "upg_bscd";
	181	status = "disabled";
	182	};
	183
	184	bsce: i2c@406800 {
	185	clock-frequency = <390000>;
186	compatible = "brcm,brcmstb-i2c";
187	interrupt-parent = <&upg_irq0_intc>;
188	reg = <0x406800 0x58>;
189	interrupts = <28>;
190	interrupt-names = "upg_bsce";
191	status = "disabled";
192	};
193
8945e37e KC	194	enet0: ethernet@468000 {
	195	phy-mode = "internal";
	196	phy-handle = <&phy1>;
	197	mac-address = [ 00 10 18 36 23 1a ];
	198	compatible = "brcm,genet-v1";
	199	#address-cells = <0x1>;
	200	#size-cells = <0x1>;
	201	reg = <0x468000 0x3c8c>;
	202	interrupts = <69>, <79>;
	203	interrupt-parent = <&periph_intc>;
	204	status = "disabled";
	205
	206	mdio@e14 {
	207	compatible = "brcm,genet-mdio-v1";
	208	#address-cells = <0x1>;
	209	#size-cells = <0x0>;
	210	reg = <0xe14 0x8>;
	211
	212	phy1: ethernet-phy@1 {
	213	max-speed = <100>;
	214	reg = <0x1>;
	215	compatible = "brcm,65nm-ephy",
	216	"ethernet-phy-ieee802.3-c22";
	217	};
	218	};
	219	};
	220
	221	ehci0: usb@488300 {
	222	compatible = "brcm,bcm7420-ehci", "generic-ehci";
	223	reg = <0x488300 0x100>;
	224	interrupt-parent = <&periph_intc>;
	225	interrupts = <60>;
	226	status = "disabled";
	227	};
	228
	229	ohci0: usb@488400 {
	230	compatible = "brcm,bcm7420-ohci", "generic-ohci";
	231	reg = <0x488400 0x100>;
	232	native-endian;
	233	no-big-frame-no;
	234	interrupt-parent = <&periph_intc>;
	235	interrupts = <61>;
	236	status = "disabled";
	237	};
	238
	239	ehci1: usb@488500 {
	240	compatible = "brcm,bcm7420-ehci", "generic-ehci";
	241	reg = <0x488500 0x100>;
	242	interrupt-parent = <&periph_intc>;
	243	interrupts = <55>;
	244	status = "disabled";
	245	};
	246
	247	ohci1: usb@488600 {
	248	compatible = "brcm,bcm7420-ohci", "generic-ohci";
	249	reg = <0x488600 0x100>;
	250	native-endian;
	251	no-big-frame-no;
	252	interrupt-parent = <&periph_intc>;
	253	interrupts = <62>;
	254	status = "disabled";
	255	};
	256	};
	257	};