[MIPS] Cobalt: Remove cobalt_machine_power_off()
[deliverable/linux.git] / arch / mips / cobalt / setup.c
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1da177e4
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1/*
2 * Setup pointers to hardware dependent routines.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
fcdb27ad 8 * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
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9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
10 *
11 */
1da177e4 12#include <linux/interrupt.h>
1da177e4 13#include <linux/init.h>
fcdb27ad 14#include <linux/pm.h>
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15
16#include <asm/bootinfo.h>
17#include <asm/time.h>
d865bea4 18#include <asm/i8253.h>
1da177e4 19#include <asm/io.h>
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20#include <asm/reboot.h>
21#include <asm/gt64120.h>
22
cc50b67d 23#include <cobalt.h>
d5ab1a69 24#include <irq.h>
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25
26extern void cobalt_machine_restart(char *command);
27extern void cobalt_machine_halt(void);
1da177e4 28
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29const char *get_system_type(void)
30{
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31 switch (cobalt_board_id) {
32 case COBALT_BRD_ID_QUBE1:
33 return "Cobalt Qube";
34 case COBALT_BRD_ID_RAQ1:
35 return "Cobalt RaQ";
36 case COBALT_BRD_ID_QUBE2:
37 return "Cobalt Qube2";
38 case COBALT_BRD_ID_RAQ2:
39 return "Cobalt RaQ2";
40 }
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41 return "MIPS Cobalt";
42}
43
54d0a216 44void __init plat_timer_setup(struct irqaction *irq)
1da177e4 45{
5c90d528 46 /* Load timer value for HZ (TCLK is 50MHz) */
56ae5833 47 GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ);
1da177e4 48
d5ab1a69 49 /* Enable timer0 */
56ae5833 50 GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
1da177e4 51
d5ab1a69 52 setup_irq(GT641XX_TIMER0_IRQ, irq);
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53}
54
47d7c44b
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55/*
56 * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
57 * keyboard conntroller is never used.
58 * Also PCI-ISA bridge DMA contoroller is never used.
59 */
60static struct resource cobalt_reserved_resources[] = {
61 { /* dma1 */
5e46c3ae
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62 .start = 0x00,
63 .end = 0x1f,
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64 .name = "reserved",
65 .flags = IORESOURCE_BUSY | IORESOURCE_IO,
66 },
67 { /* keyboard */
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68 .start = 0x60,
69 .end = 0x6f,
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70 .name = "reserved",
71 .flags = IORESOURCE_BUSY | IORESOURCE_IO,
72 },
73 { /* dma page reg */
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74 .start = 0x80,
75 .end = 0x8f,
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76 .name = "reserved",
77 .flags = IORESOURCE_BUSY | IORESOURCE_IO,
78 },
79 { /* dma2 */
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80 .start = 0xc0,
81 .end = 0xdf,
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82 .name = "reserved",
83 .flags = IORESOURCE_BUSY | IORESOURCE_IO,
5e46c3ae 84 },
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85};
86
d865bea4
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87void __init plat_time_init(void)
88{
89 setup_pit_timer();
90}
91
2925aba4 92void __init plat_mem_setup(void)
1da177e4 93{
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94 int i;
95
96 _machine_restart = cobalt_machine_restart;
97 _machine_halt = cobalt_machine_halt;
f13558c2 98 pm_power_off = cobalt_machine_halt;
1da177e4 99
56ae5833 100 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
c4ed38a0 101
0cfd5267 102 /* I/O port resource must include LCD/buttons */
c4ed38a0 103 ioport_resource.end = 0x0fffffff;
1da177e4 104
47d7c44b
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105 /* These resources have been reserved by VIA SuperI/O chip. */
106 for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
107 request_resource(&ioport_resource, cobalt_reserved_resources + i);
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108}
109
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110/*
111 * Prom init. We read our one and only communication with the firmware.
c4ed38a0
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112 * Grab the amount of installed memory.
113 * Better boot loaders (CoLo) pass a command line too :-)
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114 */
115
116void __init prom_init(void)
117{
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118 int narg, indx, posn, nchr;
119 unsigned long memsz;
120 char **argv;
1da177e4 121
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122 memsz = fw_arg0 & 0x7fff0000;
123 narg = fw_arg0 & 0x0000ffff;
124
125 if (narg) {
126 arcs_cmdline[0] = '\0';
127 argv = (char **) fw_arg1;
128 posn = 0;
129 for (indx = 1; indx < narg; ++indx) {
130 nchr = strlen(argv[indx]);
131 if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
132 break;
133 if (posn)
134 arcs_cmdline[posn++] = ' ';
135 strcpy(arcs_cmdline + posn, argv[indx]);
136 posn += nchr;
137 }
138 }
139
140 add_memory_region(0x0, memsz, BOOT_MEM_RAM);
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141}
142
c44e8d5e 143void __init prom_free_prom_memory(void)
1da177e4
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144{
145 /* Nothing to do! */
1da177e4 146}
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