MIPS: DECstation HRT initialization rearrangement
[deliverable/linux.git] / arch / mips / dec / ioasic-irq.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * DEC I/O ASIC interrupts.
3 *
4 * Copyright (c) 2002, 2003 Maciej W. Rozycki
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
1da177e4
LT
14#include <linux/types.h>
15
16#include <asm/dec/ioasic.h>
17#include <asm/dec/ioasic_addrs.h>
18#include <asm/dec/ioasic_ints.h>
19
1da177e4
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20static int ioasic_irq_base;
21
009c200a 22static void unmask_ioasic_irq(struct irq_data *d)
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23{
24 u32 simr;
25
26 simr = ioasic_read(IO_REG_SIMR);
009c200a 27 simr |= (1 << (d->irq - ioasic_irq_base));
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28 ioasic_write(IO_REG_SIMR, simr);
29}
30
009c200a 31static void mask_ioasic_irq(struct irq_data *d)
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32{
33 u32 simr;
34
35 simr = ioasic_read(IO_REG_SIMR);
009c200a 36 simr &= ~(1 << (d->irq - ioasic_irq_base));
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37 ioasic_write(IO_REG_SIMR, simr);
38}
39
009c200a 40static void ack_ioasic_irq(struct irq_data *d)
1da177e4 41{
009c200a 42 mask_ioasic_irq(d);
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43 fast_iob();
44}
45
94dee171 46static struct irq_chip ioasic_irq_type = {
70d21cde 47 .name = "IO-ASIC",
009c200a
TG
48 .irq_ack = ack_ioasic_irq,
49 .irq_mask = mask_ioasic_irq,
50 .irq_mask_ack = ack_ioasic_irq,
51 .irq_unmask = unmask_ioasic_irq,
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52};
53
94dee171 54static struct irq_chip ioasic_dma_irq_type = {
70d21cde 55 .name = "IO-ASIC-DMA",
009c200a
TG
56 .irq_ack = ack_ioasic_irq,
57 .irq_mask = mask_ioasic_irq,
58 .irq_mask_ack = ack_ioasic_irq,
59 .irq_unmask = unmask_ioasic_irq,
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60};
61
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62void __init init_ioasic_irqs(int base)
63{
64 int i;
65
66 /* Mask interrupts. */
67 ioasic_write(IO_REG_SIMR, 0);
68 fast_iob();
69
1603b5ac 70 for (i = base; i < base + IO_INR_DMA; i++)
e4ec7989 71 irq_set_chip_and_handler(i, &ioasic_irq_type,
1417836e 72 handle_level_irq);
1603b5ac 73 for (; i < base + IO_IRQ_LINES; i++)
e4ec7989 74 irq_set_chip(i, &ioasic_dma_irq_type);
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75
76 ioasic_irq_base = base;
77}
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