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1da177e4 LT |
1 | /* |
2 | * linux/arch/mips/dec/time.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | |
5 | * Copyright (C) 2000, 2003 Maciej W. Rozycki | |
6 | * | |
7 | * This file contains the time handling details for PC-style clocks as | |
8 | * found in some MIPS systems. | |
9 | * | |
10 | */ | |
11 | #include <linux/bcd.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/mc146818rtc.h> | |
17 | #include <linux/mm.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/param.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/string.h> | |
22 | #include <linux/time.h> | |
23 | #include <linux/types.h> | |
24 | ||
25 | #include <asm/bootinfo.h> | |
26 | #include <asm/cpu.h> | |
1da177e4 LT |
27 | #include <asm/io.h> |
28 | #include <asm/irq.h> | |
29 | #include <asm/mipsregs.h> | |
30 | #include <asm/sections.h> | |
31 | #include <asm/time.h> | |
32 | ||
33 | #include <asm/dec/interrupts.h> | |
34 | #include <asm/dec/ioasic.h> | |
35 | #include <asm/dec/ioasic_addrs.h> | |
36 | #include <asm/dec/machtype.h> | |
37 | ||
4b550488 | 38 | unsigned long read_persistent_clock(void) |
1da177e4 LT |
39 | { |
40 | unsigned int year, mon, day, hour, min, sec, real_year; | |
53c2df2f | 41 | unsigned long flags; |
1da177e4 | 42 | |
53c2df2f | 43 | spin_lock_irqsave(&rtc_lock, flags); |
ddcabb4f | 44 | |
1da177e4 LT |
45 | do { |
46 | sec = CMOS_READ(RTC_SECONDS); | |
47 | min = CMOS_READ(RTC_MINUTES); | |
48 | hour = CMOS_READ(RTC_HOURS); | |
49 | day = CMOS_READ(RTC_DAY_OF_MONTH); | |
50 | mon = CMOS_READ(RTC_MONTH); | |
51 | year = CMOS_READ(RTC_YEAR); | |
ddcabb4f MM |
52 | /* |
53 | * The PROM will reset the year to either '72 or '73. | |
54 | * Therefore we store the real year separately, in one | |
55 | * of unused BBU RAM locations. | |
56 | */ | |
57 | real_year = CMOS_READ(RTC_DEC_YEAR); | |
1da177e4 | 58 | } while (sec != CMOS_READ(RTC_SECONDS)); |
ddcabb4f MM |
59 | |
60 | spin_unlock_irqrestore(&rtc_lock, flags); | |
61 | ||
1da177e4 LT |
62 | if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
63 | sec = BCD2BIN(sec); | |
64 | min = BCD2BIN(min); | |
65 | hour = BCD2BIN(hour); | |
66 | day = BCD2BIN(day); | |
67 | mon = BCD2BIN(mon); | |
68 | year = BCD2BIN(year); | |
69 | } | |
ddcabb4f | 70 | |
1da177e4 LT |
71 | year += real_year - 72 + 2000; |
72 | ||
73 | return mktime(year, mon, day, hour, min, sec); | |
74 | } | |
75 | ||
76 | /* | |
4b550488 | 77 | * In order to set the CMOS clock precisely, rtc_mips_set_mmss has to |
1da177e4 LT |
78 | * be called 500 ms after the second nowtime has started, because when |
79 | * nowtime is written into the registers of the CMOS clock, it will | |
80 | * jump to the next second precisely 500 ms later. Check the Dallas | |
81 | * DS1287 data sheet for details. | |
82 | */ | |
4b550488 | 83 | int rtc_mips_set_mmss(unsigned long nowtime) |
1da177e4 LT |
84 | { |
85 | int retval = 0; | |
86 | int real_seconds, real_minutes, cmos_minutes; | |
87 | unsigned char save_control, save_freq_select; | |
88 | ||
53c2df2f AN |
89 | /* irq are locally disabled here */ |
90 | spin_lock(&rtc_lock); | |
1da177e4 LT |
91 | /* tell the clock it's being set */ |
92 | save_control = CMOS_READ(RTC_CONTROL); | |
93 | CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL); | |
94 | ||
95 | /* stop and reset prescaler */ | |
96 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); | |
97 | CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT); | |
98 | ||
99 | cmos_minutes = CMOS_READ(RTC_MINUTES); | |
100 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) | |
101 | cmos_minutes = BCD2BIN(cmos_minutes); | |
102 | ||
103 | /* | |
104 | * since we're only adjusting minutes and seconds, | |
105 | * don't interfere with hour overflow. This avoids | |
106 | * messing with unknown time zones but requires your | |
107 | * RTC not to be off by more than 15 minutes | |
108 | */ | |
109 | real_seconds = nowtime % 60; | |
110 | real_minutes = nowtime / 60; | |
111 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) | |
112 | real_minutes += 30; /* correct for half hour time zone */ | |
113 | real_minutes %= 60; | |
114 | ||
115 | if (abs(real_minutes - cmos_minutes) < 30) { | |
116 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | |
117 | real_seconds = BIN2BCD(real_seconds); | |
118 | real_minutes = BIN2BCD(real_minutes); | |
119 | } | |
120 | CMOS_WRITE(real_seconds, RTC_SECONDS); | |
121 | CMOS_WRITE(real_minutes, RTC_MINUTES); | |
122 | } else { | |
123 | printk(KERN_WARNING | |
124 | "set_rtc_mmss: can't update from %d to %d\n", | |
125 | cmos_minutes, real_minutes); | |
126 | retval = -1; | |
127 | } | |
128 | ||
129 | /* The following flags have to be released exactly in this order, | |
130 | * otherwise the DS1287 will not reset the oscillator and will not | |
131 | * update precisely 500 ms later. You won't find this mentioned | |
132 | * in the Dallas Semiconductor data sheets, but who believes data | |
133 | * sheets anyway ... -- Markus Kuhn | |
134 | */ | |
135 | CMOS_WRITE(save_control, RTC_CONTROL); | |
136 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); | |
53c2df2f | 137 | spin_unlock(&rtc_lock); |
1da177e4 LT |
138 | |
139 | return retval; | |
140 | } | |
141 | ||
1da177e4 LT |
142 | static int dec_timer_state(void) |
143 | { | |
144 | return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0; | |
145 | } | |
146 | ||
147 | static void dec_timer_ack(void) | |
148 | { | |
149 | CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ | |
150 | } | |
151 | ||
00598560 | 152 | static cycle_t dec_ioasic_hpt_read(void) |
1da177e4 LT |
153 | { |
154 | /* | |
155 | * The free-running counter is 32-bit which is good for about | |
156 | * 2 minutes, 50 seconds at possible count rates of up to 25MHz. | |
157 | */ | |
158 | return ioasic_read(IO_REG_FCTR); | |
159 | } | |
160 | ||
1da177e4 | 161 | |
4b550488 | 162 | void __init plat_time_init(void) |
1da177e4 | 163 | { |
1da177e4 LT |
164 | mips_timer_ack = dec_timer_ack; |
165 | ||
16b7b2ac | 166 | if (!cpu_has_counter && IOASIC) |
1da177e4 | 167 | /* For pre-R4k systems we use the I/O ASIC's counter. */ |
00598560 | 168 | clocksource_mips.read = dec_ioasic_hpt_read; |
1da177e4 LT |
169 | |
170 | /* Set up the rate of periodic DS1287 interrupts. */ | |
1723b4a3 | 171 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); |
1da177e4 LT |
172 | } |
173 | ||
54d0a216 | 174 | void __init plat_timer_setup(struct irqaction *irq) |
1da177e4 LT |
175 | { |
176 | setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); | |
177 | ||
178 | /* Enable periodic DS1287 interrupts. */ | |
179 | CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B); | |
180 | } |