projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 93244945 MC |
1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public | |
| 3 | * License. See the file "COPYING" in the main directory of this archive | |
| 4 | * for more details. | |
| 5 | * | |
| 6 | * Copyright (C) 2014 Imagination Technologies Ltd. | |
| 7 | * | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __ASM_ASM_EVA_H | |
| 11 | #define __ASM_ASM_EVA_H | |
| 12 | ||
| 13 | #ifndef __ASSEMBLY__ | |
| 60cd7e08 MC |
14 | |
| 15 | /* Kernel variants */ | |
| 16 | ||
| 17 | #define kernel_cache(op, base) "cache " op ", " base "\n" | |
| 18 | #define kernel_ll(reg, addr) "ll " reg ", " addr "\n" | |
| 19 | #define kernel_sc(reg, addr) "sc " reg ", " addr "\n" | |
| 20 | #define kernel_lw(reg, addr) "lw " reg ", " addr "\n" | |
| 21 | #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n" | |
| 22 | #define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n" | |
| 23 | #define kernel_lh(reg, addr) "lh " reg ", " addr "\n" | |
| 24 | #define kernel_lb(reg, addr) "lb " reg ", " addr "\n" | |
| 25 | #define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n" | |
| 26 | #define kernel_sw(reg, addr) "sw " reg ", " addr "\n" | |
| 27 | #define kernel_swl(reg, addr) "swl " reg ", " addr "\n" | |
| 28 | #define kernel_swr(reg, addr) "swr " reg ", " addr "\n" | |
| 29 | #define kernel_sh(reg, addr) "sh " reg ", " addr "\n" | |
| 30 | #define kernel_sb(reg, addr) "sb " reg ", " addr "\n" | |
| 31 | ||
| 32 | #ifdef CONFIG_32BIT | |
| 33 | /* | |
| 34 | * No 'sd' or 'ld' instructions in 32-bit but the code will | |
| 35 | * do the correct thing | |
| 36 | */ | |
| 37 | #define kernel_sd(reg, addr) user_sw(reg, addr) | |
| 38 | #define kernel_ld(reg, addr) user_lw(reg, addr) | |
| 39 | #else | |
| 40 | #define kernel_sd(reg, addr) "sd " reg", " addr "\n" | |
| 41 | #define kernel_ld(reg, addr) "ld " reg", " addr "\n" | |
| 42 | #endif /* CONFIG_32BIT */ | |
| 43 | ||
| 93244945 MC |
44 | #ifdef CONFIG_EVA |
| 45 | ||
| 46 | #define __BUILD_EVA_INSN(insn, reg, addr) \ | |
| 47 | " .set push\n" \ | |
| 48 | " .set mips0\n" \ | |
| 49 | " .set eva\n" \ | |
| 50 | " "insn" "reg", "addr "\n" \ | |
| 51 | " .set pop\n" | |
| 52 | ||
| 53 | #define user_cache(op, base) __BUILD_EVA_INSN("cachee", op, base) | |
| 54 | #define user_ll(reg, addr) __BUILD_EVA_INSN("lle", reg, addr) | |
| 55 | #define user_sc(reg, addr) __BUILD_EVA_INSN("sce", reg, addr) | |
| 56 | #define user_lw(reg, addr) __BUILD_EVA_INSN("lwe", reg, addr) | |
| 57 | #define user_lwl(reg, addr) __BUILD_EVA_INSN("lwle", reg, addr) | |
| 58 | #define user_lwr(reg, addr) __BUILD_EVA_INSN("lwre", reg, addr) | |
| 59 | #define user_lh(reg, addr) __BUILD_EVA_INSN("lhe", reg, addr) | |
| 60 | #define user_lb(reg, addr) __BUILD_EVA_INSN("lbe", reg, addr) | |
| 61 | #define user_lbu(reg, addr) __BUILD_EVA_INSN("lbue", reg, addr) | |
| 62 | /* No 64-bit EVA instruction for loading double words */ | |
| 63 | #define user_ld(reg, addr) user_lw(reg, addr) | |
| 64 | #define user_sw(reg, addr) __BUILD_EVA_INSN("swe", reg, addr) | |
| 65 | #define user_swl(reg, addr) __BUILD_EVA_INSN("swle", reg, addr) | |
| 66 | #define user_swr(reg, addr) __BUILD_EVA_INSN("swre", reg, addr) | |
| 67 | #define user_sh(reg, addr) __BUILD_EVA_INSN("she", reg, addr) | |
| 68 | #define user_sb(reg, addr) __BUILD_EVA_INSN("sbe", reg, addr) | |
| 69 | /* No 64-bit EVA instruction for storing double words */ | |
| 70 | #define user_sd(reg, addr) user_sw(reg, addr) | |
| 71 | ||
| 72 | #else | |
| 73 | ||
| 60cd7e08 MC |
74 | #define user_cache(op, base) kernel_cache(op, base) |
| 75 | #define user_ll(reg, addr) kernel_ll(reg, addr) | |
| 76 | #define user_sc(reg, addr) kernel_sc(reg, addr) | |
| 77 | #define user_lw(reg, addr) kernel_lw(reg, addr) | |
| 78 | #define user_lwl(reg, addr) kernel_lwl(reg, addr) | |
| 79 | #define user_lwr(reg, addr) kernel_lwr(reg, addr) | |
| 80 | #define user_lh(reg, addr) kernel_lh(reg, addr) | |
| 81 | #define user_lb(reg, addr) kernel_lb(reg, addr) | |
| 82 | #define user_lbu(reg, addr) kernel_lbu(reg, addr) | |
| 83 | #define user_sw(reg, addr) kernel_sw(reg, addr) | |
| 84 | #define user_swl(reg, addr) kernel_swl(reg, addr) | |
| 85 | #define user_swr(reg, addr) kernel_swr(reg, addr) | |
| 86 | #define user_sh(reg, addr) kernel_sh(reg, addr) | |
| 87 | #define user_sb(reg, addr) kernel_sb(reg, addr) | |
| 93244945 MC |
88 | |
| 89 | #ifdef CONFIG_32BIT | |
| 60cd7e08 MC |
90 | #define user_sd(reg, addr) kernel_sw(reg, addr) |
| 91 | #define user_ld(reg, addr) kernel_lw(reg, addr) | |
| 93244945 | 92 | #else |
| 60cd7e08 MC |
93 | #define user_sd(reg, addr) kernel_sd(reg, addr) |
| 94 | #define user_ld(reg, addr) kernel_ld(reg, addr) | |
| 93244945 MC |
95 | #endif /* CONFIG_32BIT */ |
| 96 | ||
| 97 | #endif /* CONFIG_EVA */ | |
| 98 | ||
| 99 | #else /* __ASSEMBLY__ */ | |
| 100 | ||
| 60cd7e08 MC |
101 | #define kernel_cache(op, base) cache op, base |
| 102 | #define kernel_ll(reg, addr) ll reg, addr | |
| 103 | #define kernel_sc(reg, addr) sc reg, addr | |
| 104 | #define kernel_lw(reg, addr) lw reg, addr | |
| 105 | #define kernel_lwl(reg, addr) lwl reg, addr | |
| 106 | #define kernel_lwr(reg, addr) lwr reg, addr | |
| 107 | #define kernel_lh(reg, addr) lh reg, addr | |
| 108 | #define kernel_lb(reg, addr) lb reg, addr | |
| 109 | #define kernel_lbu(reg, addr) lbu reg, addr | |
| 110 | #define kernel_sw(reg, addr) sw reg, addr | |
| 111 | #define kernel_swl(reg, addr) swl reg, addr | |
| 112 | #define kernel_swr(reg, addr) swr reg, addr | |
| 113 | #define kernel_sh(reg, addr) sh reg, addr | |
| 114 | #define kernel_sb(reg, addr) sb reg, addr | |
| 115 | ||
| 116 | #ifdef CONFIG_32BIT | |
| 117 | /* | |
| 118 | * No 'sd' or 'ld' instructions in 32-bit but the code will | |
| 119 | * do the correct thing | |
| 120 | */ | |
| 121 | #define kernel_sd(reg, addr) user_sw(reg, addr) | |
| 122 | #define kernel_ld(reg, addr) user_lw(reg, addr) | |
| 123 | #else | |
| 124 | #define kernel_sd(reg, addr) sd reg, addr | |
| 125 | #define kernel_ld(reg, addr) ld reg, addr | |
| 126 | #endif /* CONFIG_32BIT */ | |
| 127 | ||
| 93244945 MC |
128 | #ifdef CONFIG_EVA |
| 129 | ||
| 130 | #define __BUILD_EVA_INSN(insn, reg, addr) \ | |
| 131 | .set push; \ | |
| 132 | .set mips0; \ | |
| 133 | .set eva; \ | |
| 134 | insn reg, addr; \ | |
| 135 | .set pop; | |
| 136 | ||
| 137 | #define user_cache(op, base) __BUILD_EVA_INSN(cachee, op, base) | |
| 138 | #define user_ll(reg, addr) __BUILD_EVA_INSN(lle, reg, addr) | |
| 139 | #define user_sc(reg, addr) __BUILD_EVA_INSN(sce, reg, addr) | |
| 140 | #define user_lw(reg, addr) __BUILD_EVA_INSN(lwe, reg, addr) | |
| 141 | #define user_lwl(reg, addr) __BUILD_EVA_INSN(lwle, reg, addr) | |
| 142 | #define user_lwr(reg, addr) __BUILD_EVA_INSN(lwre, reg, addr) | |
| 143 | #define user_lh(reg, addr) __BUILD_EVA_INSN(lhe, reg, addr) | |
| 144 | #define user_lb(reg, addr) __BUILD_EVA_INSN(lbe, reg, addr) | |
| 145 | #define user_lbu(reg, addr) __BUILD_EVA_INSN(lbue, reg, addr) | |
| 146 | /* No 64-bit EVA instruction for loading double words */ | |
| 147 | #define user_ld(reg, addr) user_lw(reg, addr) | |
| 148 | #define user_sw(reg, addr) __BUILD_EVA_INSN(swe, reg, addr) | |
| 149 | #define user_swl(reg, addr) __BUILD_EVA_INSN(swle, reg, addr) | |
| 150 | #define user_swr(reg, addr) __BUILD_EVA_INSN(swre, reg, addr) | |
| 151 | #define user_sh(reg, addr) __BUILD_EVA_INSN(she, reg, addr) | |
| 152 | #define user_sb(reg, addr) __BUILD_EVA_INSN(sbe, reg, addr) | |
| 153 | /* No 64-bit EVA instruction for loading double words */ | |
| 154 | #define user_sd(reg, addr) user_sw(reg, addr) | |
| 155 | #else | |
| 156 | ||
| 60cd7e08 MC |
157 | #define user_cache(op, base) kernel_cache(op, base) |
| 158 | #define user_ll(reg, addr) kernel_ll(reg, addr) | |
| 159 | #define user_sc(reg, addr) kernel_sc(reg, addr) | |
| 160 | #define user_lw(reg, addr) kernel_lw(reg, addr) | |
| 161 | #define user_lwl(reg, addr) kernel_lwl(reg, addr) | |
| 162 | #define user_lwr(reg, addr) kernel_lwr(reg, addr) | |
| 163 | #define user_lh(reg, addr) kernel_lh(reg, addr) | |
| 164 | #define user_lb(reg, addr) kernel_lb(reg, addr) | |
| 165 | #define user_lbu(reg, addr) kernel_lbu(reg, addr) | |
| 166 | #define user_sw(reg, addr) kernel_sw(reg, addr) | |
| 167 | #define user_swl(reg, addr) kernel_swl(reg, addr) | |
| 168 | #define user_swr(reg, addr) kernel_swr(reg, addr) | |
| 169 | #define user_sh(reg, addr) kernel_sh(reg, addr) | |
| 170 | #define user_sb(reg, addr) kernel_sb(reg, addr) | |
| 93244945 MC |
171 | |
| 172 | #ifdef CONFIG_32BIT | |
| 60cd7e08 MC |
173 | #define user_sd(reg, addr) kernel_sw(reg, addr) |
| 174 | #define user_ld(reg, addr) kernel_lw(reg, addr) | |
| 93244945 | 175 | #else |
| 60cd7e08 MC |
176 | #define user_sd(reg, addr) kernel_sd(reg, addr) |
| 177 | #define user_ld(reg, addr) kernel_sd(reg, addr) | |
| 93244945 MC |
178 | #endif /* CONFIG_32BIT */ |
| 179 | ||
| 180 | #endif /* CONFIG_EVA */ | |
| 181 | ||
| 182 | #endif /* __ASSEMBLY__ */ | |
| 183 | ||
| 184 | #endif /* __ASM_ASM_EVA_H */ |