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1da177e4 LT |
1 | /* |
2 | * include/asm-mips/dec/kn02ba.h | |
3 | * | |
4 | * DECstation 5000/1xx (3min or KN02-BA) definitions. | |
5 | * | |
6 | * Copyright (C) 2002, 2003 Maciej W. Rozycki | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * as published by the Free Software Foundation; either version | |
11 | * 2 of the License, or (at your option) any later version. | |
12 | */ | |
13 | #ifndef __ASM_MIPS_DEC_KN02BA_H | |
14 | #define __ASM_MIPS_DEC_KN02BA_H | |
15 | ||
16 | #include <asm/dec/kn02xa.h> /* For common definitions. */ | |
17 | ||
18 | /* | |
19 | * CPU interrupt bits. | |
20 | */ | |
21 | #define KN02BA_CPU_INR_HALT 6 /* HALT button */ | |
22 | #define KN02BA_CPU_INR_CASCADE 5 /* I/O ASIC cascade */ | |
23 | #define KN02BA_CPU_INR_TC2 4 /* TURBOchannel slot #2 */ | |
24 | #define KN02BA_CPU_INR_TC1 3 /* TURBOchannel slot #1 */ | |
25 | #define KN02BA_CPU_INR_TC0 2 /* TURBOchannel slot #0 */ | |
26 | ||
27 | /* | |
28 | * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits. | |
29 | */ | |
30 | #define KN02BA_IO_INR_RES_15 15 /* unused */ | |
31 | #define KN02BA_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */ | |
32 | #define KN02BA_IO_INR_RES_13 13 /* unused */ | |
33 | #define KN02BA_IO_INR_BUS 12 /* memory, I/O bus read/write errors */ | |
34 | #define KN02BA_IO_INR_RES_11 11 /* unused */ | |
35 | #define KN02BA_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */ | |
36 | #define KN02BA_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */ | |
37 | #define KN02BA_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */ | |
38 | #define KN02BA_IO_INR_SCC1 7 /* SCC (Z85C30) serial #1 */ | |
39 | #define KN02BA_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */ | |
40 | #define KN02BA_IO_INR_RTC 5 /* DS1287 RTC */ | |
41 | #define KN02BA_IO_INR_PSU 4 /* power supply unit warning */ | |
42 | #define KN02BA_IO_INR_RES_3 3 /* unused */ | |
43 | #define KN02BA_IO_INR_ASC_DATA 2 /* SCSI data ready (for PIO) */ | |
44 | #define KN02BA_IO_INR_PBNC 1 /* ~HALT button debouncer */ | |
45 | #define KN02BA_IO_INR_PBNO 0 /* HALT button debouncer */ | |
46 | ||
47 | ||
48 | /* | |
49 | * Memory Error Register bits. | |
50 | */ | |
51 | #define KN02BA_MER_RES_27 (1<<27) /* unused */ | |
52 | ||
53 | /* | |
54 | * Memory Size Register bits. | |
55 | */ | |
56 | #define KN02BA_MSR_RES_17 (0x3ff<<17) /* unused */ | |
57 | ||
58 | /* | |
59 | * I/O ASIC System Support Register bits. | |
60 | */ | |
61 | #define KN02BA_IO_SSR_TXDIS1 (1<<14) /* SCC1 transmit disable */ | |
62 | #define KN02BA_IO_SSR_TXDIS0 (1<<13) /* SCC0 transmit disable */ | |
63 | #define KN02BA_IO_SSR_RES_12 (1<<12) /* unused */ | |
64 | ||
65 | #define KN02BA_IO_SSR_LEDS (0xff<<0) /* ~diagnostic LEDs */ | |
66 | ||
67 | #endif /* __ASM_MIPS_DEC_KN02BA_H */ |