[deliverable/linux.git] / arch / mips / include / asm / octeon / octeon-feature.h

/***********************license start***************
 * Author: Cavium Networks
 *
 * Contact: support@caviumnetworks.com
 * This file is part of the OCTEON SDK
 *
 * Copyright (c) 2003-2008 Cavium Networks
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 *
 * This file is distributed in the hope that it will be useful, but
 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 * NONINFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this file; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 * or visit http://www.gnu.org/licenses/.
 *
 * This file may also be available under a different license from Cavium.
 * Contact Cavium Networks for more information
 ***********************license end**************************************/

/*
 * File defining checks for different Octeon features.
 */

#ifndef __OCTEON_FEATURE_H__
#define __OCTEON_FEATURE_H__
#include <asm/octeon/cvmx-mio-defs.h>
#include <asm/octeon/cvmx-rnm-defs.h>

enum octeon_feature {
	/* CN68XX uses port kinds for packet interface */
	OCTEON_FEATURE_PKND,
	/* CN68XX has different fields in word0 - word2 */
	OCTEON_FEATURE_CN68XX_WQE,
	/*
	 * Octeon models in the CN5XXX family and higher support
	 * atomic add instructions to memory (saa/saad).
	 */
	OCTEON_FEATURE_SAAD,
	/* Does this Octeon support the ZIP offload engine? */
	OCTEON_FEATURE_ZIP,
	OCTEON_FEATURE_DORM_CRYPTO,
	/* Does this Octeon support PCI express? */
	OCTEON_FEATURE_PCIE,
	/* Does this Octeon support SRIOs */
	OCTEON_FEATURE_SRIO,
	/*  Does this Octeon support Interlaken */
	OCTEON_FEATURE_ILK,
	/* Some Octeon models support internal memory for storing
	 * cryptographic keys */
	OCTEON_FEATURE_KEY_MEMORY,
	/* Octeon has a LED controller for banks of external LEDs */
	OCTEON_FEATURE_LED_CONTROLLER,
	/* Octeon has a trace buffer */
	OCTEON_FEATURE_TRA,
	/* Octeon has a management port */
	OCTEON_FEATURE_MGMT_PORT,
	/* Octeon has a raid unit */
	OCTEON_FEATURE_RAID,
	/* Octeon has a builtin USB */
	OCTEON_FEATURE_USB,
	/* Octeon IPD can run without using work queue entries */
	OCTEON_FEATURE_NO_WPTR,
	/* Octeon has DFA state machines */
	OCTEON_FEATURE_DFA,
	/* Octeon MDIO block supports clause 45 transactions for 10
	 * Gig support */
	OCTEON_FEATURE_MDIO_CLAUSE_45,
	/*
	 *  CN52XX and CN56XX used a block named NPEI for PCIe
	 *  access. Newer chips replaced this with SLI+DPI.
	 */
	OCTEON_FEATURE_NPEI,
	OCTEON_FEATURE_HFA,
	OCTEON_FEATURE_DFM,
	OCTEON_FEATURE_CIU2,
	OCTEON_MAX_FEATURE
};

enum octeon_feature_bits {
	OCTEON_HAS_CRYPTO = 0x0001,	/* Crypto acceleration using COP2 */
};
extern enum octeon_feature_bits __octeon_feature_bits;

/**
 * octeon_has_crypto() - Check if this OCTEON has crypto acceleration support.
 *
 * Returns: Non-zero if the feature exists. Zero if the feature does not exist.
 */
static inline int octeon_has_crypto(void)
{
	return __octeon_feature_bits & OCTEON_HAS_CRYPTO;
}

/**
 * Determine if the current Octeon supports a specific feature. These
 * checks have been optimized to be fairly quick, but they should still
 * be kept out of fast path code.
 *
 * @feature: Feature to check for. This should always be a constant so the
 *		  compiler can remove the switch statement through optimization.
 *
 * Returns Non zero if the feature exists. Zero if the feature does not
 *	   exist.
 */
static inline int octeon_has_feature(enum octeon_feature feature)
{
	switch (feature) {
	case OCTEON_FEATURE_SAAD:
		return !OCTEON_IS_MODEL(OCTEON_CN3XXX);

	case OCTEON_FEATURE_DORM_CRYPTO:
		if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
			union cvmx_mio_fus_dat2 fus_2;
			fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
			return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto;
		} else {
			return 0;
		}

	case OCTEON_FEATURE_PCIE:
		return OCTEON_IS_MODEL(OCTEON_CN56XX)
			|| OCTEON_IS_MODEL(OCTEON_CN52XX)
			|| OCTEON_IS_MODEL(OCTEON_CN6XXX);

	case OCTEON_FEATURE_SRIO:
		return OCTEON_IS_MODEL(OCTEON_CN63XX)
			|| OCTEON_IS_MODEL(OCTEON_CN66XX);

	case OCTEON_FEATURE_ILK:
		return (OCTEON_IS_MODEL(OCTEON_CN68XX));

	case OCTEON_FEATURE_KEY_MEMORY:
		return OCTEON_IS_MODEL(OCTEON_CN38XX)
			|| OCTEON_IS_MODEL(OCTEON_CN58XX)
			|| OCTEON_IS_MODEL(OCTEON_CN56XX)
			|| OCTEON_IS_MODEL(OCTEON_CN6XXX);

	case OCTEON_FEATURE_LED_CONTROLLER:
		return OCTEON_IS_MODEL(OCTEON_CN38XX)
			|| OCTEON_IS_MODEL(OCTEON_CN58XX)
			|| OCTEON_IS_MODEL(OCTEON_CN56XX);

	case OCTEON_FEATURE_TRA:
		return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
			 || OCTEON_IS_MODEL(OCTEON_CN50XX));
	case OCTEON_FEATURE_MGMT_PORT:
		return OCTEON_IS_MODEL(OCTEON_CN56XX)
			|| OCTEON_IS_MODEL(OCTEON_CN52XX)
			|| OCTEON_IS_MODEL(OCTEON_CN6XXX);

	case OCTEON_FEATURE_RAID:
		return OCTEON_IS_MODEL(OCTEON_CN56XX)
			|| OCTEON_IS_MODEL(OCTEON_CN52XX)
			|| OCTEON_IS_MODEL(OCTEON_CN6XXX);

	case OCTEON_FEATURE_USB:
		return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
			 || OCTEON_IS_MODEL(OCTEON_CN58XX));

	case OCTEON_FEATURE_NO_WPTR:
		return (OCTEON_IS_MODEL(OCTEON_CN56XX)
			|| OCTEON_IS_MODEL(OCTEON_CN52XX)
			|| OCTEON_IS_MODEL(OCTEON_CN6XXX))
			  && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
			  && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);

	case OCTEON_FEATURE_MDIO_CLAUSE_45:
		return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
			 || OCTEON_IS_MODEL(OCTEON_CN58XX)
			 || OCTEON_IS_MODEL(OCTEON_CN50XX));

	case OCTEON_FEATURE_NPEI:
		return OCTEON_IS_MODEL(OCTEON_CN56XX)
			|| OCTEON_IS_MODEL(OCTEON_CN52XX);

	case OCTEON_FEATURE_PKND:
		return OCTEON_IS_MODEL(OCTEON_CN68XX);

	case OCTEON_FEATURE_CN68XX_WQE:
		return OCTEON_IS_MODEL(OCTEON_CN68XX);

	case OCTEON_FEATURE_CIU2:
		return OCTEON_IS_MODEL(OCTEON_CN68XX);

	default:
		break;
	}
	return 0;
}

#endif /* __OCTEON_FEATURE_H__ */
Commit	Line	Data
58f07778 DD	1	/*********************license start*************
	2	* Author: Cavium Networks
	3	*
	4	* Contact: support@caviumnetworks.com
	5	* This file is part of the OCTEON SDK
	6	*
	7	* Copyright (c) 2003-2008 Cavium Networks
	8	*
	9	* This file is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License, Version 2, as
	11	* published by the Free Software Foundation.
	12	*
	13	* This file is distributed in the hope that it will be useful, but
	14	* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
	15	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
	16	* NONINFRINGEMENT. See the GNU General Public License for more
	17	* details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this file; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	22	* or visit http://www.gnu.org/licenses/.
	23	*
	24	* This file may also be available under a different license from Cavium.
	25	* Contact Cavium Networks for more information
	26	*********************license end************************************/
	27
	28	/*
	29	* File defining checks for different Octeon features.
	30	*/
	31
	32	#ifndef __OCTEON_FEATURE_H__
	33	#define __OCTEON_FEATURE_H__
26afc5e3 DD	34	#include <asm/octeon/cvmx-mio-defs.h>
26afc5e3 DD	35	#include <asm/octeon/cvmx-rnm-defs.h>
58f07778 DD	36
58f07778 DD	37	enum octeon_feature {
70342287	38	/* CN68XX uses port kinds for packet interface */
26afc5e3 DD	39	OCTEON_FEATURE_PKND,
	40	/* CN68XX has different fields in word0 - word2 */
	41	OCTEON_FEATURE_CN68XX_WQE,
58f07778 DD	42	/*
	43	* Octeon models in the CN5XXX family and higher support
	44	* atomic add instructions to memory (saa/saad).
	45	*/
	46	OCTEON_FEATURE_SAAD,
	47	/* Does this Octeon support the ZIP offload engine? */
	48	OCTEON_FEATURE_ZIP,
26afc5e3	49	OCTEON_FEATURE_DORM_CRYPTO,
58f07778 DD	50	/* Does this Octeon support PCI express? */
58f07778 DD	51	OCTEON_FEATURE_PCIE,
70342287	52	/* Does this Octeon support SRIOs */
26afc5e3 DD	53	OCTEON_FEATURE_SRIO,
	54	/* Does this Octeon support Interlaken */
	55	OCTEON_FEATURE_ILK,
58f07778 DD	56	/* Some Octeon models support internal memory for storing
	57	* cryptographic keys */
	58	OCTEON_FEATURE_KEY_MEMORY,
	59	/* Octeon has a LED controller for banks of external LEDs */
	60	OCTEON_FEATURE_LED_CONTROLLER,
	61	/* Octeon has a trace buffer */
	62	OCTEON_FEATURE_TRA,
	63	/* Octeon has a management port */
	64	OCTEON_FEATURE_MGMT_PORT,
	65	/* Octeon has a raid unit */
	66	OCTEON_FEATURE_RAID,
	67	/* Octeon has a builtin USB */
	68	OCTEON_FEATURE_USB,
f1f1f590 DD	69	/* Octeon IPD can run without using work queue entries */
	70	OCTEON_FEATURE_NO_WPTR,
	71	/* Octeon has DFA state machines */
	72	OCTEON_FEATURE_DFA,
	73	/* Octeon MDIO block supports clause 45 transactions for 10
	74	* Gig support */
	75	OCTEON_FEATURE_MDIO_CLAUSE_45,
70342287	76	/*
26afc5e3 DD	77	* CN52XX and CN56XX used a block named NPEI for PCIe
	78	* access. Newer chips replaced this with SLI+DPI.
	79	*/
	80	OCTEON_FEATURE_NPEI,
	81	OCTEON_FEATURE_HFA,
	82	OCTEON_FEATURE_DFM,
	83	OCTEON_FEATURE_CIU2,
	84	OCTEON_MAX_FEATURE
58f07778 DD	85	};
58f07778 DD	86
011f3c6c AK	87	enum octeon_feature_bits {
	88	OCTEON_HAS_CRYPTO = 0x0001, /* Crypto acceleration using COP2 */
	89	};
	90	extern enum octeon_feature_bits __octeon_feature_bits;
	91
	92	/**
	93	* octeon_has_crypto() - Check if this OCTEON has crypto acceleration support.
	94	*
	95	* Returns: Non-zero if the feature exists. Zero if the feature does not exist.
	96	*/
	97	static inline int octeon_has_crypto(void)
	98	{
	99	return __octeon_feature_bits & OCTEON_HAS_CRYPTO;
	100	}
	101
58f07778 DD	102	/**
	103	* Determine if the current Octeon supports a specific feature. These
	104	* checks have been optimized to be fairly quick, but they should still
	105	* be kept out of fast path code.
	106	*
	107	* @feature: Feature to check for. This should always be a constant so the
70342287	108	* compiler can remove the switch statement through optimization.
58f07778 DD	109	*
58f07778 DD	110	* Returns Non zero if the feature exists. Zero if the feature does not
70342287	111	* exist.
58f07778 DD	112	*/
	113	static inline int octeon_has_feature(enum octeon_feature feature)
	114	{
	115	switch (feature) {
	116	case OCTEON_FEATURE_SAAD:
	117	return !OCTEON_IS_MODEL(OCTEON_CN3XXX);
	118
26afc5e3 DD	119	case OCTEON_FEATURE_DORM_CRYPTO:
	120	if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
	121	union cvmx_mio_fus_dat2 fus_2;
	122	fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
	123	return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto;
	124	} else {
	125	return 0;
	126	}
58f07778 DD	127
	128	case OCTEON_FEATURE_PCIE:
	129	return OCTEON_IS_MODEL(OCTEON_CN56XX)
26afc5e3 DD	130	\|\| OCTEON_IS_MODEL(OCTEON_CN52XX)
	131	\|\| OCTEON_IS_MODEL(OCTEON_CN6XXX);
	132
	133	case OCTEON_FEATURE_SRIO:
	134	return OCTEON_IS_MODEL(OCTEON_CN63XX)
	135	\|\| OCTEON_IS_MODEL(OCTEON_CN66XX);
	136
	137	case OCTEON_FEATURE_ILK:
	138	return (OCTEON_IS_MODEL(OCTEON_CN68XX));
58f07778 DD	139
58f07778 DD	140	case OCTEON_FEATURE_KEY_MEMORY:
26afc5e3 DD	141	return OCTEON_IS_MODEL(OCTEON_CN38XX)
	142	\|\| OCTEON_IS_MODEL(OCTEON_CN58XX)
	143	\|\| OCTEON_IS_MODEL(OCTEON_CN56XX)
	144	\|\| OCTEON_IS_MODEL(OCTEON_CN6XXX);
	145
58f07778 DD	146	case OCTEON_FEATURE_LED_CONTROLLER:
	147	return OCTEON_IS_MODEL(OCTEON_CN38XX)
	148	\|\| OCTEON_IS_MODEL(OCTEON_CN58XX)
	149	\|\| OCTEON_IS_MODEL(OCTEON_CN56XX);
26afc5e3	150
58f07778 DD	151	case OCTEON_FEATURE_TRA:
	152	return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
	153	\|\| OCTEON_IS_MODEL(OCTEON_CN50XX));
26afc5e3 DD	154	case OCTEON_FEATURE_MGMT_PORT:
	155	return OCTEON_IS_MODEL(OCTEON_CN56XX)
	156	\|\| OCTEON_IS_MODEL(OCTEON_CN52XX)
	157	\|\| OCTEON_IS_MODEL(OCTEON_CN6XXX);
	158
	159	case OCTEON_FEATURE_RAID:
	160	return OCTEON_IS_MODEL(OCTEON_CN56XX)
	161	\|\| OCTEON_IS_MODEL(OCTEON_CN52XX)
	162	\|\| OCTEON_IS_MODEL(OCTEON_CN6XXX);
	163
58f07778 DD	164	case OCTEON_FEATURE_USB:
	165	return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
	166	\|\| OCTEON_IS_MODEL(OCTEON_CN58XX));
26afc5e3	167
f1f1f590 DD	168	case OCTEON_FEATURE_NO_WPTR:
f1f1f590 DD	169	return (OCTEON_IS_MODEL(OCTEON_CN56XX)
26afc5e3 DD	170	\|\| OCTEON_IS_MODEL(OCTEON_CN52XX)
	171	\|\| OCTEON_IS_MODEL(OCTEON_CN6XXX))
	172	&& !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
	173	&& !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);
	174
f1f1f590 DD	175	case OCTEON_FEATURE_MDIO_CLAUSE_45:
	176	return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
	177	\|\| OCTEON_IS_MODEL(OCTEON_CN58XX)
	178	\|\| OCTEON_IS_MODEL(OCTEON_CN50XX));
26afc5e3 DD	179
	180	case OCTEON_FEATURE_NPEI:
	181	return OCTEON_IS_MODEL(OCTEON_CN56XX)
	182	\|\| OCTEON_IS_MODEL(OCTEON_CN52XX);
	183
	184	case OCTEON_FEATURE_PKND:
	185	return OCTEON_IS_MODEL(OCTEON_CN68XX);
	186
	187	case OCTEON_FEATURE_CN68XX_WQE:
	188	return OCTEON_IS_MODEL(OCTEON_CN68XX);
	189
	190	case OCTEON_FEATURE_CIU2:
	191	return OCTEON_IS_MODEL(OCTEON_CN68XX);
	192
	193	default:
	194	break;
58f07778 DD	195	}
	196	return 0;
	197	}
	198
	199	#endif /* __OCTEON_FEATURE_H__ */