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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | */ | |
9 | #ifndef _ASM_PAGE_H | |
10 | #define _ASM_PAGE_H | |
11 | ||
1da177e4 | 12 | #include <spaces.h> |
99502d94 | 13 | #include <linux/const.h> |
75b5b5e0 LY |
14 | #include <linux/kernel.h> |
15 | #include <asm/mipsregs.h> | |
1da177e4 | 16 | |
1da177e4 LT |
17 | /* |
18 | * PAGE_SHIFT determines the page size | |
19 | */ | |
20 | #ifdef CONFIG_PAGE_SIZE_4KB | |
21 | #define PAGE_SHIFT 12 | |
22 | #endif | |
23 | #ifdef CONFIG_PAGE_SIZE_8KB | |
24 | #define PAGE_SHIFT 13 | |
25 | #endif | |
26 | #ifdef CONFIG_PAGE_SIZE_16KB | |
27 | #define PAGE_SHIFT 14 | |
28 | #endif | |
c52399be RB |
29 | #ifdef CONFIG_PAGE_SIZE_32KB |
30 | #define PAGE_SHIFT 15 | |
31 | #endif | |
1da177e4 LT |
32 | #ifdef CONFIG_PAGE_SIZE_64KB |
33 | #define PAGE_SHIFT 16 | |
34 | #endif | |
99502d94 | 35 | #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) |
800dc4f4 | 36 | #define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) |
1da177e4 | 37 | |
75b5b5e0 LY |
38 | /* |
39 | * This is used for calculating the real page sizes | |
91ff7ac0 | 40 | * for FTLB or VTLB + FTLB configurations. |
75b5b5e0 LY |
41 | */ |
42 | static inline unsigned int page_size_ftlb(unsigned int mmuextdef) | |
43 | { | |
44 | switch (mmuextdef) { | |
45 | case MIPS_CONF4_MMUEXTDEF_FTLBSIZEEXT: | |
46 | if (PAGE_SIZE == (1 << 30)) | |
47 | return 5; | |
48 | if (PAGE_SIZE == (1llu << 32)) | |
49 | return 6; | |
50 | if (PAGE_SIZE > (256 << 10)) | |
51 | return 7; /* reserved */ | |
52 | /* fall through */ | |
53 | case MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT: | |
54 | return (PAGE_SHIFT - 10) / 2; | |
55 | default: | |
56 | panic("Invalid FTLB configuration with Conf4_mmuextdef=%d value\n", | |
57 | mmuextdef >> 14); | |
58 | } | |
59 | } | |
60 | ||
aa1762f4 | 61 | #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT |
dd794392 | 62 | #define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3) |
99502d94 | 63 | #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) |
dd794392 DD |
64 | #define HPAGE_MASK (~(HPAGE_SIZE - 1)) |
65 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) | |
aa1762f4 | 66 | #else /* !CONFIG_MIPS_HUGE_TLB_SUPPORT */ |
f467e4bf HD |
67 | #define HPAGE_SHIFT ({BUILD_BUG(); 0; }) |
68 | #define HPAGE_SIZE ({BUILD_BUG(); 0; }) | |
69 | #define HPAGE_MASK ({BUILD_BUG(); 0; }) | |
70 | #define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; }) | |
aa1762f4 | 71 | #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ |
dd794392 | 72 | |
41b0483e | 73 | #include <linux/pfn.h> |
6f284a2c | 74 | |
c29d1503 DV |
75 | extern void build_clear_page(void); |
76 | extern void build_copy_page(void); | |
77 | ||
6f284a2c FBH |
78 | /* |
79 | * It's normally defined only for FLATMEM config but it's | |
80 | * used in our early mem init code for all memory models. | |
81 | * So always define it. | |
82 | */ | |
83 | #define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET) | |
84 | ||
1da177e4 LT |
85 | extern void clear_page(void * page); |
86 | extern void copy_page(void * to, void * from); | |
87 | ||
88 | extern unsigned long shm_align_mask; | |
89 | ||
90 | static inline unsigned long pages_do_alias(unsigned long addr1, | |
91 | unsigned long addr2) | |
92 | { | |
93 | return (addr1 ^ addr2) & shm_align_mask; | |
94 | } | |
95 | ||
96 | struct page; | |
97 | ||
98 | static inline void clear_user_page(void *addr, unsigned long vaddr, | |
99 | struct page *page) | |
100 | { | |
101 | extern void (*flush_data_cache_page)(unsigned long addr); | |
102 | ||
103 | clear_page(addr); | |
585fa724 | 104 | if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK)) |
1da177e4 LT |
105 | flush_data_cache_page((unsigned long)addr); |
106 | } | |
107 | ||
bcd02280 AN |
108 | struct vm_area_struct; |
109 | extern void copy_user_highpage(struct page *to, struct page *from, | |
110 | unsigned long vaddr, struct vm_area_struct *vma); | |
1da177e4 | 111 | |
bcd02280 | 112 | #define __HAVE_ARCH_COPY_USER_HIGHPAGE |
1da177e4 LT |
113 | |
114 | /* | |
115 | * These are used to make use of C type-checking.. | |
116 | */ | |
34adb28d | 117 | #ifdef CONFIG_PHYS_ADDR_T_64BIT |
ec917c2c | 118 | #ifdef CONFIG_CPU_MIPS32 |
1da177e4 | 119 | typedef struct { unsigned long pte_low, pte_high; } pte_t; |
70342287 RB |
120 | #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) |
121 | #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) | |
1da177e4 LT |
122 | #else |
123 | typedef struct { unsigned long long pte; } pte_t; | |
70342287 | 124 | #define pte_val(x) ((x).pte) |
d34555fb | 125 | #define __pte(x) ((pte_t) { (x) } ) |
1da177e4 LT |
126 | #endif |
127 | #else | |
128 | typedef struct { unsigned long pte; } pte_t; | |
129 | #define pte_val(x) ((x).pte) | |
c6e8b587 | 130 | #define __pte(x) ((pte_t) { (x) } ) |
d34555fb | 131 | #endif |
2f569afd | 132 | typedef struct page *pgtable_t; |
1da177e4 | 133 | |
c6e8b587 RB |
134 | /* |
135 | * Right now we don't support 4-level pagetables, so all pud-related | |
136 | * definitions come from <asm-generic/pgtable-nopud.h>. | |
137 | */ | |
138 | ||
139 | /* | |
140 | * Finall the top of the hierarchy, the pgd | |
141 | */ | |
142 | typedef struct { unsigned long pgd; } pgd_t; | |
143 | #define pgd_val(x) ((x).pgd) | |
1da177e4 | 144 | #define __pgd(x) ((pgd_t) { (x) } ) |
c6e8b587 RB |
145 | |
146 | /* | |
147 | * Manipulate page protection bits | |
148 | */ | |
149 | typedef struct { unsigned long pgprot; } pgprot_t; | |
150 | #define pgprot_val(x) ((x).pgprot) | |
1da177e4 LT |
151 | #define __pgprot(x) ((pgprot_t) { (x) } ) |
152 | ||
c6e8b587 RB |
153 | /* |
154 | * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd | |
155 | * pair of pages we only have a single global bit per pair of pages. When | |
156 | * writing to the TLB make sure we always have the bit set for both pages | |
157 | * or none. This macro is used to access the `buddy' of the pte we're just | |
158 | * working on. | |
159 | */ | |
160 | #define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) | |
161 | ||
6f284a2c FBH |
162 | /* |
163 | * __pa()/__va() should be used only during mem init. | |
164 | */ | |
0d8d83d0 PB |
165 | static inline unsigned long ___pa(unsigned long x) |
166 | { | |
167 | if (config_enabled(CONFIG_64BIT)) { | |
168 | /* | |
169 | * For MIPS64 the virtual address may either be in one of | |
170 | * the compatibility segements ckseg0 or ckseg1, or it may | |
171 | * be in xkphys. | |
172 | */ | |
173 | return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); | |
174 | } | |
175 | ||
176 | if (!config_enabled(CONFIG_EVA)) { | |
177 | /* | |
178 | * We're using the standard MIPS32 legacy memory map, ie. | |
179 | * the address x is going to be in kseg0 or kseg1. We can | |
180 | * handle either case by masking out the desired bits using | |
181 | * CPHYSADDR. | |
182 | */ | |
183 | return CPHYSADDR(x); | |
184 | } | |
185 | ||
186 | /* | |
187 | * EVA is in use so the memory map could be anything, making it not | |
188 | * safe to just mask out bits. | |
189 | */ | |
190 | return x - PAGE_OFFSET + PHYS_OFFSET; | |
191 | } | |
192 | #define __pa(x) ___pa((unsigned long)(x)) | |
6f284a2c | 193 | #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) |
49c426ba | 194 | #include <asm/io.h> |
5707bf6b RB |
195 | |
196 | /* | |
197 | * RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad | |
198 | * (lmo) rsp. 8431fd094d625b94d364fe393076ccef88e6ce18 (kernel.org). The | |
199 | * discussion can be found in lkml posting | |
200 | * <a2ebde260608230500o3407b108hc03debb9da6e62c@mail.gmail.com> which is | |
201 | * archived at http://lists.linuxcoding.com/kernel/2006-q3/msg17360.html | |
202 | * | |
203 | * It is unclear if the misscompilations mentioned in | |
204 | * http://lkml.org/lkml/2010/8/8/138 also affect MIPS so we keep this one | |
205 | * until GCC 3.x has been retired before we can apply | |
206 | * https://patchwork.linux-mips.org/patch/1541/ | |
207 | */ | |
208 | ||
27b3db20 | 209 | #ifndef __pa_symbol |
21a151d8 | 210 | #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) |
27b3db20 | 211 | #endif |
1da177e4 LT |
212 | |
213 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) | |
214 | ||
e53639d8 RB |
215 | #ifdef CONFIG_FLATMEM |
216 | ||
8b923214 RB |
217 | static inline int pfn_valid(unsigned long pfn) |
218 | { | |
219 | /* avoid <linux/mm.h> include hell */ | |
220 | extern unsigned long max_mapnr; | |
95486e49 | 221 | unsigned long pfn_offset = ARCH_PFN_OFFSET; |
8b923214 | 222 | |
95486e49 | 223 | return pfn >= pfn_offset && pfn < max_mapnr; |
8b923214 | 224 | } |
e53639d8 | 225 | |
7de58fab AN |
226 | #elif defined(CONFIG_SPARSEMEM) |
227 | ||
228 | /* pfn_valid is defined in linux/mmzone.h */ | |
229 | ||
e53639d8 RB |
230 | #elif defined(CONFIG_NEED_MULTIPLE_NODES) |
231 | ||
232 | #define pfn_valid(pfn) \ | |
233 | ({ \ | |
234 | unsigned long __pfn = (pfn); \ | |
235 | int __n = pfn_to_nid(__pfn); \ | |
236 | ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \ | |
70342287 RB |
237 | NODE_DATA(__n)->node_spanned_pages) \ |
238 | : 0); \ | |
e53639d8 RB |
239 | }) |
240 | ||
e53639d8 RB |
241 | #endif |
242 | ||
4d5b3bdc ZLK |
243 | #define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys((void *) \ |
244 | (kaddr)))) | |
d3ce8843 RB |
245 | |
246 | extern int __virt_addr_valid(const volatile void *kaddr); | |
247 | #define virt_addr_valid(kaddr) \ | |
248 | __virt_addr_valid((const volatile void *) (kaddr)) | |
1da177e4 | 249 | |
1a770b85 PB |
250 | #define VM_DATA_DEFAULT_FLAGS \ |
251 | (VM_READ | VM_WRITE | \ | |
252 | ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \ | |
253 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | |
1da177e4 | 254 | |
ed3ce16c LY |
255 | #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) |
256 | #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) | |
1da177e4 | 257 | |
a02036e7 | 258 | #include <asm-generic/memory_model.h> |
5b17e1cd | 259 | #include <asm-generic/getorder.h> |
fd4fd5aa | 260 | |
1da177e4 | 261 | #endif /* _ASM_PAGE_H */ |