[deliverable/linux.git] / arch / mips / kernel / genex.S

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 * Copyright (C) 2001 MIPS Technologies, Inc.
 * Copyright (C) 2002 Maciej W. Rozycki
 */
#include <linux/config.h>
#include <linux/init.h>

#include <asm/asm.h>
#include <asm/cacheops.h>
#include <asm/regdef.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/war.h>

#define PANIC_PIC(msg)					\
		.set push;				\
		.set	reorder;			\
		PTR_LA	a0,8f;				\
		.set	noat;				\
		PTR_LA	AT, panic;			\
		jr	AT;				\
9:		b	9b;				\
		.set	pop;				\
		TEXT(msg)

	__INIT

NESTED(except_vec0_generic, 0, sp)
	PANIC_PIC("Exception vector 0 called")
	END(except_vec0_generic)

NESTED(except_vec1_generic, 0, sp)
	PANIC_PIC("Exception vector 1 called")
	END(except_vec1_generic)

/*
 * General exception vector for all other CPUs.
 *
 * Be careful when changing this, it has to be at most 128 bytes
 * to fit into space reserved for the exception handler.
 */
NESTED(except_vec3_generic, 0, sp)
	.set	push
	.set	noat
#if R5432_CP0_INTERRUPT_WAR
	mfc0	k0, CP0_INDEX
#endif
	mfc0	k1, CP0_CAUSE
	andi	k1, k1, 0x7c
#ifdef CONFIG_64BIT
	dsll	k1, k1, 1
#endif
	PTR_L	k0, exception_handlers(k1)
	jr	k0
	.set	pop
	END(except_vec3_generic)

/*
 * General exception handler for CPUs with virtual coherency exception.
 *
 * Be careful when changing this, it has to be at most 256 (as a special
 * exception) bytes to fit into space reserved for the exception handler.
 */
NESTED(except_vec3_r4000, 0, sp)
	.set	push
	.set	mips3
	.set	noat
	mfc0	k1, CP0_CAUSE
	li	k0, 31<<2
	andi	k1, k1, 0x7c
	.set	push
	.set	noreorder
	.set	nomacro
	beq	k1, k0, handle_vced
	 li	k0, 14<<2
	beq	k1, k0, handle_vcei
#ifdef CONFIG_64BIT
	 dsll	k1, k1, 1
#endif
	.set	pop
	PTR_L	k0, exception_handlers(k1)
	jr	k0

	/*
	 * Big shit, we now may have two dirty primary cache lines for the same
	 * physical address.  We can safely invalidate the line pointed to by
	 * c0_badvaddr because after return from this exception handler the
	 * load / store will be re-executed.
	 */
handle_vced:
	MFC0	k0, CP0_BADVADDR
	li	k1, -4					# Is this ...
	and	k0, k1					# ... really needed?
	mtc0	zero, CP0_TAGLO
	cache	Index_Store_Tag_D, (k0)
	cache	Hit_Writeback_Inv_SD, (k0)
#ifdef CONFIG_PROC_FS
	PTR_LA	k0, vced_count
	lw	k1, (k0)
	addiu	k1, 1
	sw	k1, (k0)
#endif
	eret

handle_vcei:
	MFC0	k0, CP0_BADVADDR
	cache	Hit_Writeback_Inv_SD, (k0)		# also cleans pi
#ifdef CONFIG_PROC_FS
	PTR_LA	k0, vcei_count
	lw	k1, (k0)
	addiu	k1, 1
	sw	k1, (k0)
#endif
	eret
	.set	pop
	END(except_vec3_r4000)

/*
 * Special interrupt vector for MIPS64 ISA & embedded MIPS processors.
 * This is a dedicated interrupt exception vector which reduces the
 * interrupt processing overhead.  The jump instruction will be replaced
 * at the initialization time.
 *
 * Be careful when changing this, it has to be at most 128 bytes
 * to fit into space reserved for the exception handler.
 */
NESTED(except_vec4, 0, sp)
1:	j	1b			/* Dummy, will be replaced */
	END(except_vec4)

/*
 * EJTAG debug exception handler.
 * The EJTAG debug exception entry point is 0xbfc00480, which
 * normally is in the boot PROM, so the boot PROM must do a
 * unconditional jump to this vector.
 */
NESTED(except_vec_ejtag_debug, 0, sp)
	j	ejtag_debug_handler
	END(except_vec_ejtag_debug)

	__FINIT

/*
 * Vectored interrupt handler.
 * This prototype is copied to ebase + n*IntCtl.VS and patched
 * to invoke the handler
 */
NESTED(except_vec_vi, 0, sp)
	SAVE_SOME
	SAVE_AT
	.set	push
	.set	noreorder
EXPORT(except_vec_vi_lui)
	lui	v0, 0		/* Patched */
	j	except_vec_vi_handler
EXPORT(except_vec_vi_ori)
	 ori	v0, 0		/* Patched */
	.set	pop
	END(except_vec_vi)
EXPORT(except_vec_vi_end)

/*
 * Common Vectored Interrupt code
 * Complete the register saves and invoke the handler which is passed in $v0
 */
NESTED(except_vec_vi_handler, 0, sp)
	SAVE_TEMP
	SAVE_STATIC
	CLI
	move	a0, sp
	jalr	v0
	j	ret_from_irq
	END(except_vec_vi_handler)

/*
 * EJTAG debug exception handler.
 */
NESTED(ejtag_debug_handler, PT_SIZE, sp)
	.set	push
	.set	noat
	MTC0	k0, CP0_DESAVE
	mfc0	k0, CP0_DEBUG

	sll	k0, k0, 30	# Check for SDBBP.
	bgez	k0, ejtag_return

	PTR_LA	k0, ejtag_debug_buffer
	LONG_S	k1, 0(k0)
	SAVE_ALL
	move	a0, sp
	jal	ejtag_exception_handler
	RESTORE_ALL
	PTR_LA	k0, ejtag_debug_buffer
	LONG_L	k1, 0(k0)

ejtag_return:
	MFC0	k0, CP0_DESAVE
	.set	mips32
	deret
	.set pop
	END(ejtag_debug_handler)

/*
 * This buffer is reserved for the use of the EJTAG debug
 * handler.
 */
	.data
EXPORT(ejtag_debug_buffer)
	.fill	LONGSIZE
	.previous

	__INIT

/*
 * NMI debug exception handler for MIPS reference boards.
 * The NMI debug exception entry point is 0xbfc00000, which
 * normally is in the boot PROM, so the boot PROM must do a
 * unconditional jump to this vector.
 */
NESTED(except_vec_nmi, 0, sp)
	j	nmi_handler
	END(except_vec_nmi)

	__FINIT

NESTED(nmi_handler, PT_SIZE, sp)
	.set	push
	.set	noat
	.set	mips3
	SAVE_ALL
 	move	a0, sp
	jal	nmi_exception_handler
	RESTORE_ALL
	eret
	.set	pop
	END(nmi_handler)

	.macro	__build_clear_none
	.endm

	.macro	__build_clear_sti
	STI
	.endm

	.macro	__build_clear_cli
	CLI
	.endm

	.macro	__build_clear_fpe
	cfc1	a1, fcr31
	li	a2, ~(0x3f << 12)
	and	a2, a1
	ctc1	a2, fcr31
	STI
	.endm

	.macro	__build_clear_ade
	MFC0	t0, CP0_BADVADDR
	PTR_S	t0, PT_BVADDR(sp)
	KMODE
	.endm

	.macro	__BUILD_silent exception
	.endm

	/* Gas tries to parse the PRINT argument as a string containing
	   string escapes and emits bogus warnings if it believes to
	   recognize an unknown escape code.  So make the arguments
	   start with an n and gas will believe \n is ok ...  */
	.macro	__BUILD_verbose	nexception
	LONG_L	a1, PT_EPC(sp)
#ifdef CONFIG_32BIT
	PRINT("Got \nexception at %08lx\012")
#endif
#ifdef CONFIG_64BIT
	PRINT("Got \nexception at %016lx\012")
#endif
	.endm

	.macro	__BUILD_count exception
	LONG_L	t0,exception_count_\exception
	LONG_ADDIU t0, 1
	LONG_S	t0,exception_count_\exception
	.comm	exception_count\exception, 8, 8
	.endm

	.macro	__BUILD_HANDLER exception handler clear verbose ext
	.align	5
	NESTED(handle_\exception, PT_SIZE, sp)
	.set	noat
	SAVE_ALL
	FEXPORT(handle_\exception\ext)
	__BUILD_clear_\clear
	.set	at
	__BUILD_\verbose \exception
	move	a0, sp
	jal	do_\handler
	j	ret_from_exception
	END(handle_\exception)
	.endm

	.macro	BUILD_HANDLER exception handler clear verbose
	__BUILD_HANDLER	\exception \handler \clear \verbose _int
	.endm

	BUILD_HANDLER adel ade ade silent		/* #4  */
	BUILD_HANDLER ades ade ade silent		/* #5  */
	BUILD_HANDLER ibe be cli silent			/* #6  */
	BUILD_HANDLER dbe be cli silent			/* #7  */
	BUILD_HANDLER bp bp sti silent			/* #9  */
	BUILD_HANDLER ri ri sti silent			/* #10 */
	BUILD_HANDLER cpu cpu sti silent		/* #11 */
	BUILD_HANDLER ov ov sti silent			/* #12 */
	BUILD_HANDLER tr tr sti silent			/* #13 */
	BUILD_HANDLER fpe fpe fpe silent		/* #15 */
	BUILD_HANDLER mdmx mdmx sti silent		/* #22 */
	BUILD_HANDLER watch watch sti verbose		/* #23 */
	BUILD_HANDLER mcheck mcheck cli verbose		/* #24 */
	BUILD_HANDLER dsp dsp sti silent		/* #26 */
	BUILD_HANDLER reserved reserved sti verbose	/* others */

#ifdef CONFIG_64BIT
/* A temporary overflow handler used by check_daddi(). */

	__INIT

	BUILD_HANDLER  daddi_ov daddi_ov none silent	/* #12 */
#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
	7	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
	8	* Copyright (C) 2001 MIPS Technologies, Inc.
	9	* Copyright (C) 2002 Maciej W. Rozycki
	10	*/
	11	#include <linux/config.h>
	12	#include <linux/init.h>
	13
	14	#include <asm/asm.h>
	15	#include <asm/cacheops.h>
	16	#include <asm/regdef.h>
	17	#include <asm/fpregdef.h>
	18	#include <asm/mipsregs.h>
	19	#include <asm/stackframe.h>
	20	#include <asm/war.h>
	21
	22	#define PANIC_PIC(msg) \
	23	.set push; \
	24	.set reorder; \
	25	PTR_LA a0,8f; \
	26	.set noat; \
	27	PTR_LA AT, panic; \
	28	jr AT; \
	29	9: b 9b; \
	30	.set pop; \
	31	TEXT(msg)
	32
	33	__INIT
	34
	35	NESTED(except_vec0_generic, 0, sp)
	36	PANIC_PIC("Exception vector 0 called")
	37	END(except_vec0_generic)
	38
	39	NESTED(except_vec1_generic, 0, sp)
	40	PANIC_PIC("Exception vector 1 called")
	41	END(except_vec1_generic)
	42
	43	/*
	44	* General exception vector for all other CPUs.
	45	*
	46	* Be careful when changing this, it has to be at most 128 bytes
	47	* to fit into space reserved for the exception handler.
	48	*/
	49	NESTED(except_vec3_generic, 0, sp)
	50	.set push
	51	.set noat
	52	#if R5432_CP0_INTERRUPT_WAR
	53	mfc0 k0, CP0_INDEX
	54	#endif
	55	mfc0 k1, CP0_CAUSE
	56	andi k1, k1, 0x7c
875d43e7	57	#ifdef CONFIG_64BIT
1da177e4 LT	58	dsll k1, k1, 1
	59	#endif
	60	PTR_L k0, exception_handlers(k1)
	61	jr k0
	62	.set pop
	63	END(except_vec3_generic)
	64
	65	/*
	66	* General exception handler for CPUs with virtual coherency exception.
	67	*
	68	* Be careful when changing this, it has to be at most 256 (as a special
	69	* exception) bytes to fit into space reserved for the exception handler.
	70	*/
	71	NESTED(except_vec3_r4000, 0, sp)
	72	.set push
	73	.set mips3
	74	.set noat
	75	mfc0 k1, CP0_CAUSE
	76	li k0, 31<<2
	77	andi k1, k1, 0x7c
	78	.set push
	79	.set noreorder
	80	.set nomacro
	81	beq k1, k0, handle_vced
	82	li k0, 14<<2
	83	beq k1, k0, handle_vcei
875d43e7	84	#ifdef CONFIG_64BIT
69903d65	85	dsll k1, k1, 1
1da177e4 LT	86	#endif
	87	.set pop
	88	PTR_L k0, exception_handlers(k1)
	89	jr k0
	90
	91	/*
	92	* Big shit, we now may have two dirty primary cache lines for the same
69903d65	93	* physical address. We can safely invalidate the line pointed to by
1da177e4 LT	94	* c0_badvaddr because after return from this exception handler the
	95	* load / store will be re-executed.
	96	*/
	97	handle_vced:
69903d65	98	MFC0 k0, CP0_BADVADDR
1da177e4 LT	99	li k1, -4 # Is this ...
	100	and k0, k1 # ... really needed?
	101	mtc0 zero, CP0_TAGLO
69903d65 TS	102	cache Index_Store_Tag_D, (k0)
69903d65 TS	103	cache Hit_Writeback_Inv_SD, (k0)
1da177e4 LT	104	#ifdef CONFIG_PROC_FS
	105	PTR_LA k0, vced_count
	106	lw k1, (k0)
	107	addiu k1, 1
	108	sw k1, (k0)
	109	#endif
	110	eret
	111
	112	handle_vcei:
	113	MFC0 k0, CP0_BADVADDR
	114	cache Hit_Writeback_Inv_SD, (k0) # also cleans pi
	115	#ifdef CONFIG_PROC_FS
	116	PTR_LA k0, vcei_count
	117	lw k1, (k0)
	118	addiu k1, 1
	119	sw k1, (k0)
	120	#endif
	121	eret
	122	.set pop
	123	END(except_vec3_r4000)
	124
	125	/*
	126	* Special interrupt vector for MIPS64 ISA & embedded MIPS processors.
	127	* This is a dedicated interrupt exception vector which reduces the
	128	* interrupt processing overhead. The jump instruction will be replaced
	129	* at the initialization time.
	130	*
	131	* Be careful when changing this, it has to be at most 128 bytes
	132	* to fit into space reserved for the exception handler.
	133	*/
	134	NESTED(except_vec4, 0, sp)
	135	1: j 1b /* Dummy, will be replaced */
	136	END(except_vec4)
	137
	138	/*
	139	* EJTAG debug exception handler.
	140	* The EJTAG debug exception entry point is 0xbfc00480, which
	141	* normally is in the boot PROM, so the boot PROM must do a
	142	* unconditional jump to this vector.
	143	*/
	144	NESTED(except_vec_ejtag_debug, 0, sp)
	145	j ejtag_debug_handler
	146	END(except_vec_ejtag_debug)
	147
	148	__FINIT
	149
e01402b1 RB	150	/*
	151	* Vectored interrupt handler.
	152	* This prototype is copied to ebase + n*IntCtl.VS and patched
	153	* to invoke the handler
	154	*/
	155	NESTED(except_vec_vi, 0, sp)
	156	SAVE_SOME
	157	SAVE_AT
	158	.set push
	159	.set noreorder
	160	EXPORT(except_vec_vi_lui)
	161	lui v0, 0 /* Patched */
	162	j except_vec_vi_handler
	163	EXPORT(except_vec_vi_ori)
	164	ori v0, 0 /* Patched */
	165	.set pop
	166	END(except_vec_vi)
	167	EXPORT(except_vec_vi_end)
	168
	169	/*
	170	* Common Vectored Interrupt code
	171	* Complete the register saves and invoke the handler which is passed in $v0
	172	*/
	173	NESTED(except_vec_vi_handler, 0, sp)
	174	SAVE_TEMP
	175	SAVE_STATIC
	176	CLI
	177	move a0, sp
	178	jalr v0
	179	j ret_from_irq
	180	END(except_vec_vi_handler)
	181
1da177e4 LT	182	/*
	183	* EJTAG debug exception handler.
	184	*/
	185	NESTED(ejtag_debug_handler, PT_SIZE, sp)
	186	.set push
	187	.set noat
	188	MTC0 k0, CP0_DESAVE
	189	mfc0 k0, CP0_DEBUG
	190
	191	sll k0, k0, 30 # Check for SDBBP.
	192	bgez k0, ejtag_return
	193
	194	PTR_LA k0, ejtag_debug_buffer
	195	LONG_S k1, 0(k0)
	196	SAVE_ALL
	197	move a0, sp
	198	jal ejtag_exception_handler
	199	RESTORE_ALL
	200	PTR_LA k0, ejtag_debug_buffer
	201	LONG_L k1, 0(k0)
	202
	203	ejtag_return:
	204	MFC0 k0, CP0_DESAVE
	205	.set mips32
	206	deret
	207	.set pop
	208	END(ejtag_debug_handler)
	209
	210	/*
	211	* This buffer is reserved for the use of the EJTAG debug
	212	* handler.
	213	*/
	214	.data
	215	EXPORT(ejtag_debug_buffer)
	216	.fill LONGSIZE
	217	.previous
	218
	219	__INIT
	220
	221	/*
	222	* NMI debug exception handler for MIPS reference boards.
	223	* The NMI debug exception entry point is 0xbfc00000, which
	224	* normally is in the boot PROM, so the boot PROM must do a
	225	* unconditional jump to this vector.
	226	*/
	227	NESTED(except_vec_nmi, 0, sp)
	228	j nmi_handler
	229	END(except_vec_nmi)
	230
	231	__FINIT
	232
	233	NESTED(nmi_handler, PT_SIZE, sp)
	234	.set push
	235	.set noat
	236	.set mips3
	237	SAVE_ALL
	238	move a0, sp
	239	jal nmi_exception_handler
	240	RESTORE_ALL
	241	eret
	242	.set pop
	243	END(nmi_handler)
	244
	245	.macro __build_clear_none
246	.endm
247
248	.macro __build_clear_sti
249	STI
250	.endm
251
252	.macro __build_clear_cli
253	CLI
254	.endm
255
256	.macro __build_clear_fpe
257	cfc1 a1, fcr31
258	li a2, ~(0x3f << 12)
259	and a2, a1
260	ctc1 a2, fcr31
261	STI
262	.endm
263
264	.macro __build_clear_ade
265	MFC0 t0, CP0_BADVADDR
266	PTR_S t0, PT_BVADDR(sp)
267	KMODE
268	.endm
269
270	.macro __BUILD_silent exception
271	.endm
272
273	/* Gas tries to parse the PRINT argument as a string containing
274	string escapes and emits bogus warnings if it believes to
275	recognize an unknown escape code. So make the arguments
276	start with an n and gas will believe \n is ok ... */
277	.macro __BUILD_verbose nexception
278	LONG_L a1, PT_EPC(sp)
766160c2	279	#ifdef CONFIG_32BIT
1da177e4	280	PRINT("Got \nexception at %08lx\012")
42a3b4f2	281	#endif
766160c2	282	#ifdef CONFIG_64BIT
1da177e4	283	PRINT("Got \nexception at %016lx\012")
42a3b4f2	284	#endif
1da177e4 LT	285	.endm
	286
	287	.macro __BUILD_count exception
	288	LONG_L t0,exception_count_\exception
	289	LONG_ADDIU t0, 1
	290	LONG_S t0,exception_count_\exception
	291	.comm exception_count\exception, 8, 8
	292	.endm
	293
	294	.macro __BUILD_HANDLER exception handler clear verbose ext
	295	.align 5
	296	NESTED(handle_\exception, PT_SIZE, sp)
	297	.set noat
	298	SAVE_ALL
	299	FEXPORT(handle_\exception\ext)
	300	__BUILD_clear_\clear
	301	.set at
	302	__BUILD_\verbose \exception
	303	move a0, sp
	304	jal do_\handler
	305	j ret_from_exception
	306	END(handle_\exception)
	307	.endm
	308
	309	.macro BUILD_HANDLER exception handler clear verbose
	310	__BUILD_HANDLER \exception \handler \clear \verbose _int
	311	.endm
	312
	313	BUILD_HANDLER adel ade ade silent /* #4 */
	314	BUILD_HANDLER ades ade ade silent /* #5 */
	315	BUILD_HANDLER ibe be cli silent /* #6 */
	316	BUILD_HANDLER dbe be cli silent /* #7 */
	317	BUILD_HANDLER bp bp sti silent /* #9 */
	318	BUILD_HANDLER ri ri sti silent /* #10 */
	319	BUILD_HANDLER cpu cpu sti silent /* #11 */
	320	BUILD_HANDLER ov ov sti silent /* #12 */
	321	BUILD_HANDLER tr tr sti silent /* #13 */
	322	BUILD_HANDLER fpe fpe fpe silent /* #15 */
	323	BUILD_HANDLER mdmx mdmx sti silent /* #22 */
	324	BUILD_HANDLER watch watch sti verbose /* #23 */
	325	BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
e50c0a8f	326	BUILD_HANDLER dsp dsp sti silent /* #26 */
1da177e4 LT	327	BUILD_HANDLER reserved reserved sti verbose /* others */
1da177e4 LT	328
875d43e7	329	#ifdef CONFIG_64BIT
1da177e4 LT	330	/* A temporary overflow handler used by check_daddi(). */
	331
	332	__INIT
	333
	334	BUILD_HANDLER daddi_ov daddi_ov none silent /* #12 */
	335	#endif