[deliverable/linux.git] / arch / mips / kernel / process.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 * Copyright (C) 2004 Thiemo Seufer
 * Copyright (C) 2013  Imagination Technologies Ltd.
 */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/tick.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/export.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/personality.h>
#include <linux/sys.h>
#include <linux/init.h>
#include <linux/completion.h>
#include <linux/kallsyms.h>
#include <linux/random.h>
#include <linux/prctl.h>

#include <asm/asm.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/dsp.h>
#include <asm/fpu.h>
#include <asm/msa.h>
#include <asm/pgtable.h>
#include <asm/mipsregs.h>
#include <asm/processor.h>
#include <asm/reg.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/elf.h>
#include <asm/isadep.h>
#include <asm/inst.h>
#include <asm/stacktrace.h>
#include <asm/irq_regs.h>

#ifdef CONFIG_HOTPLUG_CPU
void arch_cpu_idle_dead(void)
{
	/* What the heck is this check doing ? */
	if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
		play_dead();
}
#endif

asmlinkage void ret_from_fork(void);
asmlinkage void ret_from_kernel_thread(void);

void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
{
	unsigned long status;

	/* New thread loses kernel privileges. */
	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
	status |= KU_USER;
	regs->cp0_status = status;
	lose_fpu(0);
	clear_thread_flag(TIF_MSA_CTX_LIVE);
	clear_used_math();
	init_dsp();
	regs->cp0_epc = pc;
	regs->regs[29] = sp;
}

int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
{
	/*
	 * Save any process state which is live in hardware registers to the
	 * parent context prior to duplication. This prevents the new child
	 * state becoming stale if the parent is preempted before copy_thread()
	 * gets a chance to save the parent's live hardware registers to the
	 * child context.
	 */
	preempt_disable();

	if (is_msa_enabled())
		save_msa(current);
	else if (is_fpu_owner())
		_save_fp(current);

	save_dsp(current);

	preempt_enable();

	*dst = *src;
	return 0;
}

/*
 * Copy architecture-specific thread state
 */
int copy_thread(unsigned long clone_flags, unsigned long usp,
	unsigned long kthread_arg, struct task_struct *p)
{
	struct thread_info *ti = task_thread_info(p);
	struct pt_regs *childregs, *regs = current_pt_regs();
	unsigned long childksp;
	p->set_child_tid = p->clear_child_tid = NULL;

	childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;

	/* set up new TSS. */
	childregs = (struct pt_regs *) childksp - 1;
	/*  Put the stack after the struct pt_regs.  */
	childksp = (unsigned long) childregs;
	p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
	if (unlikely(p->flags & PF_KTHREAD)) {
		/* kernel thread */
		unsigned long status = p->thread.cp0_status;
		memset(childregs, 0, sizeof(struct pt_regs));
		ti->addr_limit = KERNEL_DS;
		p->thread.reg16 = usp; /* fn */
		p->thread.reg17 = kthread_arg;
		p->thread.reg29 = childksp;
		p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
		status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
			 ((status & (ST0_KUC | ST0_IEC)) << 2);
#else
		status |= ST0_EXL;
#endif
		childregs->cp0_status = status;
		return 0;
	}

	/* user thread */
	*childregs = *regs;
	childregs->regs[7] = 0; /* Clear error flag */
	childregs->regs[2] = 0; /* Child gets zero as return value */
	if (usp)
		childregs->regs[29] = usp;
	ti->addr_limit = USER_DS;

	p->thread.reg29 = (unsigned long) childregs;
	p->thread.reg31 = (unsigned long) ret_from_fork;

	/*
	 * New tasks lose permission to use the fpu. This accelerates context
	 * switching for most programs since they don't use the fpu.
	 */
	childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);

	clear_tsk_thread_flag(p, TIF_USEDFPU);
	clear_tsk_thread_flag(p, TIF_USEDMSA);
	clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);

#ifdef CONFIG_MIPS_MT_FPAFF
	clear_tsk_thread_flag(p, TIF_FPUBOUND);
#endif /* CONFIG_MIPS_MT_FPAFF */

	if (clone_flags & CLONE_SETTLS)
		ti->tp_value = regs->regs[7];

	return 0;
}

#ifdef CONFIG_CC_STACKPROTECTOR
#include <linux/stackprotector.h>
unsigned long __stack_chk_guard __read_mostly;
EXPORT_SYMBOL(__stack_chk_guard);
#endif

struct mips_frame_info {
	void		*func;
	unsigned long	func_size;
	int		frame_size;
	int		pc_offset;
};

#define J_TARGET(pc,target)	\
		(((unsigned long)(pc) & 0xf0000000) | ((target) << 2))

static inline int is_ra_save_ins(union mips_instruction *ip)
{
#ifdef CONFIG_CPU_MICROMIPS
	union mips_instruction mmi;

	/*
	 * swsp ra,offset
	 * swm16 reglist,offset(sp)
	 * swm32 reglist,offset(sp)
	 * sw32 ra,offset(sp)
	 * jradiussp - NOT SUPPORTED
	 *
	 * microMIPS is way more fun...
	 */
	if (mm_insn_16bit(ip->halfword[0])) {
		mmi.word = (ip->halfword[0] << 16);
		return (mmi.mm16_r5_format.opcode == mm_swsp16_op &&
			mmi.mm16_r5_format.rt == 31) ||
		       (mmi.mm16_m_format.opcode == mm_pool16c_op &&
			mmi.mm16_m_format.func == mm_swm16_op);
	}
	else {
		mmi.halfword[0] = ip->halfword[1];
		mmi.halfword[1] = ip->halfword[0];
		return (mmi.mm_m_format.opcode == mm_pool32b_op &&
			mmi.mm_m_format.rd > 9 &&
			mmi.mm_m_format.base == 29 &&
			mmi.mm_m_format.func == mm_swm32_func) ||
		       (mmi.i_format.opcode == mm_sw32_op &&
			mmi.i_format.rs == 29 &&
			mmi.i_format.rt == 31);
	}
#else
	/* sw / sd $ra, offset($sp) */
	return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
		ip->i_format.rs == 29 &&
		ip->i_format.rt == 31;
#endif
}

static inline int is_jump_ins(union mips_instruction *ip)
{
#ifdef CONFIG_CPU_MICROMIPS
	/*
	 * jr16,jrc,jalr16,jalr16
	 * jal
	 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
	 * jraddiusp - NOT SUPPORTED
	 *
	 * microMIPS is kind of more fun...
	 */
	union mips_instruction mmi;

	mmi.word = (ip->halfword[0] << 16);

	if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
	    (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
	    ip->j_format.opcode == mm_jal32_op)
		return 1;
	if (ip->r_format.opcode != mm_pool32a_op ||
			ip->r_format.func != mm_pool32axf_op)
		return 0;
	return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
#else
	if (ip->j_format.opcode == j_op)
		return 1;
	if (ip->j_format.opcode == jal_op)
		return 1;
	if (ip->r_format.opcode != spec_op)
		return 0;
	return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
#endif
}

static inline int is_sp_move_ins(union mips_instruction *ip)
{
#ifdef CONFIG_CPU_MICROMIPS
	/*
	 * addiusp -imm
	 * addius5 sp,-imm
	 * addiu32 sp,sp,-imm
	 * jradiussp - NOT SUPPORTED
	 *
	 * microMIPS is not more fun...
	 */
	if (mm_insn_16bit(ip->halfword[0])) {
		union mips_instruction mmi;

		mmi.word = (ip->halfword[0] << 16);
		return (mmi.mm16_r3_format.opcode == mm_pool16d_op &&
			mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
		       (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
			mmi.mm16_r5_format.rt == 29);
	}
	return ip->mm_i_format.opcode == mm_addiu32_op &&
	       ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
#else
	/* addiu/daddiu sp,sp,-imm */
	if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
		return 0;
	if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
		return 1;
#endif
	return 0;
}

static int get_frame_info(struct mips_frame_info *info)
{
#ifdef CONFIG_CPU_MICROMIPS
	union mips_instruction *ip = (void *) (((char *) info->func) - 1);
#else
	union mips_instruction *ip = info->func;
#endif
	unsigned max_insns = info->func_size / sizeof(union mips_instruction);
	unsigned i;

	info->pc_offset = -1;
	info->frame_size = 0;

	if (!ip)
		goto err;

	if (max_insns == 0)
		max_insns = 128U;	/* unknown function size */
	max_insns = min(128U, max_insns);

	for (i = 0; i < max_insns; i++, ip++) {

		if (is_jump_ins(ip))
			break;
		if (!info->frame_size) {
			if (is_sp_move_ins(ip))
			{
#ifdef CONFIG_CPU_MICROMIPS
				if (mm_insn_16bit(ip->halfword[0]))
				{
					unsigned short tmp;

					if (ip->halfword[0] & mm_addiusp_func)
					{
						tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
						info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
					} else {
						tmp = (ip->halfword[0] >> 1);
						info->frame_size = -(signed short)(tmp & 0xf);
					}
					ip = (void *) &ip->halfword[1];
					ip--;
				} else
#endif
				info->frame_size = - ip->i_format.simmediate;
			}
			continue;
		}
		if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
			info->pc_offset =
				ip->i_format.simmediate / sizeof(long);
			break;
		}
	}
	if (info->frame_size && info->pc_offset >= 0) /* nested */
		return 0;
	if (info->pc_offset < 0) /* leaf */
		return 1;
	/* prologue seems boggus... */
err:
	return -1;
}

static struct mips_frame_info schedule_mfi __read_mostly;

#ifdef CONFIG_KALLSYMS
static unsigned long get___schedule_addr(void)
{
	return kallsyms_lookup_name("__schedule");
}
#else
static unsigned long get___schedule_addr(void)
{
	union mips_instruction *ip = (void *)schedule;
	int max_insns = 8;
	int i;

	for (i = 0; i < max_insns; i++, ip++) {
		if (ip->j_format.opcode == j_op)
			return J_TARGET(ip, ip->j_format.target);
	}
	return 0;
}
#endif

static int __init frame_info_init(void)
{
	unsigned long size = 0;
#ifdef CONFIG_KALLSYMS
	unsigned long ofs;
#endif
	unsigned long addr;

	addr = get___schedule_addr();
	if (!addr)
		addr = (unsigned long)schedule;

#ifdef CONFIG_KALLSYMS
	kallsyms_lookup_size_offset(addr, &size, &ofs);
#endif
	schedule_mfi.func = (void *)addr;
	schedule_mfi.func_size = size;

	get_frame_info(&schedule_mfi);

	/*
	 * Without schedule() frame info, result given by
	 * thread_saved_pc() and get_wchan() are not reliable.
	 */
	if (schedule_mfi.pc_offset < 0)
		printk("Can't analyze schedule() prologue at %p\n", schedule);

	return 0;
}

arch_initcall(frame_info_init);

/*
 * Return saved PC of a blocked thread.
 */
unsigned long thread_saved_pc(struct task_struct *tsk)
{
	struct thread_struct *t = &tsk->thread;

	/* New born processes are a special case */
	if (t->reg31 == (unsigned long) ret_from_fork)
		return t->reg31;
	if (schedule_mfi.pc_offset < 0)
		return 0;
	return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
}


#ifdef CONFIG_KALLSYMS
/* generic stack unwinding function */
unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
					      unsigned long *sp,
					      unsigned long pc,
					      unsigned long *ra)
{
	struct mips_frame_info info;
	unsigned long size, ofs;
	int leaf;
	extern void ret_from_irq(void);
	extern void ret_from_exception(void);

	if (!stack_page)
		return 0;

	/*
	 * If we reached the bottom of interrupt context,
	 * return saved pc in pt_regs.
	 */
	if (pc == (unsigned long)ret_from_irq ||
	    pc == (unsigned long)ret_from_exception) {
		struct pt_regs *regs;
		if (*sp >= stack_page &&
		    *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
			regs = (struct pt_regs *)*sp;
			pc = regs->cp0_epc;
			if (!user_mode(regs) && __kernel_text_address(pc)) {
				*sp = regs->regs[29];
				*ra = regs->regs[31];
				return pc;
			}
		}
		return 0;
	}
	if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
		return 0;
	/*
	 * Return ra if an exception occurred at the first instruction
	 */
	if (unlikely(ofs == 0)) {
		pc = *ra;
		*ra = 0;
		return pc;
	}

	info.func = (void *)(pc - ofs);
	info.func_size = ofs;	/* analyze from start to ofs */
	leaf = get_frame_info(&info);
	if (leaf < 0)
		return 0;

	if (*sp < stack_page ||
	    *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
		return 0;

	if (leaf)
		/*
		 * For some extreme cases, get_frame_info() can
		 * consider wrongly a nested function as a leaf
		 * one. In that cases avoid to return always the
		 * same value.
		 */
		pc = pc != *ra ? *ra : 0;
	else
		pc = ((unsigned long *)(*sp))[info.pc_offset];

	*sp += info.frame_size;
	*ra = 0;
	return __kernel_text_address(pc) ? pc : 0;
}
EXPORT_SYMBOL(unwind_stack_by_address);

/* used by show_backtrace() */
unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
			   unsigned long pc, unsigned long *ra)
{
	unsigned long stack_page = (unsigned long)task_stack_page(task);
	return unwind_stack_by_address(stack_page, sp, pc, ra);
}
#endif

/*
 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
 */
unsigned long get_wchan(struct task_struct *task)
{
	unsigned long pc = 0;
#ifdef CONFIG_KALLSYMS
	unsigned long sp;
	unsigned long ra = 0;
#endif

	if (!task || task == current || task->state == TASK_RUNNING)
		goto out;
	if (!task_stack_page(task))
		goto out;

	pc = thread_saved_pc(task);

#ifdef CONFIG_KALLSYMS
	sp = task->thread.reg29 + schedule_mfi.frame_size;

	while (in_sched_functions(pc))
		pc = unwind_stack(task, &sp, pc, &ra);
#endif

out:
	return pc;
}

/*
 * Don't forget that the stack pointer must be aligned on a 8 bytes
 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
 */
unsigned long arch_align_stack(unsigned long sp)
{
	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
		sp -= get_random_int() & ~PAGE_MASK;

	return sp & ALMASK;
}

static void arch_dump_stack(void *info)
{
	struct pt_regs *regs;

	regs = get_irq_regs();

	if (regs)
		show_regs(regs);

	dump_stack();
}

void arch_trigger_all_cpu_backtrace(bool include_self)
{
	smp_call_function(arch_dump_stack, NULL, 1);
}

int mips_get_process_fp_mode(struct task_struct *task)
{
	int value = 0;

	if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
		value |= PR_FP_MODE_FR;
	if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
		value |= PR_FP_MODE_FRE;

	return value;
}

static void prepare_for_fp_mode_switch(void *info)
{
	struct mm_struct *mm = info;

	if (current->mm == mm)
		lose_fpu(1);
}

int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
{
	const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
	struct task_struct *t;
	int max_users;

	/* Check the value is valid */
	if (value & ~known_bits)
		return -EOPNOTSUPP;

	/* Avoid inadvertently triggering emulation */
	if ((value & PR_FP_MODE_FR) && cpu_has_fpu &&
	    !(current_cpu_data.fpu_id & MIPS_FPIR_F64))
		return -EOPNOTSUPP;
	if ((value & PR_FP_MODE_FRE) && cpu_has_fpu && !cpu_has_fre)
		return -EOPNOTSUPP;

	/* FR = 0 not supported in MIPS R6 */
	if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6)
		return -EOPNOTSUPP;

	/* Proceed with the mode switch */
	preempt_disable();

	/* Save FP & vector context, then disable FPU & MSA */
	if (task->signal == current->signal)
		lose_fpu(1);

	/* Prevent any threads from obtaining live FP context */
	atomic_set(&task->mm->context.fp_mode_switching, 1);
	smp_mb__after_atomic();

	/*
	 * If there are multiple online CPUs then force any which are running
	 * threads in this process to lose their FPU context, which they can't
	 * regain until fp_mode_switching is cleared later.
	 */
	if (num_online_cpus() > 1) {
		/* No need to send an IPI for the local CPU */
		max_users = (task->mm == current->mm) ? 1 : 0;

		if (atomic_read(&current->mm->mm_users) > max_users)
			smp_call_function(prepare_for_fp_mode_switch,
					  (void *)current->mm, 1);
	}

	/*
	 * There are now no threads of the process with live FP context, so it
	 * is safe to proceed with the FP mode switch.
	 */
	for_each_thread(task, t) {
		/* Update desired FP register width */
		if (value & PR_FP_MODE_FR) {
			clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
		} else {
			set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
			clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
		}

		/* Update desired FP single layout */
		if (value & PR_FP_MODE_FRE)
			set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
		else
			clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
	}

	/* Allow threads to use FP again */
	atomic_set(&task->mm->context.fp_mode_switching, 0);
	preempt_enable();

	return 0;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47	7	* Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4 LT	8	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
1da177e4 LT	9	* Copyright (C) 2004 Thiemo Seufer
34c2f668	10	* Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4	11	*/
1da177e4	12	#include <linux/errno.h>
1da177e4	13	#include <linux/sched.h>
7bcf7717	14	#include <linux/tick.h>
1da177e4 LT	15	#include <linux/kernel.h>
	16	#include <linux/mm.h>
	17	#include <linux/stddef.h>
	18	#include <linux/unistd.h>
cae39d13	19	#include <linux/export.h>
1da177e4	20	#include <linux/ptrace.h>
1da177e4 LT	21	#include <linux/mman.h>
	22	#include <linux/personality.h>
	23	#include <linux/sys.h>
1da177e4 LT	24	#include <linux/init.h>
1da177e4 LT	25	#include <linux/completion.h>
63077519	26	#include <linux/kallsyms.h>
94109102	27	#include <linux/random.h>
9791554b	28	#include <linux/prctl.h>
1da177e4	29
94109102	30	#include <asm/asm.h>
1da177e4 LT	31	#include <asm/bootinfo.h>
1da177e4 LT	32	#include <asm/cpu.h>
e50c0a8f	33	#include <asm/dsp.h>
1da177e4	34	#include <asm/fpu.h>
1db1af84	35	#include <asm/msa.h>
1da177e4	36	#include <asm/pgtable.h>
1da177e4 LT	37	#include <asm/mipsregs.h>
1da177e4 LT	38	#include <asm/processor.h>
60be939c	39	#include <asm/reg.h>
1da177e4 LT	40	#include <asm/uaccess.h>
	41	#include <asm/io.h>
	42	#include <asm/elf.h>
	43	#include <asm/isadep.h>
	44	#include <asm/inst.h>
1df0f0ff	45	#include <asm/stacktrace.h>
856839b7	46	#include <asm/irq_regs.h>
1da177e4	47
cdbedc61 TG	48	#ifdef CONFIG_HOTPLUG_CPU
cdbedc61 TG	49	void arch_cpu_idle_dead(void)
1da177e4	50	{
cdbedc61	51	/* What the heck is this check doing ? */
8dd92891	52	if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
cdbedc61 TG	53	play_dead();
	54	}
	55	#endif
1b2bc75c	56
1da177e4	57	asmlinkage void ret_from_fork(void);
8f54bcac	58	asmlinkage void ret_from_kernel_thread(void);
1da177e4 LT	59
	60	void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
	61	{
	62	unsigned long status;
	63
	64	/* New thread loses kernel privileges. */
bbaf238b	65	status = regs->cp0_status & ~(ST0_CU0\|ST0_CU1\|ST0_FR\|KU_MASK);
1da177e4 LT	66	status \|= KU_USER;
1da177e4 LT	67	regs->cp0_status = status;
76e5846d JH	68	lose_fpu(0);
76e5846d JH	69	clear_thread_flag(TIF_MSA_CTX_LIVE);
1da177e4	70	clear_used_math();
a3056b1c	71	init_dsp();
1da177e4 LT	72	regs->cp0_epc = pc;
1da177e4 LT	73	regs->regs[29] = sp;
1da177e4 LT	74	}
1da177e4 LT	75
39148e94 JH	76	int arch_dup_task_struct(struct task_struct dst, struct task_struct src)
	77	{
	78	/*
	79	* Save any process state which is live in hardware registers to the
	80	* parent context prior to duplication. This prevents the new child
	81	* state becoming stale if the parent is preempted before copy_thread()
	82	* gets a chance to save the parent's live hardware registers to the
	83	* child context.
	84	*/
	85	preempt_disable();
	86
	87	if (is_msa_enabled())
	88	save_msa(current);
	89	else if (is_fpu_owner())
	90	_save_fp(current);
	91
	92	save_dsp(current);
	93
	94	preempt_enable();
	95
	96	dst = src;
	97	return 0;
	98	}
	99
e2c5aaa5 AD	100	/*
	101	* Copy architecture-specific thread state
	102	*/
6f2c55b8	103	int copy_thread(unsigned long clone_flags, unsigned long usp,
e2c5aaa5	104	unsigned long kthread_arg, struct task_struct *p)
1da177e4	105	{
75bb07e7	106	struct thread_info *ti = task_thread_info(p);
afa86fc4	107	struct pt_regs childregs, regs = current_pt_regs();
484889fc	108	unsigned long childksp;
3c37026d	109	p->set_child_tid = p->clear_child_tid = NULL;
1da177e4	110
75bb07e7	111	childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4	112
1da177e4 LT	113	/* set up new TSS. */
1da177e4 LT	114	childregs = (struct pt_regs *) childksp - 1;
484889fc DD	115	/* Put the stack after the struct pt_regs. */
484889fc DD	116	childksp = (unsigned long) childregs;
8f54bcac AV	117	p->thread.cp0_status = read_c0_status() & ~(ST0_CU2\|ST0_CU1);
8f54bcac AV	118	if (unlikely(p->flags & PF_KTHREAD)) {
e2c5aaa5	119	/* kernel thread */
8f54bcac AV	120	unsigned long status = p->thread.cp0_status;
	121	memset(childregs, 0, sizeof(struct pt_regs));
	122	ti->addr_limit = KERNEL_DS;
	123	p->thread.reg16 = usp; /* fn */
e2c5aaa5	124	p->thread.reg17 = kthread_arg;
8f54bcac AV	125	p->thread.reg29 = childksp;
	126	p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
	127	#if defined(CONFIG_CPU_R3000) \|\| defined(CONFIG_CPU_TX39XX)
	128	status = (status & ~(ST0_KUP \| ST0_IEP \| ST0_IEC)) \|
	129	((status & (ST0_KUC \| ST0_IEC)) << 2);
	130	#else
	131	status \|= ST0_EXL;
	132	#endif
	133	childregs->cp0_status = status;
	134	return 0;
	135	}
e2c5aaa5 AD	136
e2c5aaa5 AD	137	/* user thread */
1da177e4	138	childregs = regs;
70342287 RB	139	childregs->regs[7] = 0; /* Clear error flag */
70342287 RB	140	childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d AV	141	if (usp)
64b3122d AV	142	childregs->regs[29] = usp;
8f54bcac	143	ti->addr_limit = USER_DS;
1da177e4	144
1da177e4 LT	145	p->thread.reg29 = (unsigned long) childregs;
	146	p->thread.reg31 = (unsigned long) ret_from_fork;
	147
	148	/*
	149	* New tasks lose permission to use the fpu. This accelerates context
	150	* switching for most programs since they don't use the fpu.
	151	*/
1da177e4	152	childregs->cp0_status &= ~(ST0_CU2\|ST0_CU1);
1da177e4	153
1da177e4	154	clear_tsk_thread_flag(p, TIF_USEDFPU);
7daef8f2 PB	155	clear_tsk_thread_flag(p, TIF_USEDMSA);
7daef8f2 PB	156	clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
1da177e4	157
f088fc84	158	#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a	159	clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84 RB	160	#endif /* CONFIG_MIPS_MT_FPAFF */
f088fc84 RB	161
3c37026d RB	162	if (clone_flags & CLONE_SETTLS)
	163	ti->tp_value = regs->regs[7];
	164
1da177e4 LT	165	return 0;
	166	}
	167
36ecafc5 GF	168	#ifdef CONFIG_CC_STACKPROTECTOR
	169	#include <linux/stackprotector.h>
	170	unsigned long __stack_chk_guard __read_mostly;
	171	EXPORT_SYMBOL(__stack_chk_guard);
	172	#endif
	173
b5943182 FBH	174	struct mips_frame_info {
	175	void *func;
	176	unsigned long func_size;
	177	int frame_size;
	178	int pc_offset;
	179	};
dc953df1	180
5000653e TW	181	#define J_TARGET(pc,target) \
	182	(((unsigned long)(pc) & 0xf0000000) \| ((target) << 2))
	183
c0efbb6d FBH	184	static inline int is_ra_save_ins(union mips_instruction *ip)
c0efbb6d FBH	185	{
34c2f668 LY	186	#ifdef CONFIG_CPU_MICROMIPS
	187	union mips_instruction mmi;
	188
	189	/*
	190	* swsp ra,offset
	191	* swm16 reglist,offset(sp)
	192	* swm32 reglist,offset(sp)
	193	* sw32 ra,offset(sp)
	194	* jradiussp - NOT SUPPORTED
	195	*
	196	* microMIPS is way more fun...
	197	*/
	198	if (mm_insn_16bit(ip->halfword[0])) {
	199	mmi.word = (ip->halfword[0] << 16);
635c9907 RB	200	return (mmi.mm16_r5_format.opcode == mm_swsp16_op &&
	201	mmi.mm16_r5_format.rt == 31) \|\|
	202	(mmi.mm16_m_format.opcode == mm_pool16c_op &&
	203	mmi.mm16_m_format.func == mm_swm16_op);
34c2f668 LY	204	}
	205	else {
	206	mmi.halfword[0] = ip->halfword[1];
	207	mmi.halfword[1] = ip->halfword[0];
635c9907 RB	208	return (mmi.mm_m_format.opcode == mm_pool32b_op &&
	209	mmi.mm_m_format.rd > 9 &&
	210	mmi.mm_m_format.base == 29 &&
	211	mmi.mm_m_format.func == mm_swm32_func) \|\|
	212	(mmi.i_format.opcode == mm_sw32_op &&
	213	mmi.i_format.rs == 29 &&
	214	mmi.i_format.rt == 31);
34c2f668 LY	215	}
34c2f668 LY	216	#else
c0efbb6d FBH	217	/* sw / sd $ra, offset($sp) */
	218	return (ip->i_format.opcode == sw_op \|\| ip->i_format.opcode == sd_op) &&
	219	ip->i_format.rs == 29 &&
	220	ip->i_format.rt == 31;
34c2f668	221	#endif
c0efbb6d FBH	222	}
c0efbb6d FBH	223
e7438c4b	224	static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d	225	{
34c2f668 LY	226	#ifdef CONFIG_CPU_MICROMIPS
	227	/*
	228	* jr16,jrc,jalr16,jalr16
	229	* jal
	230	* jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
	231	* jraddiusp - NOT SUPPORTED
	232	*
	233	* microMIPS is kind of more fun...
	234	*/
	235	union mips_instruction mmi;
	236
	237	mmi.word = (ip->halfword[0] << 16);
	238
	239	if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
	240	(mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) \|\|
	241	ip->j_format.opcode == mm_jal32_op)
	242	return 1;
	243	if (ip->r_format.opcode != mm_pool32a_op \|\|
	244	ip->r_format.func != mm_pool32axf_op)
	245	return 0;
635c9907	246	return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
34c2f668	247	#else
e7438c4b TW	248	if (ip->j_format.opcode == j_op)
e7438c4b TW	249	return 1;
c0efbb6d FBH	250	if (ip->j_format.opcode == jal_op)
	251	return 1;
	252	if (ip->r_format.opcode != spec_op)
	253	return 0;
	254	return ip->r_format.func == jalr_op \|\| ip->r_format.func == jr_op;
34c2f668	255	#endif
c0efbb6d FBH	256	}
	257
	258	static inline int is_sp_move_ins(union mips_instruction *ip)
	259	{
34c2f668 LY	260	#ifdef CONFIG_CPU_MICROMIPS
	261	/*
	262	* addiusp -imm
	263	* addius5 sp,-imm
	264	* addiu32 sp,sp,-imm
	265	* jradiussp - NOT SUPPORTED
	266	*
	267	* microMIPS is not more fun...
	268	*/
	269	if (mm_insn_16bit(ip->halfword[0])) {
	270	union mips_instruction mmi;
	271
	272	mmi.word = (ip->halfword[0] << 16);
635c9907 RB	273	return (mmi.mm16_r3_format.opcode == mm_pool16d_op &&
	274	mmi.mm16_r3_format.simmediate && mm_addiusp_func) \|\|
	275	(mmi.mm16_r5_format.opcode == mm_pool16d_op &&
	276	mmi.mm16_r5_format.rt == 29);
34c2f668	277	}
635c9907 RB	278	return ip->mm_i_format.opcode == mm_addiu32_op &&
635c9907 RB	279	ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
34c2f668	280	#else
c0efbb6d FBH	281	/* addiu/daddiu sp,sp,-imm */
	282	if (ip->i_format.rs != 29 \|\| ip->i_format.rt != 29)
	283	return 0;
	284	if (ip->i_format.opcode == addiu_op \|\| ip->i_format.opcode == daddiu_op)
	285	return 1;
34c2f668	286	#endif
c0efbb6d FBH	287	return 0;
	288	}
	289
f66686f7	290	static int get_frame_info(struct mips_frame_info *info)
1da177e4	291	{
34c2f668 LY	292	#ifdef CONFIG_CPU_MICROMIPS
	293	union mips_instruction ip = (void ) (((char *) info->func) - 1);
	294	#else
c0efbb6d	295	union mips_instruction *ip = info->func;
34c2f668	296	#endif
29b376ff FBH	297	unsigned max_insns = info->func_size / sizeof(union mips_instruction);
29b376ff FBH	298	unsigned i;
c0efbb6d	299
1da177e4	300	info->pc_offset = -1;
63077519	301	info->frame_size = 0;
1da177e4	302
29b376ff FBH	303	if (!ip)
	304	goto err;
	305
	306	if (max_insns == 0)
	307	max_insns = 128U; /* unknown function size */
	308	max_insns = min(128U, max_insns);
	309
c0efbb6d FBH	310	for (i = 0; i < max_insns; i++, ip++) {
c0efbb6d FBH	311
e7438c4b	312	if (is_jump_ins(ip))
63077519	313	break;
0cceb4aa FBH	314	if (!info->frame_size) {
0cceb4aa FBH	315	if (is_sp_move_ins(ip))
34c2f668 LY	316	{
	317	#ifdef CONFIG_CPU_MICROMIPS
	318	if (mm_insn_16bit(ip->halfword[0]))
	319	{
	320	unsigned short tmp;
	321
	322	if (ip->halfword[0] & mm_addiusp_func)
	323	{
	324	tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
	325	info->frame_size = -(signed short)(tmp \| ((tmp & 0x100) ? 0xfe00 : 0));
	326	} else {
	327	tmp = (ip->halfword[0] >> 1);
	328	info->frame_size = -(signed short)(tmp & 0xf);
	329	}
	330	ip = (void *) &ip->halfword[1];
	331	ip--;
	332	} else
	333	#endif
0cceb4aa	334	info->frame_size = - ip->i_format.simmediate;
34c2f668	335	}
0cceb4aa	336	continue;
63077519	337	}
0cceb4aa	338	if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519 AN	339	info->pc_offset =
63077519 AN	340	ip->i_format.simmediate / sizeof(long);
0cceb4aa	341	break;
1da177e4 LT	342	}
1da177e4 LT	343	}
f66686f7 AN	344	if (info->frame_size && info->pc_offset >= 0) /* nested */
	345	return 0;
	346	if (info->pc_offset < 0) /* leaf */
	347	return 1;
	348	/* prologue seems boggus... */
29b376ff	349	err:
f66686f7	350	return -1;
1da177e4 LT	351	}
1da177e4 LT	352
b5943182 FBH	353	static struct mips_frame_info schedule_mfi __read_mostly;
b5943182 FBH	354
5000653e TW	355	#ifdef CONFIG_KALLSYMS
	356	static unsigned long get___schedule_addr(void)
	357	{
	358	return kallsyms_lookup_name("__schedule");
	359	}
	360	#else
	361	static unsigned long get___schedule_addr(void)
	362	{
	363	union mips_instruction ip = (void )schedule;
	364	int max_insns = 8;
	365	int i;
	366
	367	for (i = 0; i < max_insns; i++, ip++) {
	368	if (ip->j_format.opcode == j_op)
	369	return J_TARGET(ip, ip->j_format.target);
	370	}
	371	return 0;
	372	}
	373	#endif
	374
1da177e4 LT	375	static int __init frame_info_init(void)
1da177e4 LT	376	{
b5943182	377	unsigned long size = 0;
63077519	378	#ifdef CONFIG_KALLSYMS
b5943182	379	unsigned long ofs;
5000653e TW	380	#endif
5000653e TW	381	unsigned long addr;
b5943182	382
5000653e TW	383	addr = get___schedule_addr();
	384	if (!addr)
	385	addr = (unsigned long)schedule;
	386
	387	#ifdef CONFIG_KALLSYMS
	388	kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519	389	#endif
5000653e	390	schedule_mfi.func = (void *)addr;
b5943182 FBH	391	schedule_mfi.func_size = size;
	392
	393	get_frame_info(&schedule_mfi);
6057a798 FBH	394
	395	/*
	396	* Without schedule() frame info, result given by
	397	* thread_saved_pc() and get_wchan() are not reliable.
	398	*/
b5943182	399	if (schedule_mfi.pc_offset < 0)
6057a798	400	printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519	401
1da177e4 LT	402	return 0;
	403	}
	404
	405	arch_initcall(frame_info_init);
	406
	407	/*
	408	* Return saved PC of a blocked thread.
	409	*/
	410	unsigned long thread_saved_pc(struct task_struct *tsk)
	411	{
	412	struct thread_struct *t = &tsk->thread;
	413
	414	/* New born processes are a special case */
	415	if (t->reg31 == (unsigned long) ret_from_fork)
	416	return t->reg31;
b5943182	417	if (schedule_mfi.pc_offset < 0)
1da177e4	418	return 0;
b5943182	419	return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4 LT	420	}
1da177e4 LT	421
1da177e4	422
f66686f7	423	#ifdef CONFIG_KALLSYMS
94ea09c6 DK	424	/* generic stack unwinding function */
	425	unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
	426	unsigned long *sp,
	427	unsigned long pc,
	428	unsigned long *ra)
f66686f7	429	{
f66686f7	430	struct mips_frame_info info;
f66686f7	431	unsigned long size, ofs;
4d157d5e	432	int leaf;
1924600c AN	433	extern void ret_from_irq(void);
1924600c AN	434	extern void ret_from_exception(void);
f66686f7	435
f66686f7 AN	436	if (!stack_page)
	437	return 0;
	438
1924600c AN	439	/*
	440	* If we reached the bottom of interrupt context,
	441	* return saved pc in pt_regs.
	442	*/
	443	if (pc == (unsigned long)ret_from_irq \|\|
	444	pc == (unsigned long)ret_from_exception) {
	445	struct pt_regs *regs;
	446	if (*sp >= stack_page &&
	447	sp + sizeof(regs) <= stack_page + THREAD_SIZE - 32) {
	448	regs = (struct pt_regs )sp;
	449	pc = regs->cp0_epc;
a816b306	450	if (!user_mode(regs) && __kernel_text_address(pc)) {
1924600c AN	451	*sp = regs->regs[29];
	452	*ra = regs->regs[31];
	453	return pc;
	454	}
	455	}
	456	return 0;
	457	}
55b74283	458	if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7	459	return 0;
1fd69098	460	/*
25985edc	461	* Return ra if an exception occurred at the first instruction
1fd69098	462	*/
1924600c AN	463	if (unlikely(ofs == 0)) {
	464	pc = *ra;
	465	*ra = 0;
	466	return pc;
	467	}
f66686f7 AN	468
	469	info.func = (void *)(pc - ofs);
	470	info.func_size = ofs; /* analyze from start to ofs */
4d157d5e FBH	471	leaf = get_frame_info(&info);
4d157d5e FBH	472	if (leaf < 0)
f66686f7	473	return 0;
4d157d5e FBH	474
	475	if (*sp < stack_page \|\|
	476	*sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7 AN	477	return 0;
f66686f7 AN	478
4d157d5e FBH	479	if (leaf)
	480	/*
	481	* For some extreme cases, get_frame_info() can
	482	* consider wrongly a nested function as a leaf
	483	* one. In that cases avoid to return always the
	484	* same value.
	485	*/
1924600c	486	pc = pc != ra ? ra : 0;
4d157d5e FBH	487	else
	488	pc = ((unsigned long )(sp))[info.pc_offset];
	489
	490	*sp += info.frame_size;
1924600c	491	*ra = 0;
4d157d5e	492	return __kernel_text_address(pc) ? pc : 0;
f66686f7	493	}
94ea09c6 DK	494	EXPORT_SYMBOL(unwind_stack_by_address);
	495
	496	/* used by show_backtrace() */
	497	unsigned long unwind_stack(struct task_struct task, unsigned long sp,
	498	unsigned long pc, unsigned long *ra)
	499	{
	500	unsigned long stack_page = (unsigned long)task_stack_page(task);
	501	return unwind_stack_by_address(stack_page, sp, pc, ra);
	502	}
f66686f7	503	#endif
b5943182 FBH	504
	505	/*
	506	* get_wchan - a maintenance nightmare^W^Wpain in the ass ...
	507	*/
	508	unsigned long get_wchan(struct task_struct *task)
	509	{
	510	unsigned long pc = 0;
	511	#ifdef CONFIG_KALLSYMS
	512	unsigned long sp;
1924600c	513	unsigned long ra = 0;
b5943182 FBH	514	#endif
	515
	516	if (!task \|\| task == current \|\| task->state == TASK_RUNNING)
	517	goto out;
	518	if (!task_stack_page(task))
	519	goto out;
	520
	521	pc = thread_saved_pc(task);
	522
	523	#ifdef CONFIG_KALLSYMS
	524	sp = task->thread.reg29 + schedule_mfi.frame_size;
	525
	526	while (in_sched_functions(pc))
1924600c	527	pc = unwind_stack(task, &sp, pc, &ra);
b5943182 FBH	528	#endif
	529
	530	out:
	531	return pc;
	532	}
94109102 FBH	533
	534	/*
	535	* Don't forget that the stack pointer must be aligned on a 8 bytes
	536	* boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
	537	*/
	538	unsigned long arch_align_stack(unsigned long sp)
	539	{
	540	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
	541	sp -= get_random_int() & ~PAGE_MASK;
	542
	543	return sp & ALMASK;
	544	}
856839b7 ES	545
	546	static void arch_dump_stack(void *info)
	547	{
	548	struct pt_regs *regs;
	549
	550	regs = get_irq_regs();
	551
	552	if (regs)
	553	show_regs(regs);
	554
	555	dump_stack();
	556	}
	557
	558	void arch_trigger_all_cpu_backtrace(bool include_self)
	559	{
	560	smp_call_function(arch_dump_stack, NULL, 1);
	561	}
9791554b PB	562
	563	int mips_get_process_fp_mode(struct task_struct *task)
	564	{
	565	int value = 0;
	566
	567	if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
	568	value \|= PR_FP_MODE_FR;
	569	if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
	570	value \|= PR_FP_MODE_FRE;
	571
	572	return value;
	573	}
	574
6b832257 PB	575	static void prepare_for_fp_mode_switch(void *info)
	576	{
	577	struct mm_struct *mm = info;
	578
	579	if (current->mm == mm)
	580	lose_fpu(1);
	581	}
	582
9791554b PB	583	int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
	584	{
	585	const unsigned int known_bits = PR_FP_MODE_FR \| PR_FP_MODE_FRE;
9791554b	586	struct task_struct *t;
6b832257	587	int max_users;
9791554b PB	588
	589	/* Check the value is valid */
	590	if (value & ~known_bits)
	591	return -EOPNOTSUPP;
	592
	593	/* Avoid inadvertently triggering emulation */
	594	if ((value & PR_FP_MODE_FR) && cpu_has_fpu &&
	595	!(current_cpu_data.fpu_id & MIPS_FPIR_F64))
	596	return -EOPNOTSUPP;
	597	if ((value & PR_FP_MODE_FRE) && cpu_has_fpu && !cpu_has_fre)
	598	return -EOPNOTSUPP;
	599
13e45f09 MC	600	/* FR = 0 not supported in MIPS R6 */
	601	if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6)
	602	return -EOPNOTSUPP;
	603
bd239f1e PB	604	/* Proceed with the mode switch */
	605	preempt_disable();
	606
9791554b PB	607	/* Save FP & vector context, then disable FPU & MSA */
	608	if (task->signal == current->signal)
	609	lose_fpu(1);
	610
	611	/* Prevent any threads from obtaining live FP context */
	612	atomic_set(&task->mm->context.fp_mode_switching, 1);
	613	smp_mb__after_atomic();
	614
	615	/*
6b832257 PB	616	* If there are multiple online CPUs then force any which are running
	617	* threads in this process to lose their FPU context, which they can't
	618	* regain until fp_mode_switching is cleared later.
9791554b PB	619	*/
9791554b PB	620	if (num_online_cpus() > 1) {
6b832257 PB	621	/* No need to send an IPI for the local CPU */
6b832257 PB	622	max_users = (task->mm == current->mm) ? 1 : 0;
9791554b	623
6b832257 PB	624	if (atomic_read(&current->mm->mm_users) > max_users)
	625	smp_call_function(prepare_for_fp_mode_switch,
	626	(void *)current->mm, 1);
9791554b PB	627	}
	628
	629	/*
	630	* There are now no threads of the process with live FP context, so it
	631	* is safe to proceed with the FP mode switch.
	632	*/
	633	for_each_thread(task, t) {
	634	/* Update desired FP register width */
	635	if (value & PR_FP_MODE_FR) {
	636	clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
	637	} else {
	638	set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
	639	clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
	640	}
	641
	642	/* Update desired FP single layout */
	643	if (value & PR_FP_MODE_FRE)
	644	set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
	645	else
	646	clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
	647	}
	648
	649	/* Allow threads to use FP again */
	650	atomic_set(&task->mm->context.fp_mode_switching, 0);
bd239f1e	651	preempt_enable();
9791554b PB	652
	653	return 0;
	654	}