[deliverable/linux.git] / arch / mips / kernel / process.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 * Copyright (C) 2004 Thiemo Seufer
 * Copyright (C) 2013  Imagination Technologies Ltd.
 */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/tick.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/export.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/personality.h>
#include <linux/sys.h>
#include <linux/user.h>
#include <linux/init.h>
#include <linux/completion.h>
#include <linux/kallsyms.h>
#include <linux/random.h>

#include <asm/asm.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/dsp.h>
#include <asm/fpu.h>
#include <asm/msa.h>
#include <asm/pgtable.h>
#include <asm/mipsregs.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/elf.h>
#include <asm/isadep.h>
#include <asm/inst.h>
#include <asm/stacktrace.h>

#ifdef CONFIG_HOTPLUG_CPU
void arch_cpu_idle_dead(void)
{
	/* What the heck is this check doing ? */
	if (!cpu_isset(smp_processor_id(), cpu_callin_map))
		play_dead();
}
#endif

asmlinkage void ret_from_fork(void);
asmlinkage void ret_from_kernel_thread(void);

void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
{
	unsigned long status;

	/* New thread loses kernel privileges. */
	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
	status |= KU_USER;
	regs->cp0_status = status;
	clear_used_math();
	clear_fpu_owner();
	init_dsp();
	clear_thread_flag(TIF_MSA_CTX_LIVE);
	disable_msa();
	regs->cp0_epc = pc;
	regs->regs[29] = sp;
}

void exit_thread(void)
{
}

void flush_thread(void)
{
}

int copy_thread(unsigned long clone_flags, unsigned long usp,
	unsigned long arg, struct task_struct *p)
{
	struct thread_info *ti = task_thread_info(p);
	struct pt_regs *childregs, *regs = current_pt_regs();
	unsigned long childksp;
	p->set_child_tid = p->clear_child_tid = NULL;

	childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;

	preempt_disable();

	if (is_msa_enabled())
		save_msa(p);
	else if (is_fpu_owner())
		save_fp(p);

	if (cpu_has_dsp)
		save_dsp(p);

	preempt_enable();

	/* set up new TSS. */
	childregs = (struct pt_regs *) childksp - 1;
	/*  Put the stack after the struct pt_regs.  */
	childksp = (unsigned long) childregs;
	p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
	if (unlikely(p->flags & PF_KTHREAD)) {
		unsigned long status = p->thread.cp0_status;
		memset(childregs, 0, sizeof(struct pt_regs));
		ti->addr_limit = KERNEL_DS;
		p->thread.reg16 = usp; /* fn */
		p->thread.reg17 = arg;
		p->thread.reg29 = childksp;
		p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
		status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
			 ((status & (ST0_KUC | ST0_IEC)) << 2);
#else
		status |= ST0_EXL;
#endif
		childregs->cp0_status = status;
		return 0;
	}
	*childregs = *regs;
	childregs->regs[7] = 0; /* Clear error flag */
	childregs->regs[2] = 0; /* Child gets zero as return value */
	if (usp)
		childregs->regs[29] = usp;
	ti->addr_limit = USER_DS;

	p->thread.reg29 = (unsigned long) childregs;
	p->thread.reg31 = (unsigned long) ret_from_fork;

	/*
	 * New tasks lose permission to use the fpu. This accelerates context
	 * switching for most programs since they don't use the fpu.
	 */
	childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);

#ifdef CONFIG_MIPS_MT_SMTC
	/*
	 * SMTC restores TCStatus after Status, and the CU bits
	 * are aliased there.
	 */
	childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);
#endif
	clear_tsk_thread_flag(p, TIF_USEDFPU);

#ifdef CONFIG_MIPS_MT_FPAFF
	clear_tsk_thread_flag(p, TIF_FPUBOUND);
#endif /* CONFIG_MIPS_MT_FPAFF */

	if (clone_flags & CLONE_SETTLS)
		ti->tp_value = regs->regs[7];

	return 0;
}

/* Fill in the fpu structure for a core dump.. */
int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
{
	int i;

	for (i = 0; i < NUM_FPU_REGS; i++)
		memcpy(&r[i], &current->thread.fpu.fpr[i], sizeof(*r));

	memcpy(&r[NUM_FPU_REGS], &current->thread.fpu.fcr31,
	       sizeof(current->thread.fpu.fcr31));

	return 1;
}

void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
{
	int i;

	for (i = 0; i < EF_R0; i++)
		gp[i] = 0;
	gp[EF_R0] = 0;
	for (i = 1; i <= 31; i++)
		gp[EF_R0 + i] = regs->regs[i];
	gp[EF_R26] = 0;
	gp[EF_R27] = 0;
	gp[EF_LO] = regs->lo;
	gp[EF_HI] = regs->hi;
	gp[EF_CP0_EPC] = regs->cp0_epc;
	gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
	gp[EF_CP0_STATUS] = regs->cp0_status;
	gp[EF_CP0_CAUSE] = regs->cp0_cause;
#ifdef EF_UNUSED0
	gp[EF_UNUSED0] = 0;
#endif
}

int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
{
	elf_dump_regs(*regs, task_pt_regs(tsk));
	return 1;
}

int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
{
	int i;

	for (i = 0; i < NUM_FPU_REGS; i++)
		memcpy(&fpr[i], &t->thread.fpu.fpr[i], sizeof(*fpr));

	memcpy(&fpr[NUM_FPU_REGS], &t->thread.fpu.fcr31,
	       sizeof(t->thread.fpu.fcr31));

	return 1;
}

#ifdef CONFIG_CC_STACKPROTECTOR
#include <linux/stackprotector.h>
unsigned long __stack_chk_guard __read_mostly;
EXPORT_SYMBOL(__stack_chk_guard);
#endif

struct mips_frame_info {
	void		*func;
	unsigned long	func_size;
	int		frame_size;
	int		pc_offset;
};

#define J_TARGET(pc,target)	\
		(((unsigned long)(pc) & 0xf0000000) | ((target) << 2))

static inline int is_ra_save_ins(union mips_instruction *ip)
{
#ifdef CONFIG_CPU_MICROMIPS
	union mips_instruction mmi;

	/*
	 * swsp ra,offset
	 * swm16 reglist,offset(sp)
	 * swm32 reglist,offset(sp)
	 * sw32 ra,offset(sp)
	 * jradiussp - NOT SUPPORTED
	 *
	 * microMIPS is way more fun...
	 */
	if (mm_insn_16bit(ip->halfword[0])) {
		mmi.word = (ip->halfword[0] << 16);
		return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
			 mmi.mm16_r5_format.rt == 31) ||
			(mmi.mm16_m_format.opcode == mm_pool16c_op &&
			 mmi.mm16_m_format.func == mm_swm16_op));
	}
	else {
		mmi.halfword[0] = ip->halfword[1];
		mmi.halfword[1] = ip->halfword[0];
		return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
			 mmi.mm_m_format.rd > 9 &&
			 mmi.mm_m_format.base == 29 &&
			 mmi.mm_m_format.func == mm_swm32_func) ||
			(mmi.i_format.opcode == mm_sw32_op &&
			 mmi.i_format.rs == 29 &&
			 mmi.i_format.rt == 31));
	}
#else
	/* sw / sd $ra, offset($sp) */
	return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
		ip->i_format.rs == 29 &&
		ip->i_format.rt == 31;
#endif
}

static inline int is_jump_ins(union mips_instruction *ip)
{
#ifdef CONFIG_CPU_MICROMIPS
	/*
	 * jr16,jrc,jalr16,jalr16
	 * jal
	 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
	 * jraddiusp - NOT SUPPORTED
	 *
	 * microMIPS is kind of more fun...
	 */
	union mips_instruction mmi;

	mmi.word = (ip->halfword[0] << 16);

	if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
	    (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
	    ip->j_format.opcode == mm_jal32_op)
		return 1;
	if (ip->r_format.opcode != mm_pool32a_op ||
			ip->r_format.func != mm_pool32axf_op)
		return 0;
	return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
#else
	if (ip->j_format.opcode == j_op)
		return 1;
	if (ip->j_format.opcode == jal_op)
		return 1;
	if (ip->r_format.opcode != spec_op)
		return 0;
	return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
#endif
}

static inline int is_sp_move_ins(union mips_instruction *ip)
{
#ifdef CONFIG_CPU_MICROMIPS
	/*
	 * addiusp -imm
	 * addius5 sp,-imm
	 * addiu32 sp,sp,-imm
	 * jradiussp - NOT SUPPORTED
	 *
	 * microMIPS is not more fun...
	 */
	if (mm_insn_16bit(ip->halfword[0])) {
		union mips_instruction mmi;

		mmi.word = (ip->halfword[0] << 16);
		return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
			 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
			(mmi.mm16_r5_format.opcode == mm_pool16d_op &&
			 mmi.mm16_r5_format.rt == 29));
	}
	return (ip->mm_i_format.opcode == mm_addiu32_op &&
		 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
#else
	/* addiu/daddiu sp,sp,-imm */
	if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
		return 0;
	if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
		return 1;
#endif
	return 0;
}

static int get_frame_info(struct mips_frame_info *info)
{
#ifdef CONFIG_CPU_MICROMIPS
	union mips_instruction *ip = (void *) (((char *) info->func) - 1);
#else
	union mips_instruction *ip = info->func;
#endif
	unsigned max_insns = info->func_size / sizeof(union mips_instruction);
	unsigned i;

	info->pc_offset = -1;
	info->frame_size = 0;

	if (!ip)
		goto err;

	if (max_insns == 0)
		max_insns = 128U;	/* unknown function size */
	max_insns = min(128U, max_insns);

	for (i = 0; i < max_insns; i++, ip++) {

		if (is_jump_ins(ip))
			break;
		if (!info->frame_size) {
			if (is_sp_move_ins(ip))
			{
#ifdef CONFIG_CPU_MICROMIPS
				if (mm_insn_16bit(ip->halfword[0]))
				{
					unsigned short tmp;

					if (ip->halfword[0] & mm_addiusp_func)
					{
						tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
						info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
					} else {
						tmp = (ip->halfword[0] >> 1);
						info->frame_size = -(signed short)(tmp & 0xf);
					}
					ip = (void *) &ip->halfword[1];
					ip--;
				} else
#endif
				info->frame_size = - ip->i_format.simmediate;
			}
			continue;
		}
		if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
			info->pc_offset =
				ip->i_format.simmediate / sizeof(long);
			break;
		}
	}
	if (info->frame_size && info->pc_offset >= 0) /* nested */
		return 0;
	if (info->pc_offset < 0) /* leaf */
		return 1;
	/* prologue seems boggus... */
err:
	return -1;
}

static struct mips_frame_info schedule_mfi __read_mostly;

#ifdef CONFIG_KALLSYMS
static unsigned long get___schedule_addr(void)
{
	return kallsyms_lookup_name("__schedule");
}
#else
static unsigned long get___schedule_addr(void)
{
	union mips_instruction *ip = (void *)schedule;
	int max_insns = 8;
	int i;

	for (i = 0; i < max_insns; i++, ip++) {
		if (ip->j_format.opcode == j_op)
			return J_TARGET(ip, ip->j_format.target);
	}
	return 0;
}
#endif

static int __init frame_info_init(void)
{
	unsigned long size = 0;
#ifdef CONFIG_KALLSYMS
	unsigned long ofs;
#endif
	unsigned long addr;

	addr = get___schedule_addr();
	if (!addr)
		addr = (unsigned long)schedule;

#ifdef CONFIG_KALLSYMS
	kallsyms_lookup_size_offset(addr, &size, &ofs);
#endif
	schedule_mfi.func = (void *)addr;
	schedule_mfi.func_size = size;

	get_frame_info(&schedule_mfi);

	/*
	 * Without schedule() frame info, result given by
	 * thread_saved_pc() and get_wchan() are not reliable.
	 */
	if (schedule_mfi.pc_offset < 0)
		printk("Can't analyze schedule() prologue at %p\n", schedule);

	return 0;
}

arch_initcall(frame_info_init);

/*
 * Return saved PC of a blocked thread.
 */
unsigned long thread_saved_pc(struct task_struct *tsk)
{
	struct thread_struct *t = &tsk->thread;

	/* New born processes are a special case */
	if (t->reg31 == (unsigned long) ret_from_fork)
		return t->reg31;
	if (schedule_mfi.pc_offset < 0)
		return 0;
	return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
}


#ifdef CONFIG_KALLSYMS
/* generic stack unwinding function */
unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
					      unsigned long *sp,
					      unsigned long pc,
					      unsigned long *ra)
{
	struct mips_frame_info info;
	unsigned long size, ofs;
	int leaf;
	extern void ret_from_irq(void);
	extern void ret_from_exception(void);

	if (!stack_page)
		return 0;

	/*
	 * If we reached the bottom of interrupt context,
	 * return saved pc in pt_regs.
	 */
	if (pc == (unsigned long)ret_from_irq ||
	    pc == (unsigned long)ret_from_exception) {
		struct pt_regs *regs;
		if (*sp >= stack_page &&
		    *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
			regs = (struct pt_regs *)*sp;
			pc = regs->cp0_epc;
			if (__kernel_text_address(pc)) {
				*sp = regs->regs[29];
				*ra = regs->regs[31];
				return pc;
			}
		}
		return 0;
	}
	if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
		return 0;
	/*
	 * Return ra if an exception occurred at the first instruction
	 */
	if (unlikely(ofs == 0)) {
		pc = *ra;
		*ra = 0;
		return pc;
	}

	info.func = (void *)(pc - ofs);
	info.func_size = ofs;	/* analyze from start to ofs */
	leaf = get_frame_info(&info);
	if (leaf < 0)
		return 0;

	if (*sp < stack_page ||
	    *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
		return 0;

	if (leaf)
		/*
		 * For some extreme cases, get_frame_info() can
		 * consider wrongly a nested function as a leaf
		 * one. In that cases avoid to return always the
		 * same value.
		 */
		pc = pc != *ra ? *ra : 0;
	else
		pc = ((unsigned long *)(*sp))[info.pc_offset];

	*sp += info.frame_size;
	*ra = 0;
	return __kernel_text_address(pc) ? pc : 0;
}
EXPORT_SYMBOL(unwind_stack_by_address);

/* used by show_backtrace() */
unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
			   unsigned long pc, unsigned long *ra)
{
	unsigned long stack_page = (unsigned long)task_stack_page(task);
	return unwind_stack_by_address(stack_page, sp, pc, ra);
}
#endif

/*
 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
 */
unsigned long get_wchan(struct task_struct *task)
{
	unsigned long pc = 0;
#ifdef CONFIG_KALLSYMS
	unsigned long sp;
	unsigned long ra = 0;
#endif

	if (!task || task == current || task->state == TASK_RUNNING)
		goto out;
	if (!task_stack_page(task))
		goto out;

	pc = thread_saved_pc(task);

#ifdef CONFIG_KALLSYMS
	sp = task->thread.reg29 + schedule_mfi.frame_size;

	while (in_sched_functions(pc))
		pc = unwind_stack(task, &sp, pc, &ra);
#endif

out:
	return pc;
}

/*
 * Don't forget that the stack pointer must be aligned on a 8 bytes
 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
 */
unsigned long arch_align_stack(unsigned long sp)
{
	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
		sp -= get_random_int() & ~PAGE_MASK;

	return sp & ALMASK;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47	7	* Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4 LT	8	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
1da177e4 LT	9	* Copyright (C) 2004 Thiemo Seufer
34c2f668	10	* Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4	11	*/
1da177e4	12	#include <linux/errno.h>
1da177e4	13	#include <linux/sched.h>
7bcf7717	14	#include <linux/tick.h>
1da177e4 LT	15	#include <linux/kernel.h>
	16	#include <linux/mm.h>
	17	#include <linux/stddef.h>
	18	#include <linux/unistd.h>
cae39d13	19	#include <linux/export.h>
1da177e4	20	#include <linux/ptrace.h>
1da177e4 LT	21	#include <linux/mman.h>
	22	#include <linux/personality.h>
	23	#include <linux/sys.h>
	24	#include <linux/user.h>
1da177e4 LT	25	#include <linux/init.h>
1da177e4 LT	26	#include <linux/completion.h>
63077519	27	#include <linux/kallsyms.h>
94109102	28	#include <linux/random.h>
1da177e4	29
94109102	30	#include <asm/asm.h>
1da177e4 LT	31	#include <asm/bootinfo.h>
1da177e4 LT	32	#include <asm/cpu.h>
e50c0a8f	33	#include <asm/dsp.h>
1da177e4	34	#include <asm/fpu.h>
1db1af84	35	#include <asm/msa.h>
1da177e4	36	#include <asm/pgtable.h>
1da177e4 LT	37	#include <asm/mipsregs.h>
	38	#include <asm/processor.h>
	39	#include <asm/uaccess.h>
	40	#include <asm/io.h>
	41	#include <asm/elf.h>
	42	#include <asm/isadep.h>
	43	#include <asm/inst.h>
1df0f0ff	44	#include <asm/stacktrace.h>
1da177e4	45
cdbedc61 TG	46	#ifdef CONFIG_HOTPLUG_CPU
cdbedc61 TG	47	void arch_cpu_idle_dead(void)
1da177e4	48	{
cdbedc61 TG	49	/* What the heck is this check doing ? */
	50	if (!cpu_isset(smp_processor_id(), cpu_callin_map))
	51	play_dead();
	52	}
	53	#endif
1b2bc75c	54
1da177e4	55	asmlinkage void ret_from_fork(void);
8f54bcac	56	asmlinkage void ret_from_kernel_thread(void);
1da177e4 LT	57
	58	void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
	59	{
	60	unsigned long status;
	61
	62	/* New thread loses kernel privileges. */
bbaf238b	63	status = regs->cp0_status & ~(ST0_CU0\|ST0_CU1\|ST0_FR\|KU_MASK);
1da177e4 LT	64	status \|= KU_USER;
	65	regs->cp0_status = status;
	66	clear_used_math();
e04582b7	67	clear_fpu_owner();
a3056b1c	68	init_dsp();
1db1af84 PB	69	clear_thread_flag(TIF_MSA_CTX_LIVE);
1db1af84 PB	70	disable_msa();
1da177e4 LT	71	regs->cp0_epc = pc;
1da177e4 LT	72	regs->regs[29] = sp;
1da177e4 LT	73	}
	74
	75	void exit_thread(void)
	76	{
	77	}
	78
	79	void flush_thread(void)
	80	{
	81	}
	82
6f2c55b8	83	int copy_thread(unsigned long clone_flags, unsigned long usp,
afa86fc4	84	unsigned long arg, struct task_struct *p)
1da177e4	85	{
75bb07e7	86	struct thread_info *ti = task_thread_info(p);
afa86fc4	87	struct pt_regs childregs, regs = current_pt_regs();
484889fc	88	unsigned long childksp;
3c37026d	89	p->set_child_tid = p->clear_child_tid = NULL;
1da177e4	90
75bb07e7	91	childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4 LT	92
	93	preempt_disable();
	94
1db1af84 PB	95	if (is_msa_enabled())
	96	save_msa(p);
	97	else if (is_fpu_owner())
1da177e4	98	save_fp(p);
e50c0a8f RB	99
	100	if (cpu_has_dsp)
	101	save_dsp(p);
1da177e4 LT	102
	103	preempt_enable();
	104
	105	/* set up new TSS. */
	106	childregs = (struct pt_regs *) childksp - 1;
484889fc DD	107	/* Put the stack after the struct pt_regs. */
484889fc DD	108	childksp = (unsigned long) childregs;
8f54bcac AV	109	p->thread.cp0_status = read_c0_status() & ~(ST0_CU2\|ST0_CU1);
	110	if (unlikely(p->flags & PF_KTHREAD)) {
	111	unsigned long status = p->thread.cp0_status;
	112	memset(childregs, 0, sizeof(struct pt_regs));
	113	ti->addr_limit = KERNEL_DS;
	114	p->thread.reg16 = usp; /* fn */
	115	p->thread.reg17 = arg;
	116	p->thread.reg29 = childksp;
	117	p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
	118	#if defined(CONFIG_CPU_R3000) \|\| defined(CONFIG_CPU_TX39XX)
	119	status = (status & ~(ST0_KUP \| ST0_IEP \| ST0_IEC)) \|
	120	((status & (ST0_KUC \| ST0_IEC)) << 2);
	121	#else
	122	status \|= ST0_EXL;
	123	#endif
	124	childregs->cp0_status = status;
	125	return 0;
	126	}
1da177e4	127	childregs = regs;
70342287 RB	128	childregs->regs[7] = 0; /* Clear error flag */
70342287 RB	129	childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d AV	130	if (usp)
64b3122d AV	131	childregs->regs[29] = usp;
8f54bcac	132	ti->addr_limit = USER_DS;
1da177e4	133
1da177e4 LT	134	p->thread.reg29 = (unsigned long) childregs;
	135	p->thread.reg31 = (unsigned long) ret_from_fork;
	136
	137	/*
	138	* New tasks lose permission to use the fpu. This accelerates context
	139	* switching for most programs since they don't use the fpu.
	140	*/
1da177e4	141	childregs->cp0_status &= ~(ST0_CU2\|ST0_CU1);
1da177e4	142
9cc12363	143	#ifdef CONFIG_MIPS_MT_SMTC
f088fc84	144	/*
9cc12363 KK	145	* SMTC restores TCStatus after Status, and the CU bits
9cc12363 KK	146	* are aliased there.
f088fc84	147	*/
9cc12363 KK	148	childregs->cp0_tcstatus &= ~(ST0_CU2\|ST0_CU1);
9cc12363 KK	149	#endif
1da177e4 LT	150	clear_tsk_thread_flag(p, TIF_USEDFPU);
1da177e4 LT	151
f088fc84	152	#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a	153	clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84 RB	154	#endif /* CONFIG_MIPS_MT_FPAFF */
f088fc84 RB	155
3c37026d RB	156	if (clone_flags & CLONE_SETTLS)
	157	ti->tp_value = regs->regs[7];
	158
1da177e4 LT	159	return 0;
	160	}
	161
	162	/* Fill in the fpu structure for a core dump.. */
	163	int dump_fpu(struct pt_regs regs, elf_fpregset_t r)
	164	{
6cec7c4a PB	165	int i;
	166
	167	for (i = 0; i < NUM_FPU_REGS; i++)
	168	memcpy(&r[i], &current->thread.fpu.fpr[i], sizeof(*r));
	169
	170	memcpy(&r[NUM_FPU_REGS], &current->thread.fpu.fcr31,
	171	sizeof(current->thread.fpu.fcr31));
1da177e4 LT	172
	173	return 1;
	174	}
	175
d56efda4	176	void elf_dump_regs(elf_greg_t gp, struct pt_regs regs)
1da177e4 LT	177	{
	178	int i;
	179
	180	for (i = 0; i < EF_R0; i++)
	181	gp[i] = 0;
	182	gp[EF_R0] = 0;
	183	for (i = 1; i <= 31; i++)
	184	gp[EF_R0 + i] = regs->regs[i];
	185	gp[EF_R26] = 0;
	186	gp[EF_R27] = 0;
	187	gp[EF_LO] = regs->lo;
	188	gp[EF_HI] = regs->hi;
	189	gp[EF_CP0_EPC] = regs->cp0_epc;
	190	gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
	191	gp[EF_CP0_STATUS] = regs->cp0_status;
	192	gp[EF_CP0_CAUSE] = regs->cp0_cause;
	193	#ifdef EF_UNUSED0
	194	gp[EF_UNUSED0] = 0;
	195	#endif
	196	}
	197
49a89efb	198	int dump_task_regs(struct task_struct tsk, elf_gregset_t regs)
71e0e556	199	{
40bc9c67	200	elf_dump_regs(*regs, task_pt_regs(tsk));
71e0e556 RB	201	return 1;
	202	}
	203
49a89efb	204	int dump_task_fpu(struct task_struct t, elf_fpregset_t fpr)
1da177e4	205	{
6cec7c4a PB	206	int i;
	207
	208	for (i = 0; i < NUM_FPU_REGS; i++)
	209	memcpy(&fpr[i], &t->thread.fpu.fpr[i], sizeof(*fpr));
	210
	211	memcpy(&fpr[NUM_FPU_REGS], &t->thread.fpu.fcr31,
	212	sizeof(t->thread.fpu.fcr31));
1da177e4 LT	213
	214	return 1;
	215	}
	216
36ecafc5 GF	217	#ifdef CONFIG_CC_STACKPROTECTOR
	218	#include <linux/stackprotector.h>
	219	unsigned long __stack_chk_guard __read_mostly;
	220	EXPORT_SYMBOL(__stack_chk_guard);
	221	#endif
	222
b5943182 FBH	223	struct mips_frame_info {
	224	void *func;
	225	unsigned long func_size;
	226	int frame_size;
	227	int pc_offset;
	228	};
dc953df1	229
5000653e TW	230	#define J_TARGET(pc,target) \
	231	(((unsigned long)(pc) & 0xf0000000) \| ((target) << 2))
	232
c0efbb6d FBH	233	static inline int is_ra_save_ins(union mips_instruction *ip)
c0efbb6d FBH	234	{
34c2f668 LY	235	#ifdef CONFIG_CPU_MICROMIPS
	236	union mips_instruction mmi;
	237
	238	/*
	239	* swsp ra,offset
	240	* swm16 reglist,offset(sp)
	241	* swm32 reglist,offset(sp)
	242	* sw32 ra,offset(sp)
	243	* jradiussp - NOT SUPPORTED
	244	*
	245	* microMIPS is way more fun...
	246	*/
	247	if (mm_insn_16bit(ip->halfword[0])) {
	248	mmi.word = (ip->halfword[0] << 16);
	249	return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
	250	mmi.mm16_r5_format.rt == 31) \|\|
	251	(mmi.mm16_m_format.opcode == mm_pool16c_op &&
	252	mmi.mm16_m_format.func == mm_swm16_op));
	253	}
	254	else {
	255	mmi.halfword[0] = ip->halfword[1];
	256	mmi.halfword[1] = ip->halfword[0];
	257	return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
	258	mmi.mm_m_format.rd > 9 &&
	259	mmi.mm_m_format.base == 29 &&
	260	mmi.mm_m_format.func == mm_swm32_func) \|\|
	261	(mmi.i_format.opcode == mm_sw32_op &&
	262	mmi.i_format.rs == 29 &&
	263	mmi.i_format.rt == 31));
	264	}
	265	#else
c0efbb6d FBH	266	/* sw / sd $ra, offset($sp) */
	267	return (ip->i_format.opcode == sw_op \|\| ip->i_format.opcode == sd_op) &&
	268	ip->i_format.rs == 29 &&
	269	ip->i_format.rt == 31;
34c2f668	270	#endif
c0efbb6d FBH	271	}
c0efbb6d FBH	272
e7438c4b	273	static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d	274	{
34c2f668 LY	275	#ifdef CONFIG_CPU_MICROMIPS
	276	/*
	277	* jr16,jrc,jalr16,jalr16
	278	* jal
	279	* jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
	280	* jraddiusp - NOT SUPPORTED
	281	*
	282	* microMIPS is kind of more fun...
	283	*/
	284	union mips_instruction mmi;
	285
	286	mmi.word = (ip->halfword[0] << 16);
	287
	288	if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
	289	(mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) \|\|
	290	ip->j_format.opcode == mm_jal32_op)
	291	return 1;
	292	if (ip->r_format.opcode != mm_pool32a_op \|\|
	293	ip->r_format.func != mm_pool32axf_op)
	294	return 0;
	295	return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
	296	#else
e7438c4b TW	297	if (ip->j_format.opcode == j_op)
e7438c4b TW	298	return 1;
c0efbb6d FBH	299	if (ip->j_format.opcode == jal_op)
	300	return 1;
	301	if (ip->r_format.opcode != spec_op)
	302	return 0;
	303	return ip->r_format.func == jalr_op \|\| ip->r_format.func == jr_op;
34c2f668	304	#endif
c0efbb6d FBH	305	}
	306
	307	static inline int is_sp_move_ins(union mips_instruction *ip)
	308	{
34c2f668 LY	309	#ifdef CONFIG_CPU_MICROMIPS
	310	/*
	311	* addiusp -imm
	312	* addius5 sp,-imm
	313	* addiu32 sp,sp,-imm
	314	* jradiussp - NOT SUPPORTED
	315	*
	316	* microMIPS is not more fun...
	317	*/
	318	if (mm_insn_16bit(ip->halfword[0])) {
	319	union mips_instruction mmi;
	320
	321	mmi.word = (ip->halfword[0] << 16);
	322	return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
	323	mmi.mm16_r3_format.simmediate && mm_addiusp_func) \|\|
	324	(mmi.mm16_r5_format.opcode == mm_pool16d_op &&
	325	mmi.mm16_r5_format.rt == 29));
	326	}
	327	return (ip->mm_i_format.opcode == mm_addiu32_op &&
	328	ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
	329	#else
c0efbb6d FBH	330	/* addiu/daddiu sp,sp,-imm */
	331	if (ip->i_format.rs != 29 \|\| ip->i_format.rt != 29)
	332	return 0;
	333	if (ip->i_format.opcode == addiu_op \|\| ip->i_format.opcode == daddiu_op)
	334	return 1;
34c2f668	335	#endif
c0efbb6d FBH	336	return 0;
	337	}
	338
f66686f7	339	static int get_frame_info(struct mips_frame_info *info)
1da177e4	340	{
34c2f668 LY	341	#ifdef CONFIG_CPU_MICROMIPS
	342	union mips_instruction ip = (void ) (((char *) info->func) - 1);
	343	#else
c0efbb6d	344	union mips_instruction *ip = info->func;
34c2f668	345	#endif
29b376ff FBH	346	unsigned max_insns = info->func_size / sizeof(union mips_instruction);
29b376ff FBH	347	unsigned i;
c0efbb6d	348
1da177e4	349	info->pc_offset = -1;
63077519	350	info->frame_size = 0;
1da177e4	351
29b376ff FBH	352	if (!ip)
	353	goto err;
	354
	355	if (max_insns == 0)
	356	max_insns = 128U; /* unknown function size */
	357	max_insns = min(128U, max_insns);
	358
c0efbb6d FBH	359	for (i = 0; i < max_insns; i++, ip++) {
c0efbb6d FBH	360
e7438c4b	361	if (is_jump_ins(ip))
63077519	362	break;
0cceb4aa FBH	363	if (!info->frame_size) {
0cceb4aa FBH	364	if (is_sp_move_ins(ip))
34c2f668 LY	365	{
	366	#ifdef CONFIG_CPU_MICROMIPS
	367	if (mm_insn_16bit(ip->halfword[0]))
	368	{
	369	unsigned short tmp;
	370
	371	if (ip->halfword[0] & mm_addiusp_func)
	372	{
	373	tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
	374	info->frame_size = -(signed short)(tmp \| ((tmp & 0x100) ? 0xfe00 : 0));
	375	} else {
	376	tmp = (ip->halfword[0] >> 1);
	377	info->frame_size = -(signed short)(tmp & 0xf);
	378	}
	379	ip = (void *) &ip->halfword[1];
	380	ip--;
	381	} else
	382	#endif
0cceb4aa	383	info->frame_size = - ip->i_format.simmediate;
34c2f668	384	}
0cceb4aa	385	continue;
63077519	386	}
0cceb4aa	387	if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519 AN	388	info->pc_offset =
63077519 AN	389	ip->i_format.simmediate / sizeof(long);
0cceb4aa	390	break;
1da177e4 LT	391	}
1da177e4 LT	392	}
f66686f7 AN	393	if (info->frame_size && info->pc_offset >= 0) /* nested */
	394	return 0;
	395	if (info->pc_offset < 0) /* leaf */
	396	return 1;
	397	/* prologue seems boggus... */
29b376ff	398	err:
f66686f7	399	return -1;
1da177e4 LT	400	}
1da177e4 LT	401
b5943182 FBH	402	static struct mips_frame_info schedule_mfi __read_mostly;
b5943182 FBH	403
5000653e TW	404	#ifdef CONFIG_KALLSYMS
	405	static unsigned long get___schedule_addr(void)
	406	{
	407	return kallsyms_lookup_name("__schedule");
	408	}
	409	#else
	410	static unsigned long get___schedule_addr(void)
	411	{
	412	union mips_instruction ip = (void )schedule;
	413	int max_insns = 8;
	414	int i;
	415
	416	for (i = 0; i < max_insns; i++, ip++) {
	417	if (ip->j_format.opcode == j_op)
	418	return J_TARGET(ip, ip->j_format.target);
	419	}
	420	return 0;
	421	}
	422	#endif
	423
1da177e4 LT	424	static int __init frame_info_init(void)
1da177e4 LT	425	{
b5943182	426	unsigned long size = 0;
63077519	427	#ifdef CONFIG_KALLSYMS
b5943182	428	unsigned long ofs;
5000653e TW	429	#endif
5000653e TW	430	unsigned long addr;
b5943182	431
5000653e TW	432	addr = get___schedule_addr();
	433	if (!addr)
	434	addr = (unsigned long)schedule;
	435
	436	#ifdef CONFIG_KALLSYMS
	437	kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519	438	#endif
5000653e	439	schedule_mfi.func = (void *)addr;
b5943182 FBH	440	schedule_mfi.func_size = size;
	441
	442	get_frame_info(&schedule_mfi);
6057a798 FBH	443
	444	/*
	445	* Without schedule() frame info, result given by
	446	* thread_saved_pc() and get_wchan() are not reliable.
	447	*/
b5943182	448	if (schedule_mfi.pc_offset < 0)
6057a798	449	printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519	450
1da177e4 LT	451	return 0;
	452	}
	453
	454	arch_initcall(frame_info_init);
	455
	456	/*
	457	* Return saved PC of a blocked thread.
	458	*/
	459	unsigned long thread_saved_pc(struct task_struct *tsk)
	460	{
	461	struct thread_struct *t = &tsk->thread;
	462
	463	/* New born processes are a special case */
	464	if (t->reg31 == (unsigned long) ret_from_fork)
	465	return t->reg31;
b5943182	466	if (schedule_mfi.pc_offset < 0)
1da177e4	467	return 0;
b5943182	468	return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4 LT	469	}
1da177e4 LT	470
1da177e4	471
f66686f7	472	#ifdef CONFIG_KALLSYMS
94ea09c6 DK	473	/* generic stack unwinding function */
	474	unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
	475	unsigned long *sp,
	476	unsigned long pc,
	477	unsigned long *ra)
f66686f7	478	{
f66686f7	479	struct mips_frame_info info;
f66686f7	480	unsigned long size, ofs;
4d157d5e	481	int leaf;
1924600c AN	482	extern void ret_from_irq(void);
1924600c AN	483	extern void ret_from_exception(void);
f66686f7	484
f66686f7 AN	485	if (!stack_page)
	486	return 0;
	487
1924600c AN	488	/*
	489	* If we reached the bottom of interrupt context,
	490	* return saved pc in pt_regs.
	491	*/
	492	if (pc == (unsigned long)ret_from_irq \|\|
	493	pc == (unsigned long)ret_from_exception) {
	494	struct pt_regs *regs;
	495	if (*sp >= stack_page &&
	496	sp + sizeof(regs) <= stack_page + THREAD_SIZE - 32) {
	497	regs = (struct pt_regs )sp;
	498	pc = regs->cp0_epc;
	499	if (__kernel_text_address(pc)) {
	500	*sp = regs->regs[29];
	501	*ra = regs->regs[31];
	502	return pc;
	503	}
	504	}
	505	return 0;
	506	}
55b74283	507	if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7	508	return 0;
1fd69098	509	/*
25985edc	510	* Return ra if an exception occurred at the first instruction
1fd69098	511	*/
1924600c AN	512	if (unlikely(ofs == 0)) {
	513	pc = *ra;
	514	*ra = 0;
	515	return pc;
	516	}
f66686f7 AN	517
	518	info.func = (void *)(pc - ofs);
	519	info.func_size = ofs; /* analyze from start to ofs */
4d157d5e FBH	520	leaf = get_frame_info(&info);
4d157d5e FBH	521	if (leaf < 0)
f66686f7	522	return 0;
4d157d5e FBH	523
	524	if (*sp < stack_page \|\|
	525	*sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7 AN	526	return 0;
f66686f7 AN	527
4d157d5e FBH	528	if (leaf)
	529	/*
	530	* For some extreme cases, get_frame_info() can
	531	* consider wrongly a nested function as a leaf
	532	* one. In that cases avoid to return always the
	533	* same value.
	534	*/
1924600c	535	pc = pc != ra ? ra : 0;
4d157d5e FBH	536	else
	537	pc = ((unsigned long )(sp))[info.pc_offset];
	538
	539	*sp += info.frame_size;
1924600c	540	*ra = 0;
4d157d5e	541	return __kernel_text_address(pc) ? pc : 0;
f66686f7	542	}
94ea09c6 DK	543	EXPORT_SYMBOL(unwind_stack_by_address);
	544
	545	/* used by show_backtrace() */
	546	unsigned long unwind_stack(struct task_struct task, unsigned long sp,
	547	unsigned long pc, unsigned long *ra)
	548	{
	549	unsigned long stack_page = (unsigned long)task_stack_page(task);
	550	return unwind_stack_by_address(stack_page, sp, pc, ra);
	551	}
f66686f7	552	#endif
b5943182 FBH	553
	554	/*
	555	* get_wchan - a maintenance nightmare^W^Wpain in the ass ...
	556	*/
	557	unsigned long get_wchan(struct task_struct *task)
	558	{
	559	unsigned long pc = 0;
	560	#ifdef CONFIG_KALLSYMS
	561	unsigned long sp;
1924600c	562	unsigned long ra = 0;
b5943182 FBH	563	#endif
	564
	565	if (!task \|\| task == current \|\| task->state == TASK_RUNNING)
	566	goto out;
	567	if (!task_stack_page(task))
	568	goto out;
	569
	570	pc = thread_saved_pc(task);
	571
	572	#ifdef CONFIG_KALLSYMS
	573	sp = task->thread.reg29 + schedule_mfi.frame_size;
	574
	575	while (in_sched_functions(pc))
1924600c	576	pc = unwind_stack(task, &sp, pc, &ra);
b5943182 FBH	577	#endif
	578
	579	out:
	580	return pc;
	581	}
94109102 FBH	582
	583	/*
	584	* Don't forget that the stack pointer must be aligned on a 8 bytes
	585	* boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
	586	*/
	587	unsigned long arch_align_stack(unsigned long sp)
	588	{
	589	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
	590	sp -= get_random_int() & ~PAGE_MASK;
	591
	592	return sp & ALMASK;
	593	}