ASoC: rt5645: Add struct dmi_system_id "Google Ultima" for chrome platform
[deliverable/linux.git] / arch / mips / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
1da177e4
LT
24#include <linux/init.h>
25#include <linux/completion.h>
63077519 26#include <linux/kallsyms.h>
94109102 27#include <linux/random.h>
9791554b 28#include <linux/prctl.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
e50c0a8f 33#include <asm/dsp.h>
1da177e4 34#include <asm/fpu.h>
1db1af84 35#include <asm/msa.h>
1da177e4 36#include <asm/pgtable.h>
1da177e4
LT
37#include <asm/mipsregs.h>
38#include <asm/processor.h>
60be939c 39#include <asm/reg.h>
1da177e4
LT
40#include <asm/uaccess.h>
41#include <asm/io.h>
42#include <asm/elf.h>
43#include <asm/isadep.h>
44#include <asm/inst.h>
1df0f0ff 45#include <asm/stacktrace.h>
856839b7 46#include <asm/irq_regs.h>
1da177e4 47
cdbedc61
TG
48#ifdef CONFIG_HOTPLUG_CPU
49void arch_cpu_idle_dead(void)
1da177e4 50{
cdbedc61 51 /* What the heck is this check doing ? */
8dd92891 52 if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
cdbedc61
TG
53 play_dead();
54}
55#endif
1b2bc75c 56
1da177e4 57asmlinkage void ret_from_fork(void);
8f54bcac 58asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
59
60void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
61{
62 unsigned long status;
63
64 /* New thread loses kernel privileges. */
bbaf238b 65 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
1da177e4
LT
66 status |= KU_USER;
67 regs->cp0_status = status;
68 clear_used_math();
e04582b7 69 clear_fpu_owner();
a3056b1c 70 init_dsp();
7daef8f2 71 clear_thread_flag(TIF_USEDMSA);
1db1af84
PB
72 clear_thread_flag(TIF_MSA_CTX_LIVE);
73 disable_msa();
1da177e4
LT
74 regs->cp0_epc = pc;
75 regs->regs[29] = sp;
1da177e4
LT
76}
77
78void exit_thread(void)
79{
80}
81
82void flush_thread(void)
83{
84}
85
39148e94
JH
86int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
87{
88 /*
89 * Save any process state which is live in hardware registers to the
90 * parent context prior to duplication. This prevents the new child
91 * state becoming stale if the parent is preempted before copy_thread()
92 * gets a chance to save the parent's live hardware registers to the
93 * child context.
94 */
95 preempt_disable();
96
97 if (is_msa_enabled())
98 save_msa(current);
99 else if (is_fpu_owner())
100 _save_fp(current);
101
102 save_dsp(current);
103
104 preempt_enable();
105
106 *dst = *src;
107 return 0;
108}
109
e2c5aaa5
AD
110/*
111 * Copy architecture-specific thread state
112 */
6f2c55b8 113int copy_thread(unsigned long clone_flags, unsigned long usp,
e2c5aaa5 114 unsigned long kthread_arg, struct task_struct *p)
1da177e4 115{
75bb07e7 116 struct thread_info *ti = task_thread_info(p);
afa86fc4 117 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 118 unsigned long childksp;
3c37026d 119 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 120
75bb07e7 121 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4 122
1da177e4
LT
123 /* set up new TSS. */
124 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
125 /* Put the stack after the struct pt_regs. */
126 childksp = (unsigned long) childregs;
8f54bcac
AV
127 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
128 if (unlikely(p->flags & PF_KTHREAD)) {
e2c5aaa5 129 /* kernel thread */
8f54bcac
AV
130 unsigned long status = p->thread.cp0_status;
131 memset(childregs, 0, sizeof(struct pt_regs));
132 ti->addr_limit = KERNEL_DS;
133 p->thread.reg16 = usp; /* fn */
e2c5aaa5 134 p->thread.reg17 = kthread_arg;
8f54bcac
AV
135 p->thread.reg29 = childksp;
136 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
137#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
138 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
139 ((status & (ST0_KUC | ST0_IEC)) << 2);
140#else
141 status |= ST0_EXL;
142#endif
143 childregs->cp0_status = status;
144 return 0;
145 }
e2c5aaa5
AD
146
147 /* user thread */
1da177e4 148 *childregs = *regs;
70342287
RB
149 childregs->regs[7] = 0; /* Clear error flag */
150 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
151 if (usp)
152 childregs->regs[29] = usp;
8f54bcac 153 ti->addr_limit = USER_DS;
1da177e4 154
1da177e4
LT
155 p->thread.reg29 = (unsigned long) childregs;
156 p->thread.reg31 = (unsigned long) ret_from_fork;
157
158 /*
159 * New tasks lose permission to use the fpu. This accelerates context
160 * switching for most programs since they don't use the fpu.
161 */
1da177e4 162 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 163
1da177e4 164 clear_tsk_thread_flag(p, TIF_USEDFPU);
7daef8f2
PB
165 clear_tsk_thread_flag(p, TIF_USEDMSA);
166 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
1da177e4 167
f088fc84 168#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 169 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
170#endif /* CONFIG_MIPS_MT_FPAFF */
171
3c37026d
RB
172 if (clone_flags & CLONE_SETTLS)
173 ti->tp_value = regs->regs[7];
174
1da177e4
LT
175 return 0;
176}
177
36ecafc5
GF
178#ifdef CONFIG_CC_STACKPROTECTOR
179#include <linux/stackprotector.h>
180unsigned long __stack_chk_guard __read_mostly;
181EXPORT_SYMBOL(__stack_chk_guard);
182#endif
183
b5943182
FBH
184struct mips_frame_info {
185 void *func;
186 unsigned long func_size;
187 int frame_size;
188 int pc_offset;
189};
dc953df1 190
5000653e
TW
191#define J_TARGET(pc,target) \
192 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
193
c0efbb6d
FBH
194static inline int is_ra_save_ins(union mips_instruction *ip)
195{
34c2f668
LY
196#ifdef CONFIG_CPU_MICROMIPS
197 union mips_instruction mmi;
198
199 /*
200 * swsp ra,offset
201 * swm16 reglist,offset(sp)
202 * swm32 reglist,offset(sp)
203 * sw32 ra,offset(sp)
204 * jradiussp - NOT SUPPORTED
205 *
206 * microMIPS is way more fun...
207 */
208 if (mm_insn_16bit(ip->halfword[0])) {
209 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
210 return (mmi.mm16_r5_format.opcode == mm_swsp16_op &&
211 mmi.mm16_r5_format.rt == 31) ||
212 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
213 mmi.mm16_m_format.func == mm_swm16_op);
34c2f668
LY
214 }
215 else {
216 mmi.halfword[0] = ip->halfword[1];
217 mmi.halfword[1] = ip->halfword[0];
635c9907
RB
218 return (mmi.mm_m_format.opcode == mm_pool32b_op &&
219 mmi.mm_m_format.rd > 9 &&
220 mmi.mm_m_format.base == 29 &&
221 mmi.mm_m_format.func == mm_swm32_func) ||
222 (mmi.i_format.opcode == mm_sw32_op &&
223 mmi.i_format.rs == 29 &&
224 mmi.i_format.rt == 31);
34c2f668
LY
225 }
226#else
c0efbb6d
FBH
227 /* sw / sd $ra, offset($sp) */
228 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
229 ip->i_format.rs == 29 &&
230 ip->i_format.rt == 31;
34c2f668 231#endif
c0efbb6d
FBH
232}
233
e7438c4b 234static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d 235{
34c2f668
LY
236#ifdef CONFIG_CPU_MICROMIPS
237 /*
238 * jr16,jrc,jalr16,jalr16
239 * jal
240 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
241 * jraddiusp - NOT SUPPORTED
242 *
243 * microMIPS is kind of more fun...
244 */
245 union mips_instruction mmi;
246
247 mmi.word = (ip->halfword[0] << 16);
248
249 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
250 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
251 ip->j_format.opcode == mm_jal32_op)
252 return 1;
253 if (ip->r_format.opcode != mm_pool32a_op ||
254 ip->r_format.func != mm_pool32axf_op)
255 return 0;
635c9907 256 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
34c2f668 257#else
e7438c4b
TW
258 if (ip->j_format.opcode == j_op)
259 return 1;
c0efbb6d
FBH
260 if (ip->j_format.opcode == jal_op)
261 return 1;
262 if (ip->r_format.opcode != spec_op)
263 return 0;
264 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 265#endif
c0efbb6d
FBH
266}
267
268static inline int is_sp_move_ins(union mips_instruction *ip)
269{
34c2f668
LY
270#ifdef CONFIG_CPU_MICROMIPS
271 /*
272 * addiusp -imm
273 * addius5 sp,-imm
274 * addiu32 sp,sp,-imm
275 * jradiussp - NOT SUPPORTED
276 *
277 * microMIPS is not more fun...
278 */
279 if (mm_insn_16bit(ip->halfword[0])) {
280 union mips_instruction mmi;
281
282 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
283 return (mmi.mm16_r3_format.opcode == mm_pool16d_op &&
284 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
285 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
286 mmi.mm16_r5_format.rt == 29);
34c2f668 287 }
635c9907
RB
288 return ip->mm_i_format.opcode == mm_addiu32_op &&
289 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
34c2f668 290#else
c0efbb6d
FBH
291 /* addiu/daddiu sp,sp,-imm */
292 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
293 return 0;
294 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
295 return 1;
34c2f668 296#endif
c0efbb6d
FBH
297 return 0;
298}
299
f66686f7 300static int get_frame_info(struct mips_frame_info *info)
1da177e4 301{
34c2f668
LY
302#ifdef CONFIG_CPU_MICROMIPS
303 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
304#else
c0efbb6d 305 union mips_instruction *ip = info->func;
34c2f668 306#endif
29b376ff
FBH
307 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
308 unsigned i;
c0efbb6d 309
1da177e4 310 info->pc_offset = -1;
63077519 311 info->frame_size = 0;
1da177e4 312
29b376ff
FBH
313 if (!ip)
314 goto err;
315
316 if (max_insns == 0)
317 max_insns = 128U; /* unknown function size */
318 max_insns = min(128U, max_insns);
319
c0efbb6d
FBH
320 for (i = 0; i < max_insns; i++, ip++) {
321
e7438c4b 322 if (is_jump_ins(ip))
63077519 323 break;
0cceb4aa
FBH
324 if (!info->frame_size) {
325 if (is_sp_move_ins(ip))
34c2f668
LY
326 {
327#ifdef CONFIG_CPU_MICROMIPS
328 if (mm_insn_16bit(ip->halfword[0]))
329 {
330 unsigned short tmp;
331
332 if (ip->halfword[0] & mm_addiusp_func)
333 {
334 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
335 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
336 } else {
337 tmp = (ip->halfword[0] >> 1);
338 info->frame_size = -(signed short)(tmp & 0xf);
339 }
340 ip = (void *) &ip->halfword[1];
341 ip--;
342 } else
343#endif
0cceb4aa 344 info->frame_size = - ip->i_format.simmediate;
34c2f668 345 }
0cceb4aa 346 continue;
63077519 347 }
0cceb4aa 348 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
349 info->pc_offset =
350 ip->i_format.simmediate / sizeof(long);
0cceb4aa 351 break;
1da177e4
LT
352 }
353 }
f66686f7
AN
354 if (info->frame_size && info->pc_offset >= 0) /* nested */
355 return 0;
356 if (info->pc_offset < 0) /* leaf */
357 return 1;
358 /* prologue seems boggus... */
29b376ff 359err:
f66686f7 360 return -1;
1da177e4
LT
361}
362
b5943182
FBH
363static struct mips_frame_info schedule_mfi __read_mostly;
364
5000653e
TW
365#ifdef CONFIG_KALLSYMS
366static unsigned long get___schedule_addr(void)
367{
368 return kallsyms_lookup_name("__schedule");
369}
370#else
371static unsigned long get___schedule_addr(void)
372{
373 union mips_instruction *ip = (void *)schedule;
374 int max_insns = 8;
375 int i;
376
377 for (i = 0; i < max_insns; i++, ip++) {
378 if (ip->j_format.opcode == j_op)
379 return J_TARGET(ip, ip->j_format.target);
380 }
381 return 0;
382}
383#endif
384
1da177e4
LT
385static int __init frame_info_init(void)
386{
b5943182 387 unsigned long size = 0;
63077519 388#ifdef CONFIG_KALLSYMS
b5943182 389 unsigned long ofs;
5000653e
TW
390#endif
391 unsigned long addr;
b5943182 392
5000653e
TW
393 addr = get___schedule_addr();
394 if (!addr)
395 addr = (unsigned long)schedule;
396
397#ifdef CONFIG_KALLSYMS
398 kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519 399#endif
5000653e 400 schedule_mfi.func = (void *)addr;
b5943182
FBH
401 schedule_mfi.func_size = size;
402
403 get_frame_info(&schedule_mfi);
6057a798
FBH
404
405 /*
406 * Without schedule() frame info, result given by
407 * thread_saved_pc() and get_wchan() are not reliable.
408 */
b5943182 409 if (schedule_mfi.pc_offset < 0)
6057a798 410 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 411
1da177e4
LT
412 return 0;
413}
414
415arch_initcall(frame_info_init);
416
417/*
418 * Return saved PC of a blocked thread.
419 */
420unsigned long thread_saved_pc(struct task_struct *tsk)
421{
422 struct thread_struct *t = &tsk->thread;
423
424 /* New born processes are a special case */
425 if (t->reg31 == (unsigned long) ret_from_fork)
426 return t->reg31;
b5943182 427 if (schedule_mfi.pc_offset < 0)
1da177e4 428 return 0;
b5943182 429 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
430}
431
1da177e4 432
f66686f7 433#ifdef CONFIG_KALLSYMS
94ea09c6
DK
434/* generic stack unwinding function */
435unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
436 unsigned long *sp,
437 unsigned long pc,
438 unsigned long *ra)
f66686f7 439{
f66686f7 440 struct mips_frame_info info;
f66686f7 441 unsigned long size, ofs;
4d157d5e 442 int leaf;
1924600c
AN
443 extern void ret_from_irq(void);
444 extern void ret_from_exception(void);
f66686f7 445
f66686f7
AN
446 if (!stack_page)
447 return 0;
448
1924600c
AN
449 /*
450 * If we reached the bottom of interrupt context,
451 * return saved pc in pt_regs.
452 */
453 if (pc == (unsigned long)ret_from_irq ||
454 pc == (unsigned long)ret_from_exception) {
455 struct pt_regs *regs;
456 if (*sp >= stack_page &&
457 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
458 regs = (struct pt_regs *)*sp;
459 pc = regs->cp0_epc;
460 if (__kernel_text_address(pc)) {
461 *sp = regs->regs[29];
462 *ra = regs->regs[31];
463 return pc;
464 }
465 }
466 return 0;
467 }
55b74283 468 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 469 return 0;
1fd69098 470 /*
25985edc 471 * Return ra if an exception occurred at the first instruction
1fd69098 472 */
1924600c
AN
473 if (unlikely(ofs == 0)) {
474 pc = *ra;
475 *ra = 0;
476 return pc;
477 }
f66686f7
AN
478
479 info.func = (void *)(pc - ofs);
480 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
481 leaf = get_frame_info(&info);
482 if (leaf < 0)
f66686f7 483 return 0;
4d157d5e
FBH
484
485 if (*sp < stack_page ||
486 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
487 return 0;
488
4d157d5e
FBH
489 if (leaf)
490 /*
491 * For some extreme cases, get_frame_info() can
492 * consider wrongly a nested function as a leaf
493 * one. In that cases avoid to return always the
494 * same value.
495 */
1924600c 496 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
497 else
498 pc = ((unsigned long *)(*sp))[info.pc_offset];
499
500 *sp += info.frame_size;
1924600c 501 *ra = 0;
4d157d5e 502 return __kernel_text_address(pc) ? pc : 0;
f66686f7 503}
94ea09c6
DK
504EXPORT_SYMBOL(unwind_stack_by_address);
505
506/* used by show_backtrace() */
507unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
508 unsigned long pc, unsigned long *ra)
509{
510 unsigned long stack_page = (unsigned long)task_stack_page(task);
511 return unwind_stack_by_address(stack_page, sp, pc, ra);
512}
f66686f7 513#endif
b5943182
FBH
514
515/*
516 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
517 */
518unsigned long get_wchan(struct task_struct *task)
519{
520 unsigned long pc = 0;
521#ifdef CONFIG_KALLSYMS
522 unsigned long sp;
1924600c 523 unsigned long ra = 0;
b5943182
FBH
524#endif
525
526 if (!task || task == current || task->state == TASK_RUNNING)
527 goto out;
528 if (!task_stack_page(task))
529 goto out;
530
531 pc = thread_saved_pc(task);
532
533#ifdef CONFIG_KALLSYMS
534 sp = task->thread.reg29 + schedule_mfi.frame_size;
535
536 while (in_sched_functions(pc))
1924600c 537 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
538#endif
539
540out:
541 return pc;
542}
94109102
FBH
543
544/*
545 * Don't forget that the stack pointer must be aligned on a 8 bytes
546 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
547 */
548unsigned long arch_align_stack(unsigned long sp)
549{
550 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
551 sp -= get_random_int() & ~PAGE_MASK;
552
553 return sp & ALMASK;
554}
856839b7
ES
555
556static void arch_dump_stack(void *info)
557{
558 struct pt_regs *regs;
559
560 regs = get_irq_regs();
561
562 if (regs)
563 show_regs(regs);
564
565 dump_stack();
566}
567
568void arch_trigger_all_cpu_backtrace(bool include_self)
569{
570 smp_call_function(arch_dump_stack, NULL, 1);
571}
9791554b
PB
572
573int mips_get_process_fp_mode(struct task_struct *task)
574{
575 int value = 0;
576
577 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
578 value |= PR_FP_MODE_FR;
579 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
580 value |= PR_FP_MODE_FRE;
581
582 return value;
583}
584
585int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
586{
587 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
588 unsigned long switch_count;
589 struct task_struct *t;
590
591 /* Check the value is valid */
592 if (value & ~known_bits)
593 return -EOPNOTSUPP;
594
595 /* Avoid inadvertently triggering emulation */
596 if ((value & PR_FP_MODE_FR) && cpu_has_fpu &&
597 !(current_cpu_data.fpu_id & MIPS_FPIR_F64))
598 return -EOPNOTSUPP;
599 if ((value & PR_FP_MODE_FRE) && cpu_has_fpu && !cpu_has_fre)
600 return -EOPNOTSUPP;
601
13e45f09
MC
602 /* FR = 0 not supported in MIPS R6 */
603 if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6)
604 return -EOPNOTSUPP;
605
9791554b
PB
606 /* Save FP & vector context, then disable FPU & MSA */
607 if (task->signal == current->signal)
608 lose_fpu(1);
609
610 /* Prevent any threads from obtaining live FP context */
611 atomic_set(&task->mm->context.fp_mode_switching, 1);
612 smp_mb__after_atomic();
613
614 /*
615 * If there are multiple online CPUs then wait until all threads whose
616 * FP mode is about to change have been context switched. This approach
617 * allows us to only worry about whether an FP mode switch is in
618 * progress when FP is first used in a tasks time slice. Pretty much all
619 * of the mode switch overhead can thus be confined to cases where mode
620 * switches are actually occuring. That is, to here. However for the
621 * thread performing the mode switch it may take a while...
622 */
623 if (num_online_cpus() > 1) {
624 spin_lock_irq(&task->sighand->siglock);
625
626 for_each_thread(task, t) {
627 if (t == current)
628 continue;
629
630 switch_count = t->nvcsw + t->nivcsw;
631
632 do {
633 spin_unlock_irq(&task->sighand->siglock);
634 cond_resched();
635 spin_lock_irq(&task->sighand->siglock);
636 } while ((t->nvcsw + t->nivcsw) == switch_count);
637 }
638
639 spin_unlock_irq(&task->sighand->siglock);
640 }
641
642 /*
643 * There are now no threads of the process with live FP context, so it
644 * is safe to proceed with the FP mode switch.
645 */
646 for_each_thread(task, t) {
647 /* Update desired FP register width */
648 if (value & PR_FP_MODE_FR) {
649 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
650 } else {
651 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
652 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
653 }
654
655 /* Update desired FP single layout */
656 if (value & PR_FP_MODE_FRE)
657 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
658 else
659 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
660 }
661
662 /* Allow threads to use FP again */
663 atomic_set(&task->mm->context.fp_mode_switching, 0);
664
665 return 0;
666}
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