Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others. | |
40ac5d47 | 7 | * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org) |
1da177e4 LT |
8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
9 | * Copyright (C) 2004 Thiemo Seufer | |
34c2f668 | 10 | * Copyright (C) 2013 Imagination Technologies Ltd. |
1da177e4 | 11 | */ |
1da177e4 | 12 | #include <linux/errno.h> |
1da177e4 | 13 | #include <linux/sched.h> |
7bcf7717 | 14 | #include <linux/tick.h> |
1da177e4 LT |
15 | #include <linux/kernel.h> |
16 | #include <linux/mm.h> | |
17 | #include <linux/stddef.h> | |
18 | #include <linux/unistd.h> | |
cae39d13 | 19 | #include <linux/export.h> |
1da177e4 | 20 | #include <linux/ptrace.h> |
1da177e4 LT |
21 | #include <linux/mman.h> |
22 | #include <linux/personality.h> | |
23 | #include <linux/sys.h> | |
1da177e4 LT |
24 | #include <linux/init.h> |
25 | #include <linux/completion.h> | |
63077519 | 26 | #include <linux/kallsyms.h> |
94109102 | 27 | #include <linux/random.h> |
1da177e4 | 28 | |
94109102 | 29 | #include <asm/asm.h> |
1da177e4 LT |
30 | #include <asm/bootinfo.h> |
31 | #include <asm/cpu.h> | |
e50c0a8f | 32 | #include <asm/dsp.h> |
1da177e4 | 33 | #include <asm/fpu.h> |
1db1af84 | 34 | #include <asm/msa.h> |
1da177e4 | 35 | #include <asm/pgtable.h> |
1da177e4 LT |
36 | #include <asm/mipsregs.h> |
37 | #include <asm/processor.h> | |
60be939c | 38 | #include <asm/reg.h> |
1da177e4 LT |
39 | #include <asm/uaccess.h> |
40 | #include <asm/io.h> | |
41 | #include <asm/elf.h> | |
42 | #include <asm/isadep.h> | |
43 | #include <asm/inst.h> | |
1df0f0ff | 44 | #include <asm/stacktrace.h> |
856839b7 | 45 | #include <asm/irq_regs.h> |
1da177e4 | 46 | |
cdbedc61 TG |
47 | #ifdef CONFIG_HOTPLUG_CPU |
48 | void arch_cpu_idle_dead(void) | |
1da177e4 | 49 | { |
cdbedc61 TG |
50 | /* What the heck is this check doing ? */ |
51 | if (!cpu_isset(smp_processor_id(), cpu_callin_map)) | |
52 | play_dead(); | |
53 | } | |
54 | #endif | |
1b2bc75c | 55 | |
1da177e4 | 56 | asmlinkage void ret_from_fork(void); |
8f54bcac | 57 | asmlinkage void ret_from_kernel_thread(void); |
1da177e4 LT |
58 | |
59 | void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) | |
60 | { | |
61 | unsigned long status; | |
62 | ||
63 | /* New thread loses kernel privileges. */ | |
bbaf238b | 64 | status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK); |
1da177e4 LT |
65 | status |= KU_USER; |
66 | regs->cp0_status = status; | |
67 | clear_used_math(); | |
e04582b7 | 68 | clear_fpu_owner(); |
a3056b1c | 69 | init_dsp(); |
7daef8f2 | 70 | clear_thread_flag(TIF_USEDMSA); |
1db1af84 PB |
71 | clear_thread_flag(TIF_MSA_CTX_LIVE); |
72 | disable_msa(); | |
1da177e4 LT |
73 | regs->cp0_epc = pc; |
74 | regs->regs[29] = sp; | |
1da177e4 LT |
75 | } |
76 | ||
77 | void exit_thread(void) | |
78 | { | |
79 | } | |
80 | ||
81 | void flush_thread(void) | |
82 | { | |
83 | } | |
84 | ||
39148e94 JH |
85 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) |
86 | { | |
87 | /* | |
88 | * Save any process state which is live in hardware registers to the | |
89 | * parent context prior to duplication. This prevents the new child | |
90 | * state becoming stale if the parent is preempted before copy_thread() | |
91 | * gets a chance to save the parent's live hardware registers to the | |
92 | * child context. | |
93 | */ | |
94 | preempt_disable(); | |
95 | ||
96 | if (is_msa_enabled()) | |
97 | save_msa(current); | |
98 | else if (is_fpu_owner()) | |
99 | _save_fp(current); | |
100 | ||
101 | save_dsp(current); | |
102 | ||
103 | preempt_enable(); | |
104 | ||
105 | *dst = *src; | |
106 | return 0; | |
107 | } | |
108 | ||
6f2c55b8 | 109 | int copy_thread(unsigned long clone_flags, unsigned long usp, |
afa86fc4 | 110 | unsigned long arg, struct task_struct *p) |
1da177e4 | 111 | { |
75bb07e7 | 112 | struct thread_info *ti = task_thread_info(p); |
afa86fc4 | 113 | struct pt_regs *childregs, *regs = current_pt_regs(); |
484889fc | 114 | unsigned long childksp; |
3c37026d | 115 | p->set_child_tid = p->clear_child_tid = NULL; |
1da177e4 | 116 | |
75bb07e7 | 117 | childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32; |
1da177e4 | 118 | |
1da177e4 LT |
119 | /* set up new TSS. */ |
120 | childregs = (struct pt_regs *) childksp - 1; | |
484889fc DD |
121 | /* Put the stack after the struct pt_regs. */ |
122 | childksp = (unsigned long) childregs; | |
8f54bcac AV |
123 | p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1); |
124 | if (unlikely(p->flags & PF_KTHREAD)) { | |
125 | unsigned long status = p->thread.cp0_status; | |
126 | memset(childregs, 0, sizeof(struct pt_regs)); | |
127 | ti->addr_limit = KERNEL_DS; | |
128 | p->thread.reg16 = usp; /* fn */ | |
129 | p->thread.reg17 = arg; | |
130 | p->thread.reg29 = childksp; | |
131 | p->thread.reg31 = (unsigned long) ret_from_kernel_thread; | |
132 | #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) | |
133 | status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) | | |
134 | ((status & (ST0_KUC | ST0_IEC)) << 2); | |
135 | #else | |
136 | status |= ST0_EXL; | |
137 | #endif | |
138 | childregs->cp0_status = status; | |
139 | return 0; | |
140 | } | |
1da177e4 | 141 | *childregs = *regs; |
70342287 RB |
142 | childregs->regs[7] = 0; /* Clear error flag */ |
143 | childregs->regs[2] = 0; /* Child gets zero as return value */ | |
64b3122d AV |
144 | if (usp) |
145 | childregs->regs[29] = usp; | |
8f54bcac | 146 | ti->addr_limit = USER_DS; |
1da177e4 | 147 | |
1da177e4 LT |
148 | p->thread.reg29 = (unsigned long) childregs; |
149 | p->thread.reg31 = (unsigned long) ret_from_fork; | |
150 | ||
151 | /* | |
152 | * New tasks lose permission to use the fpu. This accelerates context | |
153 | * switching for most programs since they don't use the fpu. | |
154 | */ | |
1da177e4 | 155 | childregs->cp0_status &= ~(ST0_CU2|ST0_CU1); |
1da177e4 | 156 | |
1da177e4 | 157 | clear_tsk_thread_flag(p, TIF_USEDFPU); |
7daef8f2 PB |
158 | clear_tsk_thread_flag(p, TIF_USEDMSA); |
159 | clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE); | |
1da177e4 | 160 | |
f088fc84 | 161 | #ifdef CONFIG_MIPS_MT_FPAFF |
6657fe0a | 162 | clear_tsk_thread_flag(p, TIF_FPUBOUND); |
f088fc84 RB |
163 | #endif /* CONFIG_MIPS_MT_FPAFF */ |
164 | ||
3c37026d RB |
165 | if (clone_flags & CLONE_SETTLS) |
166 | ti->tp_value = regs->regs[7]; | |
167 | ||
1da177e4 LT |
168 | return 0; |
169 | } | |
170 | ||
36ecafc5 GF |
171 | #ifdef CONFIG_CC_STACKPROTECTOR |
172 | #include <linux/stackprotector.h> | |
173 | unsigned long __stack_chk_guard __read_mostly; | |
174 | EXPORT_SYMBOL(__stack_chk_guard); | |
175 | #endif | |
176 | ||
b5943182 FBH |
177 | struct mips_frame_info { |
178 | void *func; | |
179 | unsigned long func_size; | |
180 | int frame_size; | |
181 | int pc_offset; | |
182 | }; | |
dc953df1 | 183 | |
5000653e TW |
184 | #define J_TARGET(pc,target) \ |
185 | (((unsigned long)(pc) & 0xf0000000) | ((target) << 2)) | |
186 | ||
c0efbb6d FBH |
187 | static inline int is_ra_save_ins(union mips_instruction *ip) |
188 | { | |
34c2f668 LY |
189 | #ifdef CONFIG_CPU_MICROMIPS |
190 | union mips_instruction mmi; | |
191 | ||
192 | /* | |
193 | * swsp ra,offset | |
194 | * swm16 reglist,offset(sp) | |
195 | * swm32 reglist,offset(sp) | |
196 | * sw32 ra,offset(sp) | |
197 | * jradiussp - NOT SUPPORTED | |
198 | * | |
199 | * microMIPS is way more fun... | |
200 | */ | |
201 | if (mm_insn_16bit(ip->halfword[0])) { | |
202 | mmi.word = (ip->halfword[0] << 16); | |
635c9907 RB |
203 | return (mmi.mm16_r5_format.opcode == mm_swsp16_op && |
204 | mmi.mm16_r5_format.rt == 31) || | |
205 | (mmi.mm16_m_format.opcode == mm_pool16c_op && | |
206 | mmi.mm16_m_format.func == mm_swm16_op); | |
34c2f668 LY |
207 | } |
208 | else { | |
209 | mmi.halfword[0] = ip->halfword[1]; | |
210 | mmi.halfword[1] = ip->halfword[0]; | |
635c9907 RB |
211 | return (mmi.mm_m_format.opcode == mm_pool32b_op && |
212 | mmi.mm_m_format.rd > 9 && | |
213 | mmi.mm_m_format.base == 29 && | |
214 | mmi.mm_m_format.func == mm_swm32_func) || | |
215 | (mmi.i_format.opcode == mm_sw32_op && | |
216 | mmi.i_format.rs == 29 && | |
217 | mmi.i_format.rt == 31); | |
34c2f668 LY |
218 | } |
219 | #else | |
c0efbb6d FBH |
220 | /* sw / sd $ra, offset($sp) */ |
221 | return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) && | |
222 | ip->i_format.rs == 29 && | |
223 | ip->i_format.rt == 31; | |
34c2f668 | 224 | #endif |
c0efbb6d FBH |
225 | } |
226 | ||
e7438c4b | 227 | static inline int is_jump_ins(union mips_instruction *ip) |
c0efbb6d | 228 | { |
34c2f668 LY |
229 | #ifdef CONFIG_CPU_MICROMIPS |
230 | /* | |
231 | * jr16,jrc,jalr16,jalr16 | |
232 | * jal | |
233 | * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb | |
234 | * jraddiusp - NOT SUPPORTED | |
235 | * | |
236 | * microMIPS is kind of more fun... | |
237 | */ | |
238 | union mips_instruction mmi; | |
239 | ||
240 | mmi.word = (ip->halfword[0] << 16); | |
241 | ||
242 | if ((mmi.mm16_r5_format.opcode == mm_pool16c_op && | |
243 | (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) || | |
244 | ip->j_format.opcode == mm_jal32_op) | |
245 | return 1; | |
246 | if (ip->r_format.opcode != mm_pool32a_op || | |
247 | ip->r_format.func != mm_pool32axf_op) | |
248 | return 0; | |
635c9907 | 249 | return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op; |
34c2f668 | 250 | #else |
e7438c4b TW |
251 | if (ip->j_format.opcode == j_op) |
252 | return 1; | |
c0efbb6d FBH |
253 | if (ip->j_format.opcode == jal_op) |
254 | return 1; | |
255 | if (ip->r_format.opcode != spec_op) | |
256 | return 0; | |
257 | return ip->r_format.func == jalr_op || ip->r_format.func == jr_op; | |
34c2f668 | 258 | #endif |
c0efbb6d FBH |
259 | } |
260 | ||
261 | static inline int is_sp_move_ins(union mips_instruction *ip) | |
262 | { | |
34c2f668 LY |
263 | #ifdef CONFIG_CPU_MICROMIPS |
264 | /* | |
265 | * addiusp -imm | |
266 | * addius5 sp,-imm | |
267 | * addiu32 sp,sp,-imm | |
268 | * jradiussp - NOT SUPPORTED | |
269 | * | |
270 | * microMIPS is not more fun... | |
271 | */ | |
272 | if (mm_insn_16bit(ip->halfword[0])) { | |
273 | union mips_instruction mmi; | |
274 | ||
275 | mmi.word = (ip->halfword[0] << 16); | |
635c9907 RB |
276 | return (mmi.mm16_r3_format.opcode == mm_pool16d_op && |
277 | mmi.mm16_r3_format.simmediate && mm_addiusp_func) || | |
278 | (mmi.mm16_r5_format.opcode == mm_pool16d_op && | |
279 | mmi.mm16_r5_format.rt == 29); | |
34c2f668 | 280 | } |
635c9907 RB |
281 | return ip->mm_i_format.opcode == mm_addiu32_op && |
282 | ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29; | |
34c2f668 | 283 | #else |
c0efbb6d FBH |
284 | /* addiu/daddiu sp,sp,-imm */ |
285 | if (ip->i_format.rs != 29 || ip->i_format.rt != 29) | |
286 | return 0; | |
287 | if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op) | |
288 | return 1; | |
34c2f668 | 289 | #endif |
c0efbb6d FBH |
290 | return 0; |
291 | } | |
292 | ||
f66686f7 | 293 | static int get_frame_info(struct mips_frame_info *info) |
1da177e4 | 294 | { |
34c2f668 LY |
295 | #ifdef CONFIG_CPU_MICROMIPS |
296 | union mips_instruction *ip = (void *) (((char *) info->func) - 1); | |
297 | #else | |
c0efbb6d | 298 | union mips_instruction *ip = info->func; |
34c2f668 | 299 | #endif |
29b376ff FBH |
300 | unsigned max_insns = info->func_size / sizeof(union mips_instruction); |
301 | unsigned i; | |
c0efbb6d | 302 | |
1da177e4 | 303 | info->pc_offset = -1; |
63077519 | 304 | info->frame_size = 0; |
1da177e4 | 305 | |
29b376ff FBH |
306 | if (!ip) |
307 | goto err; | |
308 | ||
309 | if (max_insns == 0) | |
310 | max_insns = 128U; /* unknown function size */ | |
311 | max_insns = min(128U, max_insns); | |
312 | ||
c0efbb6d FBH |
313 | for (i = 0; i < max_insns; i++, ip++) { |
314 | ||
e7438c4b | 315 | if (is_jump_ins(ip)) |
63077519 | 316 | break; |
0cceb4aa FBH |
317 | if (!info->frame_size) { |
318 | if (is_sp_move_ins(ip)) | |
34c2f668 LY |
319 | { |
320 | #ifdef CONFIG_CPU_MICROMIPS | |
321 | if (mm_insn_16bit(ip->halfword[0])) | |
322 | { | |
323 | unsigned short tmp; | |
324 | ||
325 | if (ip->halfword[0] & mm_addiusp_func) | |
326 | { | |
327 | tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2); | |
328 | info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0)); | |
329 | } else { | |
330 | tmp = (ip->halfword[0] >> 1); | |
331 | info->frame_size = -(signed short)(tmp & 0xf); | |
332 | } | |
333 | ip = (void *) &ip->halfword[1]; | |
334 | ip--; | |
335 | } else | |
336 | #endif | |
0cceb4aa | 337 | info->frame_size = - ip->i_format.simmediate; |
34c2f668 | 338 | } |
0cceb4aa | 339 | continue; |
63077519 | 340 | } |
0cceb4aa | 341 | if (info->pc_offset == -1 && is_ra_save_ins(ip)) { |
63077519 AN |
342 | info->pc_offset = |
343 | ip->i_format.simmediate / sizeof(long); | |
0cceb4aa | 344 | break; |
1da177e4 LT |
345 | } |
346 | } | |
f66686f7 AN |
347 | if (info->frame_size && info->pc_offset >= 0) /* nested */ |
348 | return 0; | |
349 | if (info->pc_offset < 0) /* leaf */ | |
350 | return 1; | |
351 | /* prologue seems boggus... */ | |
29b376ff | 352 | err: |
f66686f7 | 353 | return -1; |
1da177e4 LT |
354 | } |
355 | ||
b5943182 FBH |
356 | static struct mips_frame_info schedule_mfi __read_mostly; |
357 | ||
5000653e TW |
358 | #ifdef CONFIG_KALLSYMS |
359 | static unsigned long get___schedule_addr(void) | |
360 | { | |
361 | return kallsyms_lookup_name("__schedule"); | |
362 | } | |
363 | #else | |
364 | static unsigned long get___schedule_addr(void) | |
365 | { | |
366 | union mips_instruction *ip = (void *)schedule; | |
367 | int max_insns = 8; | |
368 | int i; | |
369 | ||
370 | for (i = 0; i < max_insns; i++, ip++) { | |
371 | if (ip->j_format.opcode == j_op) | |
372 | return J_TARGET(ip, ip->j_format.target); | |
373 | } | |
374 | return 0; | |
375 | } | |
376 | #endif | |
377 | ||
1da177e4 LT |
378 | static int __init frame_info_init(void) |
379 | { | |
b5943182 | 380 | unsigned long size = 0; |
63077519 | 381 | #ifdef CONFIG_KALLSYMS |
b5943182 | 382 | unsigned long ofs; |
5000653e TW |
383 | #endif |
384 | unsigned long addr; | |
b5943182 | 385 | |
5000653e TW |
386 | addr = get___schedule_addr(); |
387 | if (!addr) | |
388 | addr = (unsigned long)schedule; | |
389 | ||
390 | #ifdef CONFIG_KALLSYMS | |
391 | kallsyms_lookup_size_offset(addr, &size, &ofs); | |
63077519 | 392 | #endif |
5000653e | 393 | schedule_mfi.func = (void *)addr; |
b5943182 FBH |
394 | schedule_mfi.func_size = size; |
395 | ||
396 | get_frame_info(&schedule_mfi); | |
6057a798 FBH |
397 | |
398 | /* | |
399 | * Without schedule() frame info, result given by | |
400 | * thread_saved_pc() and get_wchan() are not reliable. | |
401 | */ | |
b5943182 | 402 | if (schedule_mfi.pc_offset < 0) |
6057a798 | 403 | printk("Can't analyze schedule() prologue at %p\n", schedule); |
63077519 | 404 | |
1da177e4 LT |
405 | return 0; |
406 | } | |
407 | ||
408 | arch_initcall(frame_info_init); | |
409 | ||
410 | /* | |
411 | * Return saved PC of a blocked thread. | |
412 | */ | |
413 | unsigned long thread_saved_pc(struct task_struct *tsk) | |
414 | { | |
415 | struct thread_struct *t = &tsk->thread; | |
416 | ||
417 | /* New born processes are a special case */ | |
418 | if (t->reg31 == (unsigned long) ret_from_fork) | |
419 | return t->reg31; | |
b5943182 | 420 | if (schedule_mfi.pc_offset < 0) |
1da177e4 | 421 | return 0; |
b5943182 | 422 | return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; |
1da177e4 LT |
423 | } |
424 | ||
1da177e4 | 425 | |
f66686f7 | 426 | #ifdef CONFIG_KALLSYMS |
94ea09c6 DK |
427 | /* generic stack unwinding function */ |
428 | unsigned long notrace unwind_stack_by_address(unsigned long stack_page, | |
429 | unsigned long *sp, | |
430 | unsigned long pc, | |
431 | unsigned long *ra) | |
f66686f7 | 432 | { |
f66686f7 | 433 | struct mips_frame_info info; |
f66686f7 | 434 | unsigned long size, ofs; |
4d157d5e | 435 | int leaf; |
1924600c AN |
436 | extern void ret_from_irq(void); |
437 | extern void ret_from_exception(void); | |
f66686f7 | 438 | |
f66686f7 AN |
439 | if (!stack_page) |
440 | return 0; | |
441 | ||
1924600c AN |
442 | /* |
443 | * If we reached the bottom of interrupt context, | |
444 | * return saved pc in pt_regs. | |
445 | */ | |
446 | if (pc == (unsigned long)ret_from_irq || | |
447 | pc == (unsigned long)ret_from_exception) { | |
448 | struct pt_regs *regs; | |
449 | if (*sp >= stack_page && | |
450 | *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) { | |
451 | regs = (struct pt_regs *)*sp; | |
452 | pc = regs->cp0_epc; | |
453 | if (__kernel_text_address(pc)) { | |
454 | *sp = regs->regs[29]; | |
455 | *ra = regs->regs[31]; | |
456 | return pc; | |
457 | } | |
458 | } | |
459 | return 0; | |
460 | } | |
55b74283 | 461 | if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) |
f66686f7 | 462 | return 0; |
1fd69098 | 463 | /* |
25985edc | 464 | * Return ra if an exception occurred at the first instruction |
1fd69098 | 465 | */ |
1924600c AN |
466 | if (unlikely(ofs == 0)) { |
467 | pc = *ra; | |
468 | *ra = 0; | |
469 | return pc; | |
470 | } | |
f66686f7 AN |
471 | |
472 | info.func = (void *)(pc - ofs); | |
473 | info.func_size = ofs; /* analyze from start to ofs */ | |
4d157d5e FBH |
474 | leaf = get_frame_info(&info); |
475 | if (leaf < 0) | |
f66686f7 | 476 | return 0; |
4d157d5e FBH |
477 | |
478 | if (*sp < stack_page || | |
479 | *sp + info.frame_size > stack_page + THREAD_SIZE - 32) | |
f66686f7 AN |
480 | return 0; |
481 | ||
4d157d5e FBH |
482 | if (leaf) |
483 | /* | |
484 | * For some extreme cases, get_frame_info() can | |
485 | * consider wrongly a nested function as a leaf | |
486 | * one. In that cases avoid to return always the | |
487 | * same value. | |
488 | */ | |
1924600c | 489 | pc = pc != *ra ? *ra : 0; |
4d157d5e FBH |
490 | else |
491 | pc = ((unsigned long *)(*sp))[info.pc_offset]; | |
492 | ||
493 | *sp += info.frame_size; | |
1924600c | 494 | *ra = 0; |
4d157d5e | 495 | return __kernel_text_address(pc) ? pc : 0; |
f66686f7 | 496 | } |
94ea09c6 DK |
497 | EXPORT_SYMBOL(unwind_stack_by_address); |
498 | ||
499 | /* used by show_backtrace() */ | |
500 | unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, | |
501 | unsigned long pc, unsigned long *ra) | |
502 | { | |
503 | unsigned long stack_page = (unsigned long)task_stack_page(task); | |
504 | return unwind_stack_by_address(stack_page, sp, pc, ra); | |
505 | } | |
f66686f7 | 506 | #endif |
b5943182 FBH |
507 | |
508 | /* | |
509 | * get_wchan - a maintenance nightmare^W^Wpain in the ass ... | |
510 | */ | |
511 | unsigned long get_wchan(struct task_struct *task) | |
512 | { | |
513 | unsigned long pc = 0; | |
514 | #ifdef CONFIG_KALLSYMS | |
515 | unsigned long sp; | |
1924600c | 516 | unsigned long ra = 0; |
b5943182 FBH |
517 | #endif |
518 | ||
519 | if (!task || task == current || task->state == TASK_RUNNING) | |
520 | goto out; | |
521 | if (!task_stack_page(task)) | |
522 | goto out; | |
523 | ||
524 | pc = thread_saved_pc(task); | |
525 | ||
526 | #ifdef CONFIG_KALLSYMS | |
527 | sp = task->thread.reg29 + schedule_mfi.frame_size; | |
528 | ||
529 | while (in_sched_functions(pc)) | |
1924600c | 530 | pc = unwind_stack(task, &sp, pc, &ra); |
b5943182 FBH |
531 | #endif |
532 | ||
533 | out: | |
534 | return pc; | |
535 | } | |
94109102 FBH |
536 | |
537 | /* | |
538 | * Don't forget that the stack pointer must be aligned on a 8 bytes | |
539 | * boundary for 32-bits ABI and 16 bytes for 64-bits ABI. | |
540 | */ | |
541 | unsigned long arch_align_stack(unsigned long sp) | |
542 | { | |
543 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) | |
544 | sp -= get_random_int() & ~PAGE_MASK; | |
545 | ||
546 | return sp & ALMASK; | |
547 | } | |
856839b7 ES |
548 | |
549 | static void arch_dump_stack(void *info) | |
550 | { | |
551 | struct pt_regs *regs; | |
552 | ||
553 | regs = get_irq_regs(); | |
554 | ||
555 | if (regs) | |
556 | show_regs(regs); | |
557 | ||
558 | dump_stack(); | |
559 | } | |
560 | ||
561 | void arch_trigger_all_cpu_backtrace(bool include_self) | |
562 | { | |
563 | smp_call_function(arch_dump_stack, NULL, 1); | |
564 | } |