MIPS: Octeon: Dlink_dsr-1000n.dts: add more leds.
[deliverable/linux.git] / arch / mips / kernel / vmlinux.lds.S
CommitLineData
dbee90b7 1#include <asm/asm-offsets.h>
7b1c0d26 2#include <asm/thread_info.h>
485172b3 3
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4#define PAGE_SIZE _PAGE_SIZE
5
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6/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
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LT
12#include <asm-generic/vmlinux.lds.h>
13
41c594ab 14#undef mips
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LT
15#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
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18PHDRS {
19 text PT_LOAD FLAGS(7); /* RWX */
3bfb7224 20#ifndef CONFIG_CAVIUM_OCTEON_SOC
603bb99c 21 note PT_NOTE FLAGS(4); /* R__ */
3bfb7224 22#endif /* CAVIUM_OCTEON_SOC */
603bb99c 23}
51b563fc 24
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ML
25#ifdef CONFIG_32BIT
26 #ifdef CONFIG_CPU_LITTLE_ENDIAN
70342287 27 jiffies = jiffies_64;
d71789b6 28 #else
70342287 29 jiffies = jiffies_64 + 4;
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30 #endif
31#else
70342287 32 jiffies = jiffies_64;
d71789b6 33#endif
0f5c9064 34
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LT
35SECTIONS
36{
37#ifdef CONFIG_BOOT_ELF64
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38 /* Read-only sections, merged into text segment: */
39 /* . = 0xc000000000000000; */
1da177e4 40
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41 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
42 /* . = 0xc00000000001c000; */
1da177e4 43
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44 /* Set the vaddr for the text segment to a value
45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
46 * >= 0xa800 0000 0030 0000 otherwise
47 */
1da177e4 48
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49 /* . = 0xa800000000300000; */
50 . = 0xffffffff80300000;
1da177e4 51#endif
51b563fc 52 . = VMLINUX_LOAD_ADDRESS;
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53 /* read-only */
54 _text = .; /* Text and read-only data */
55 .text : {
56 TEXT_TEXT
57 SCHED_TEXT
58 LOCK_TEXT
f70fd1b5 59 KPROBES_TEXT
8f99a162 60 IRQENTRY_TEXT
be7635e7 61 SOFTIRQENTRY_TEXT
6b3766a2 62 *(.text.*)
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63 *(.fixup)
64 *(.gnu.warning)
603bb99c 65 } :text = 0
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66 _etext = .; /* End of text section */
67
6eb10bc9 68 EXCEPTION_TABLE(16)
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69
70 /* Exception table for data bus errors */
71 __dbe_table : {
72 __start___dbe_table = .;
73 *(__dbe_table)
74 __stop___dbe_table = .;
75 }
603bb99c 76
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77#ifdef CONFIG_CAVIUM_OCTEON_SOC
78#define NOTES_HEADER
79#else /* CONFIG_CAVIUM_OCTEON_SOC */
80#define NOTES_HEADER :note
81#endif /* CONFIG_CAVIUM_OCTEON_SOC */
82 NOTES :text NOTES_HEADER
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83 .dummy : { *(.dummy) } :text
84
a2d063ac 85 _sdata = .; /* Start of data section */
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86 RODATA
87
88 /* writeable */
89 .data : { /* Data */
16be2435 90 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
0f5c9064 91
7b1c0d26 92 INIT_TASK_DATA(THREAD_SIZE)
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93 NOSAVE_DATA
94 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
f8bec75a 95 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
16be2435
FBH
96 DATA_DATA
97 CONSTRUCTORS
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98 }
99 _gp = . + 0x8000;
100 .lit8 : {
101 *(.lit8)
102 }
103 .lit4 : {
104 *(.lit4)
105 }
106 /* We want the small data sections together, so single-instruction offsets
107 can access them all, and initialized data all before uninitialized, so
108 we can shorten the on-disk segment size. */
109 .sdata : {
110 *(.sdata)
111 }
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112 _edata = .; /* End of data section */
113
114 /* will be freed after init */
a0b54e25 115 . = ALIGN(PAGE_SIZE); /* Init code and data */
0f5c9064 116 __init_begin = .;
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117 INIT_TEXT_SECTION(PAGE_SIZE)
118 INIT_DATA_SECTION(16)
0f5c9064 119
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120 . = ALIGN(4);
121 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
122 __mips_machines_start = .;
123 *(.mips.machines.init)
124 __mips_machines_end = .;
125 }
126
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127 /* .exit.text is discarded at runtime, not link time, to deal with
128 * references from .rodata
129 */
130 .exit.text : {
01ba2bdc 131 EXIT_TEXT
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132 }
133 .exit.data : {
01ba2bdc 134 EXIT_DATA
0f5c9064 135 }
1da8f179 136#ifdef CONFIG_SMP
0415b00d 137 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
1da8f179 138#endif
069fd766
MR
139
140#ifdef CONFIG_RELOCATABLE
141 . = ALIGN(4);
142
143 .data.reloc : {
144 _relocation_start = .;
145 /*
146 * Space for relocation table
147 * This needs to be filled so that the
148 * relocs tool can overwrite the content.
149 * An invalid value is left at the start of the
150 * section to abort relocation if the table
151 * has not been filled in.
152 */
153 LONG(0xFFFFFFFF);
154 FILL(0);
155 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
156 _relocation_end = .;
157 }
158#endif
159
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JG
160#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
161 __appended_dtb = .;
162 /* leave space for appended DTB */
163 . += 0x100000;
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AK
164#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
165 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
166 *(.appended_dtb)
167 KEEP(*(.appended_dtb))
168 }
1da8f179 169#endif
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DD
170 /*
171 * Align to 64K in attempt to eliminate holes before the
172 * .bss..swapper_pg_dir section at the start of .bss. This
173 * also satisfies PAGE_SIZE alignment as the largest page size
174 * allowed is 64K.
175 */
176 . = ALIGN(0x10000);
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177 __init_end = .;
178 /* freed after init ends here */
179
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DD
180 /*
181 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
70342287 182 * gets that alignment. .sbss should be empty, so there will be
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DD
183 * no holes after __init_end. */
184 BSS_SECTION(0, 0x10000, 0)
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185
186 _end = . ;
187
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188 /* These mark the ABI of the kernel for debuggers. */
189 .mdebug.abi32 : {
190 KEEP(*(.mdebug.abi32))
191 }
192 .mdebug.abi64 : {
193 KEEP(*(.mdebug.abi64))
194 }
195
196 /* This is the MIPS specific mdebug section. */
197 .mdebug : {
198 *(.mdebug)
199 }
200
201 STABS_DEBUG
202 DWARF_DEBUG
203
204 /* These must appear regardless of . */
205 .gptab.sdata : {
206 *(.gptab.data)
207 *(.gptab.sdata)
208 }
209 .gptab.sbss : {
210 *(.gptab.bss)
211 *(.gptab.sbss)
212 }
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TH
213
214 /* Sections to be discarded */
215 DISCARDS
216 /DISCARD/ : {
217 /* ABI crap starts here */
61379878 218 *(.MIPS.abiflags)
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TH
219 *(.MIPS.options)
220 *(.options)
221 *(.pdr)
222 *(.reginfo)
b8199546 223 *(.eh_frame)
023bf6f1 224 }
1da177e4 225}
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