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1da177e4 LT |
1 | /* IEEE754 floating point arithmetic |
2 | * single precision | |
3 | */ | |
4 | /* | |
5 | * MIPS floating point support | |
6 | * Copyright (C) 1994-2000 Algorithmics Ltd. | |
1da177e4 | 7 | * |
1da177e4 LT |
8 | * This program is free software; you can distribute it and/or modify it |
9 | * under the terms of the GNU General Public License (Version 2) as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | * for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
3f7cac41 | 19 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
1da177e4 LT |
20 | */ |
21 | ||
1da177e4 LT |
22 | #include "ieee754sp.h" |
23 | ||
2209bcb1 | 24 | int ieee754sp_tint(union ieee754sp x) |
1da177e4 | 25 | { |
3f7cac41 RB |
26 | u32 residue; |
27 | int round; | |
28 | int sticky; | |
29 | int odd; | |
30 | ||
1da177e4 LT |
31 | COMPXSP; |
32 | ||
9e8bad1f | 33 | ieee754_clearcx(); |
1da177e4 LT |
34 | |
35 | EXPLODEXSP; | |
36 | FLUSHXSP; | |
37 | ||
38 | switch (xc) { | |
39 | case IEEE754_CLASS_SNAN: | |
40 | case IEEE754_CLASS_QNAN: | |
41 | case IEEE754_CLASS_INF: | |
9e8bad1f | 42 | ieee754_setcx(IEEE754_INVALID_OPERATION); |
90efba36 | 43 | return ieee754si_indef(); |
3f7cac41 | 44 | |
1da177e4 LT |
45 | case IEEE754_CLASS_ZERO: |
46 | return 0; | |
3f7cac41 | 47 | |
1da177e4 LT |
48 | case IEEE754_CLASS_DNORM: |
49 | case IEEE754_CLASS_NORM: | |
50 | break; | |
51 | } | |
52 | if (xe >= 31) { | |
53 | /* look for valid corner case */ | |
54 | if (xe == 31 && xs && xm == SP_HIDDEN_BIT) | |
55 | return -0x80000000; | |
56 | /* Set invalid. We will only use overflow for floating | |
57 | point overflow */ | |
9e8bad1f | 58 | ieee754_setcx(IEEE754_INVALID_OPERATION); |
90efba36 | 59 | return ieee754si_indef(); |
1da177e4 LT |
60 | } |
61 | /* oh gawd */ | |
ad8fb553 RB |
62 | if (xe > SP_FBITS) { |
63 | xm <<= xe - SP_FBITS; | |
1da177e4 | 64 | } else { |
1da177e4 LT |
65 | if (xe < -1) { |
66 | residue = xm; | |
67 | round = 0; | |
68 | sticky = residue != 0; | |
69 | xm = 0; | |
3e4088af | 70 | } else { |
1da177e4 LT |
71 | /* Shifting a u32 32 times does not work, |
72 | * so we do it in two steps. Be aware that xe | |
73 | * may be -1 */ | |
74 | residue = xm << (xe + 1); | |
ad8fb553 | 75 | residue <<= 31 - SP_FBITS; |
1da177e4 LT |
76 | round = (residue >> 31) != 0; |
77 | sticky = (residue << 1) != 0; | |
ad8fb553 | 78 | xm >>= SP_FBITS - xe; |
1da177e4 LT |
79 | } |
80 | odd = (xm & 0x1) != 0x0; | |
81 | switch (ieee754_csr.rm) { | |
56a64733 | 82 | case FPU_CSR_RN: |
1da177e4 LT |
83 | if (round && (sticky || odd)) |
84 | xm++; | |
85 | break; | |
56a64733 | 86 | case FPU_CSR_RZ: |
1da177e4 | 87 | break; |
56a64733 | 88 | case FPU_CSR_RU: /* toward +Infinity */ |
1da177e4 LT |
89 | if ((round || sticky) && !xs) |
90 | xm++; | |
91 | break; | |
56a64733 | 92 | case FPU_CSR_RD: /* toward -Infinity */ |
1da177e4 LT |
93 | if ((round || sticky) && xs) |
94 | xm++; | |
95 | break; | |
96 | } | |
97 | if ((xm >> 31) != 0) { | |
98 | /* This can happen after rounding */ | |
9e8bad1f | 99 | ieee754_setcx(IEEE754_INVALID_OPERATION); |
90efba36 | 100 | return ieee754si_indef(); |
1da177e4 LT |
101 | } |
102 | if (round || sticky) | |
9e8bad1f | 103 | ieee754_setcx(IEEE754_INEXACT); |
1da177e4 LT |
104 | } |
105 | if (xs) | |
106 | return -xm; | |
107 | else | |
108 | return xm; | |
109 | } |