Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 - 2000 Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | |
9 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | |
10 | */ | |
b868868a | 11 | #include <linux/bug.h> |
1da177e4 LT |
12 | #include <linux/init.h> |
13 | #include <linux/module.h> | |
14 | #include <linux/signal.h> | |
15 | #include <linux/sched.h> | |
631330f5 | 16 | #include <linux/smp.h> |
1da177e4 LT |
17 | #include <linux/kernel.h> |
18 | #include <linux/errno.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/pagemap.h> | |
22 | #include <linux/ptrace.h> | |
23 | #include <linux/mman.h> | |
24 | #include <linux/mm.h> | |
25 | #include <linux/bootmem.h> | |
26 | #include <linux/highmem.h> | |
27 | #include <linux/swap.h> | |
3d503753 | 28 | #include <linux/proc_fs.h> |
22a9835c | 29 | #include <linux/pfn.h> |
0f334a3e | 30 | #include <linux/hardirq.h> |
5a0e3ad6 | 31 | #include <linux/gfp.h> |
1da177e4 | 32 | |
9975e77d | 33 | #include <asm/asm-offsets.h> |
1da177e4 LT |
34 | #include <asm/bootinfo.h> |
35 | #include <asm/cachectl.h> | |
36 | #include <asm/cpu.h> | |
37 | #include <asm/dma.h> | |
f8829cae | 38 | #include <asm/kmap_types.h> |
1da177e4 LT |
39 | #include <asm/mmu_context.h> |
40 | #include <asm/sections.h> | |
41 | #include <asm/pgtable.h> | |
42 | #include <asm/pgalloc.h> | |
43 | #include <asm/tlb.h> | |
f8829cae RB |
44 | #include <asm/fixmap.h> |
45 | ||
46 | /* Atomicity and interruptability */ | |
47 | #ifdef CONFIG_MIPS_MT_SMTC | |
48 | ||
49 | #include <asm/mipsmtregs.h> | |
50 | ||
51 | #define ENTER_CRITICAL(flags) \ | |
52 | { \ | |
53 | unsigned int mvpflags; \ | |
54 | local_irq_save(flags);\ | |
55 | mvpflags = dvpe() | |
56 | #define EXIT_CRITICAL(flags) \ | |
57 | evpe(mvpflags); \ | |
58 | local_irq_restore(flags); \ | |
59 | } | |
60 | #else | |
61 | ||
62 | #define ENTER_CRITICAL(flags) local_irq_save(flags) | |
63 | #define EXIT_CRITICAL(flags) local_irq_restore(flags) | |
64 | ||
65 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
1da177e4 | 66 | |
1da177e4 LT |
67 | /* |
68 | * We have up to 8 empty zeroed pages so we can map one of the right colour | |
70342287 | 69 | * when needed. This is necessary only on R4000 / R4400 SC and MC versions |
1da177e4 LT |
70 | * where we have to avoid VCED / VECI exceptions for good performance at |
71 | * any price. Since page is never written to after the initialization we | |
72 | * don't have to care about aliases on other CPUs. | |
73 | */ | |
74 | unsigned long empty_zero_page, zero_page_mask; | |
497d2adc | 75 | EXPORT_SYMBOL_GPL(empty_zero_page); |
1da177e4 LT |
76 | |
77 | /* | |
78 | * Not static inline because used by IP27 special magic initialization code | |
79 | */ | |
31605922 | 80 | void setup_zero_pages(void) |
1da177e4 | 81 | { |
31605922 | 82 | unsigned int order, i; |
1da177e4 LT |
83 | struct page *page; |
84 | ||
85 | if (cpu_has_vce) | |
86 | order = 3; | |
87 | else | |
88 | order = 0; | |
89 | ||
90 | empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order); | |
91 | if (!empty_zero_page) | |
92 | panic("Oh boy, that early out of memory?"); | |
93 | ||
99e3b942 | 94 | page = virt_to_page((void *)empty_zero_page); |
8dfcc9ba | 95 | split_page(page, order); |
31605922 JL |
96 | for (i = 0; i < (1 << order); i++, page++) |
97 | mark_page_reserved(page); | |
1da177e4 | 98 | |
31605922 | 99 | zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK; |
1da177e4 LT |
100 | } |
101 | ||
f8829cae RB |
102 | #ifdef CONFIG_MIPS_MT_SMTC |
103 | static pte_t *kmap_coherent_pte; | |
104 | static void __init kmap_coherent_init(void) | |
105 | { | |
106 | unsigned long vaddr; | |
107 | ||
108 | /* cache the first coherent kmap pte */ | |
109 | vaddr = __fix_to_virt(FIX_CMAP_BEGIN); | |
110 | kmap_coherent_pte = kmap_get_fixmap_pte(vaddr); | |
111 | } | |
112 | #else | |
113 | static inline void kmap_coherent_init(void) {} | |
114 | #endif | |
115 | ||
7575a49f | 116 | void *kmap_coherent(struct page *page, unsigned long addr) |
f8829cae RB |
117 | { |
118 | enum fixed_addresses idx; | |
119 | unsigned long vaddr, flags, entrylo; | |
120 | unsigned long old_ctx; | |
121 | pte_t pte; | |
122 | int tlbidx; | |
123 | ||
b868868a RB |
124 | BUG_ON(Page_dcache_dirty(page)); |
125 | ||
f8829cae RB |
126 | inc_preempt_count(); |
127 | idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); | |
128 | #ifdef CONFIG_MIPS_MT_SMTC | |
0f334a3e KC |
129 | idx += FIX_N_COLOURS * smp_processor_id() + |
130 | (in_interrupt() ? (FIX_N_COLOURS * NR_CPUS) : 0); | |
131 | #else | |
132 | idx += in_interrupt() ? FIX_N_COLOURS : 0; | |
f8829cae RB |
133 | #endif |
134 | vaddr = __fix_to_virt(FIX_CMAP_END - idx); | |
135 | pte = mk_pte(page, PAGE_KERNEL); | |
962f480e | 136 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) |
f8829cae RB |
137 | entrylo = pte.pte_high; |
138 | #else | |
6dd9344c | 139 | entrylo = pte_to_entrylo(pte_val(pte)); |
f8829cae RB |
140 | #endif |
141 | ||
142 | ENTER_CRITICAL(flags); | |
143 | old_ctx = read_c0_entryhi(); | |
144 | write_c0_entryhi(vaddr & (PAGE_MASK << 1)); | |
145 | write_c0_entrylo0(entrylo); | |
146 | write_c0_entrylo1(entrylo); | |
147 | #ifdef CONFIG_MIPS_MT_SMTC | |
148 | set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte); | |
149 | /* preload TLB instead of local_flush_tlb_one() */ | |
150 | mtc0_tlbw_hazard(); | |
151 | tlb_probe(); | |
152 | tlb_probe_hazard(); | |
153 | tlbidx = read_c0_index(); | |
154 | mtc0_tlbw_hazard(); | |
155 | if (tlbidx < 0) | |
156 | tlb_write_random(); | |
157 | else | |
158 | tlb_write_indexed(); | |
159 | #else | |
160 | tlbidx = read_c0_wired(); | |
161 | write_c0_wired(tlbidx + 1); | |
162 | write_c0_index(tlbidx); | |
163 | mtc0_tlbw_hazard(); | |
164 | tlb_write_indexed(); | |
165 | #endif | |
166 | tlbw_use_hazard(); | |
167 | write_c0_entryhi(old_ctx); | |
168 | EXIT_CRITICAL(flags); | |
169 | ||
170 | return (void*) vaddr; | |
171 | } | |
172 | ||
173 | #define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) | |
174 | ||
eacb9d61 | 175 | void kunmap_coherent(void) |
f8829cae RB |
176 | { |
177 | #ifndef CONFIG_MIPS_MT_SMTC | |
178 | unsigned int wired; | |
179 | unsigned long flags, old_ctx; | |
180 | ||
181 | ENTER_CRITICAL(flags); | |
182 | old_ctx = read_c0_entryhi(); | |
183 | wired = read_c0_wired() - 1; | |
184 | write_c0_wired(wired); | |
185 | write_c0_index(wired); | |
186 | write_c0_entryhi(UNIQUE_ENTRYHI(wired)); | |
187 | write_c0_entrylo0(0); | |
188 | write_c0_entrylo1(0); | |
189 | mtc0_tlbw_hazard(); | |
190 | tlb_write_indexed(); | |
191 | tlbw_use_hazard(); | |
192 | write_c0_entryhi(old_ctx); | |
193 | EXIT_CRITICAL(flags); | |
194 | #endif | |
195 | dec_preempt_count(); | |
196 | preempt_check_resched(); | |
197 | } | |
198 | ||
bcd02280 AN |
199 | void copy_user_highpage(struct page *to, struct page *from, |
200 | unsigned long vaddr, struct vm_area_struct *vma) | |
201 | { | |
202 | void *vfrom, *vto; | |
203 | ||
9c02048f | 204 | vto = kmap_atomic(to); |
9a74b3eb RB |
205 | if (cpu_has_dc_aliases && |
206 | page_mapped(from) && !Page_dcache_dirty(from)) { | |
bcd02280 AN |
207 | vfrom = kmap_coherent(from, vaddr); |
208 | copy_page(vto, vfrom); | |
eacb9d61 | 209 | kunmap_coherent(); |
bcd02280 | 210 | } else { |
9c02048f | 211 | vfrom = kmap_atomic(from); |
bcd02280 | 212 | copy_page(vto, vfrom); |
9c02048f | 213 | kunmap_atomic(vfrom); |
bcd02280 | 214 | } |
39b8d525 | 215 | if ((!cpu_has_ic_fills_f_dc) || |
bcd02280 AN |
216 | pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) |
217 | flush_data_cache_page((unsigned long)vto); | |
9c02048f | 218 | kunmap_atomic(vto); |
bcd02280 AN |
219 | /* Make sure this page is cleared on other CPU's too before using it */ |
220 | smp_wmb(); | |
221 | } | |
222 | ||
f8829cae RB |
223 | void copy_to_user_page(struct vm_area_struct *vma, |
224 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
225 | unsigned long len) | |
226 | { | |
9a74b3eb RB |
227 | if (cpu_has_dc_aliases && |
228 | page_mapped(page) && !Page_dcache_dirty(page)) { | |
f8829cae RB |
229 | void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
230 | memcpy(vto, src, len); | |
eacb9d61 | 231 | kunmap_coherent(); |
985c30ef | 232 | } else { |
f8829cae | 233 | memcpy(dst, src, len); |
985c30ef RB |
234 | if (cpu_has_dc_aliases) |
235 | SetPageDcacheDirty(page); | |
236 | } | |
f8829cae RB |
237 | if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) |
238 | flush_cache_page(vma, vaddr, page_to_pfn(page)); | |
239 | } | |
240 | ||
f8829cae RB |
241 | void copy_from_user_page(struct vm_area_struct *vma, |
242 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
243 | unsigned long len) | |
244 | { | |
9a74b3eb RB |
245 | if (cpu_has_dc_aliases && |
246 | page_mapped(page) && !Page_dcache_dirty(page)) { | |
985c30ef | 247 | void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
f8829cae | 248 | memcpy(dst, vfrom, len); |
eacb9d61 | 249 | kunmap_coherent(); |
985c30ef | 250 | } else { |
f8829cae | 251 | memcpy(dst, src, len); |
985c30ef RB |
252 | if (cpu_has_dc_aliases) |
253 | SetPageDcacheDirty(page); | |
254 | } | |
f8829cae RB |
255 | } |
256 | ||
84fd089a | 257 | void __init fixrange_init(unsigned long start, unsigned long end, |
1da177e4 LT |
258 | pgd_t *pgd_base) |
259 | { | |
f8829cae | 260 | #if defined(CONFIG_HIGHMEM) || defined(CONFIG_MIPS_MT_SMTC) |
1da177e4 | 261 | pgd_t *pgd; |
c6e8b587 | 262 | pud_t *pud; |
1da177e4 LT |
263 | pmd_t *pmd; |
264 | pte_t *pte; | |
c6e8b587 | 265 | int i, j, k; |
1da177e4 LT |
266 | unsigned long vaddr; |
267 | ||
268 | vaddr = start; | |
269 | i = __pgd_offset(vaddr); | |
c6e8b587 RB |
270 | j = __pud_offset(vaddr); |
271 | k = __pmd_offset(vaddr); | |
1da177e4 LT |
272 | pgd = pgd_base + i; |
273 | ||
464fd83e | 274 | for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) { |
c6e8b587 | 275 | pud = (pud_t *)pgd; |
464fd83e | 276 | for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) { |
c6e8b587 | 277 | pmd = (pmd_t *)pud; |
464fd83e | 278 | for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) { |
c6e8b587 RB |
279 | if (pmd_none(*pmd)) { |
280 | pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); | |
f8829cae | 281 | set_pmd(pmd, __pmd((unsigned long)pte)); |
b72b7092 | 282 | BUG_ON(pte != pte_offset_kernel(pmd, 0)); |
c6e8b587 RB |
283 | } |
284 | vaddr += PMD_SIZE; | |
1da177e4 | 285 | } |
c6e8b587 | 286 | k = 0; |
1da177e4 LT |
287 | } |
288 | j = 0; | |
289 | } | |
f8829cae | 290 | #endif |
1da177e4 | 291 | } |
1da177e4 | 292 | |
b4819b59 | 293 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
61ef2489 | 294 | int page_is_ram(unsigned long pagenr) |
565200a1 AN |
295 | { |
296 | int i; | |
297 | ||
298 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
299 | unsigned long addr, end; | |
300 | ||
43064c0c DD |
301 | switch (boot_mem_map.map[i].type) { |
302 | case BOOT_MEM_RAM: | |
303 | case BOOT_MEM_INIT_RAM: | |
304 | break; | |
305 | default: | |
565200a1 AN |
306 | /* not usable memory */ |
307 | continue; | |
43064c0c | 308 | } |
565200a1 AN |
309 | |
310 | addr = PFN_UP(boot_mem_map.map[i].addr); | |
311 | end = PFN_DOWN(boot_mem_map.map[i].addr + | |
312 | boot_mem_map.map[i].size); | |
313 | ||
314 | if (pagenr >= addr && pagenr < end) | |
315 | return 1; | |
316 | } | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
1da177e4 LT |
321 | void __init paging_init(void) |
322 | { | |
cce335ae | 323 | unsigned long max_zone_pfns[MAX_NR_ZONES]; |
d3ce0e98 | 324 | unsigned long lastpfn __maybe_unused; |
1da177e4 LT |
325 | |
326 | pagetable_init(); | |
327 | ||
328 | #ifdef CONFIG_HIGHMEM | |
329 | kmap_init(); | |
330 | #endif | |
f8829cae | 331 | kmap_coherent_init(); |
1da177e4 | 332 | |
05502339 | 333 | #ifdef CONFIG_ZONE_DMA |
cce335ae | 334 | max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN; |
1da177e4 | 335 | #endif |
cce335ae RB |
336 | #ifdef CONFIG_ZONE_DMA32 |
337 | max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; | |
338 | #endif | |
339 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | |
340 | lastpfn = max_low_pfn; | |
1da177e4 | 341 | #ifdef CONFIG_HIGHMEM |
cce335ae RB |
342 | max_zone_pfns[ZONE_HIGHMEM] = highend_pfn; |
343 | lastpfn = highend_pfn; | |
cbb8fc07 | 344 | |
cce335ae | 345 | if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) { |
cbb8fc07 | 346 | printk(KERN_WARNING "This processor doesn't support highmem." |
cce335ae RB |
347 | " %ldk highmem ignored\n", |
348 | (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10)); | |
349 | max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn; | |
350 | lastpfn = max_low_pfn; | |
cbb8fc07 | 351 | } |
1da177e4 LT |
352 | #endif |
353 | ||
cce335ae | 354 | free_area_init_nodes(max_zone_pfns); |
1da177e4 LT |
355 | } |
356 | ||
3d503753 DJ |
357 | #ifdef CONFIG_64BIT |
358 | static struct kcore_list kcore_kseg0; | |
359 | #endif | |
360 | ||
1da177e4 LT |
361 | void __init mem_init(void) |
362 | { | |
363 | unsigned long codesize, reservedpages, datasize, initsize; | |
364 | unsigned long tmp, ram; | |
365 | ||
366 | #ifdef CONFIG_HIGHMEM | |
367 | #ifdef CONFIG_DISCONTIGMEM | |
368 | #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" | |
369 | #endif | |
b6da0ffb | 370 | max_mapnr = highend_pfn ? highend_pfn : max_low_pfn; |
1da177e4 | 371 | #else |
565200a1 | 372 | max_mapnr = max_low_pfn; |
1da177e4 LT |
373 | #endif |
374 | high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); | |
375 | ||
376 | totalram_pages += free_all_bootmem(); | |
31605922 | 377 | setup_zero_pages(); /* Setup zeroed pages. */ |
1da177e4 LT |
378 | |
379 | reservedpages = ram = 0; | |
380 | for (tmp = 0; tmp < max_low_pfn; tmp++) | |
43064c0c | 381 | if (page_is_ram(tmp) && pfn_valid(tmp)) { |
1da177e4 | 382 | ram++; |
b1c231f5 | 383 | if (PageReserved(pfn_to_page(tmp))) |
1da177e4 LT |
384 | reservedpages++; |
385 | } | |
565200a1 | 386 | num_physpages = ram; |
1da177e4 LT |
387 | |
388 | #ifdef CONFIG_HIGHMEM | |
389 | for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { | |
a8049c53 | 390 | struct page *page = pfn_to_page(tmp); |
1da177e4 LT |
391 | |
392 | if (!page_is_ram(tmp)) { | |
393 | SetPageReserved(page); | |
394 | continue; | |
395 | } | |
0f354869 | 396 | free_highmem_page(page); |
1da177e4 | 397 | } |
565200a1 | 398 | num_physpages += totalhigh_pages; |
1da177e4 LT |
399 | #endif |
400 | ||
401 | codesize = (unsigned long) &_etext - (unsigned long) &_text; | |
402 | datasize = (unsigned long) &_edata - (unsigned long) &_etext; | |
403 | initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; | |
404 | ||
3d503753 DJ |
405 | #ifdef CONFIG_64BIT |
406 | if ((unsigned long) &_text > (unsigned long) CKSEG0) | |
407 | /* The -4 is a hack so that user tools don't have to handle | |
408 | the overflow. */ | |
c30bb2a2 KH |
409 | kclist_add(&kcore_kseg0, (void *) CKSEG0, |
410 | 0x80000000 - 4, KCORE_TEXT); | |
3d503753 | 411 | #endif |
3d503753 | 412 | |
1da177e4 LT |
413 | printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " |
414 | "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n", | |
cc013a88 | 415 | nr_free_pages() << (PAGE_SHIFT-10), |
1da177e4 LT |
416 | ram << (PAGE_SHIFT-10), |
417 | codesize >> 10, | |
418 | reservedpages << (PAGE_SHIFT-10), | |
419 | datasize >> 10, | |
420 | initsize >> 10, | |
4b529401 | 421 | totalhigh_pages << (PAGE_SHIFT-10)); |
1da177e4 | 422 | } |
b4819b59 | 423 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
1da177e4 | 424 | |
c44e8d5e | 425 | void free_init_pages(const char *what, unsigned long begin, unsigned long end) |
6fd11a21 | 426 | { |
acd86b86 | 427 | unsigned long pfn; |
6fd11a21 | 428 | |
acd86b86 FBH |
429 | for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) { |
430 | struct page *page = pfn_to_page(pfn); | |
431 | void *addr = phys_to_virt(PFN_PHYS(pfn)); | |
432 | ||
acd86b86 | 433 | memset(addr, POISON_FREE_INITMEM, PAGE_SIZE); |
31605922 | 434 | free_reserved_page(page); |
6fd11a21 RB |
435 | } |
436 | printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); | |
437 | } | |
438 | ||
1da177e4 LT |
439 | #ifdef CONFIG_BLK_DEV_INITRD |
440 | void free_initrd_mem(unsigned long start, unsigned long end) | |
441 | { | |
31605922 | 442 | free_reserved_area(start, end, POISON_FREE_INITMEM, "initrd"); |
1da177e4 LT |
443 | } |
444 | #endif | |
445 | ||
fb4bb133 | 446 | void __init_refok free_initmem(void) |
1da177e4 | 447 | { |
c44e8d5e | 448 | prom_free_prom_memory(); |
31605922 | 449 | free_initmem_default(POISON_FREE_INITMEM); |
1da177e4 | 450 | } |
69a6c312 | 451 | |
82622284 | 452 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT |
69a6c312 | 453 | unsigned long pgd_current[NR_CPUS]; |
82622284 | 454 | #endif |
9975e77d RB |
455 | |
456 | /* | |
457 | * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER | |
458 | * are constants. So we use the variants from asm-offset.h until that gcc | |
459 | * will officially be retired. | |
485172b3 DD |
460 | * |
461 | * Align swapper_pg_dir in to 64K, allows its address to be loaded | |
462 | * with a single LUI instruction in the TLB handlers. If we used | |
463 | * __aligned(64K), its size would get rounded up to the alignment | |
464 | * size, and waste space. So we place it in its own section and align | |
465 | * it in the linker script. | |
9975e77d | 466 | */ |
485172b3 | 467 | pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir); |
325f8a0a | 468 | #ifndef __PAGETABLE_PMD_FOLDED |
485172b3 | 469 | pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss; |
69a6c312 | 470 | #endif |
485172b3 | 471 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss; |