Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 - 2000 Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | |
9 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | |
10 | */ | |
b868868a | 11 | #include <linux/bug.h> |
1da177e4 LT |
12 | #include <linux/init.h> |
13 | #include <linux/module.h> | |
14 | #include <linux/signal.h> | |
15 | #include <linux/sched.h> | |
631330f5 | 16 | #include <linux/smp.h> |
1da177e4 LT |
17 | #include <linux/kernel.h> |
18 | #include <linux/errno.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/pagemap.h> | |
22 | #include <linux/ptrace.h> | |
23 | #include <linux/mman.h> | |
24 | #include <linux/mm.h> | |
25 | #include <linux/bootmem.h> | |
26 | #include <linux/highmem.h> | |
27 | #include <linux/swap.h> | |
3d503753 | 28 | #include <linux/proc_fs.h> |
22a9835c | 29 | #include <linux/pfn.h> |
0f334a3e | 30 | #include <linux/hardirq.h> |
5a0e3ad6 | 31 | #include <linux/gfp.h> |
2f96b8c1 | 32 | #include <linux/kcore.h> |
1da177e4 | 33 | |
9975e77d | 34 | #include <asm/asm-offsets.h> |
1da177e4 LT |
35 | #include <asm/bootinfo.h> |
36 | #include <asm/cachectl.h> | |
37 | #include <asm/cpu.h> | |
38 | #include <asm/dma.h> | |
f8829cae | 39 | #include <asm/kmap_types.h> |
cbd95a89 | 40 | #include <asm/maar.h> |
1da177e4 LT |
41 | #include <asm/mmu_context.h> |
42 | #include <asm/sections.h> | |
43 | #include <asm/pgtable.h> | |
44 | #include <asm/pgalloc.h> | |
45 | #include <asm/tlb.h> | |
f8829cae | 46 | #include <asm/fixmap.h> |
e060f6ed | 47 | #include <asm/maar.h> |
f8829cae | 48 | |
1da177e4 LT |
49 | /* |
50 | * We have up to 8 empty zeroed pages so we can map one of the right colour | |
70342287 | 51 | * when needed. This is necessary only on R4000 / R4400 SC and MC versions |
1da177e4 LT |
52 | * where we have to avoid VCED / VECI exceptions for good performance at |
53 | * any price. Since page is never written to after the initialization we | |
54 | * don't have to care about aliases on other CPUs. | |
55 | */ | |
56 | unsigned long empty_zero_page, zero_page_mask; | |
497d2adc | 57 | EXPORT_SYMBOL_GPL(empty_zero_page); |
0b70068e | 58 | EXPORT_SYMBOL(zero_page_mask); |
1da177e4 LT |
59 | |
60 | /* | |
61 | * Not static inline because used by IP27 special magic initialization code | |
62 | */ | |
31605922 | 63 | void setup_zero_pages(void) |
1da177e4 | 64 | { |
31605922 | 65 | unsigned int order, i; |
1da177e4 LT |
66 | struct page *page; |
67 | ||
68 | if (cpu_has_vce) | |
69 | order = 3; | |
70 | else | |
71 | order = 0; | |
72 | ||
73 | empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order); | |
74 | if (!empty_zero_page) | |
75 | panic("Oh boy, that early out of memory?"); | |
76 | ||
99e3b942 | 77 | page = virt_to_page((void *)empty_zero_page); |
8dfcc9ba | 78 | split_page(page, order); |
31605922 JL |
79 | for (i = 0; i < (1 << order); i++, page++) |
80 | mark_page_reserved(page); | |
1da177e4 | 81 | |
31605922 | 82 | zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK; |
1da177e4 LT |
83 | } |
84 | ||
e2a9e5ad | 85 | static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot) |
f8829cae RB |
86 | { |
87 | enum fixed_addresses idx; | |
88 | unsigned long vaddr, flags, entrylo; | |
89 | unsigned long old_ctx; | |
90 | pte_t pte; | |
91 | int tlbidx; | |
92 | ||
b868868a RB |
93 | BUG_ON(Page_dcache_dirty(page)); |
94 | ||
ce01948e | 95 | preempt_disable(); |
bdb43806 | 96 | pagefault_disable(); |
f8829cae | 97 | idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); |
0f334a3e | 98 | idx += in_interrupt() ? FIX_N_COLOURS : 0; |
f8829cae | 99 | vaddr = __fix_to_virt(FIX_CMAP_END - idx); |
e2a9e5ad | 100 | pte = mk_pte(page, prot); |
34adb28d | 101 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) |
c5b36783 | 102 | entrylo = pte_to_entrylo(pte.pte_high); |
f8829cae | 103 | #else |
6dd9344c | 104 | entrylo = pte_to_entrylo(pte_val(pte)); |
f8829cae RB |
105 | #endif |
106 | ||
b633648c | 107 | local_irq_save(flags); |
f8829cae RB |
108 | old_ctx = read_c0_entryhi(); |
109 | write_c0_entryhi(vaddr & (PAGE_MASK << 1)); | |
110 | write_c0_entrylo0(entrylo); | |
111 | write_c0_entrylo1(entrylo); | |
c5b36783 SH |
112 | #ifdef CONFIG_XPA |
113 | entrylo = (pte.pte_low & _PFNX_MASK); | |
114 | writex_c0_entrylo0(entrylo); | |
115 | writex_c0_entrylo1(entrylo); | |
116 | #endif | |
f8829cae RB |
117 | tlbidx = read_c0_wired(); |
118 | write_c0_wired(tlbidx + 1); | |
119 | write_c0_index(tlbidx); | |
120 | mtc0_tlbw_hazard(); | |
121 | tlb_write_indexed(); | |
f8829cae RB |
122 | tlbw_use_hazard(); |
123 | write_c0_entryhi(old_ctx); | |
b633648c | 124 | local_irq_restore(flags); |
f8829cae RB |
125 | |
126 | return (void*) vaddr; | |
127 | } | |
128 | ||
e2a9e5ad PB |
129 | void *kmap_coherent(struct page *page, unsigned long addr) |
130 | { | |
131 | return __kmap_pgprot(page, addr, PAGE_KERNEL); | |
132 | } | |
133 | ||
134 | void *kmap_noncoherent(struct page *page, unsigned long addr) | |
135 | { | |
136 | return __kmap_pgprot(page, addr, PAGE_KERNEL_NC); | |
137 | } | |
138 | ||
eacb9d61 | 139 | void kunmap_coherent(void) |
f8829cae | 140 | { |
f8829cae RB |
141 | unsigned int wired; |
142 | unsigned long flags, old_ctx; | |
143 | ||
b633648c | 144 | local_irq_save(flags); |
f8829cae RB |
145 | old_ctx = read_c0_entryhi(); |
146 | wired = read_c0_wired() - 1; | |
147 | write_c0_wired(wired); | |
148 | write_c0_index(wired); | |
149 | write_c0_entryhi(UNIQUE_ENTRYHI(wired)); | |
150 | write_c0_entrylo0(0); | |
151 | write_c0_entrylo1(0); | |
152 | mtc0_tlbw_hazard(); | |
153 | tlb_write_indexed(); | |
154 | tlbw_use_hazard(); | |
155 | write_c0_entryhi(old_ctx); | |
b633648c | 156 | local_irq_restore(flags); |
bdb43806 | 157 | pagefault_enable(); |
ce01948e | 158 | preempt_enable(); |
f8829cae RB |
159 | } |
160 | ||
bcd02280 AN |
161 | void copy_user_highpage(struct page *to, struct page *from, |
162 | unsigned long vaddr, struct vm_area_struct *vma) | |
163 | { | |
164 | void *vfrom, *vto; | |
165 | ||
9c02048f | 166 | vto = kmap_atomic(to); |
9a74b3eb | 167 | if (cpu_has_dc_aliases && |
e1534ae9 | 168 | page_mapcount(from) && !Page_dcache_dirty(from)) { |
bcd02280 AN |
169 | vfrom = kmap_coherent(from, vaddr); |
170 | copy_page(vto, vfrom); | |
eacb9d61 | 171 | kunmap_coherent(); |
bcd02280 | 172 | } else { |
9c02048f | 173 | vfrom = kmap_atomic(from); |
bcd02280 | 174 | copy_page(vto, vfrom); |
9c02048f | 175 | kunmap_atomic(vfrom); |
bcd02280 | 176 | } |
39b8d525 | 177 | if ((!cpu_has_ic_fills_f_dc) || |
bcd02280 AN |
178 | pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) |
179 | flush_data_cache_page((unsigned long)vto); | |
9c02048f | 180 | kunmap_atomic(vto); |
bcd02280 AN |
181 | /* Make sure this page is cleared on other CPU's too before using it */ |
182 | smp_wmb(); | |
183 | } | |
184 | ||
f8829cae RB |
185 | void copy_to_user_page(struct vm_area_struct *vma, |
186 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
187 | unsigned long len) | |
188 | { | |
9a74b3eb | 189 | if (cpu_has_dc_aliases && |
e1534ae9 | 190 | page_mapcount(page) && !Page_dcache_dirty(page)) { |
f8829cae RB |
191 | void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
192 | memcpy(vto, src, len); | |
eacb9d61 | 193 | kunmap_coherent(); |
985c30ef | 194 | } else { |
f8829cae | 195 | memcpy(dst, src, len); |
985c30ef RB |
196 | if (cpu_has_dc_aliases) |
197 | SetPageDcacheDirty(page); | |
198 | } | |
f8829cae RB |
199 | if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) |
200 | flush_cache_page(vma, vaddr, page_to_pfn(page)); | |
201 | } | |
202 | ||
f8829cae RB |
203 | void copy_from_user_page(struct vm_area_struct *vma, |
204 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
205 | unsigned long len) | |
206 | { | |
9a74b3eb | 207 | if (cpu_has_dc_aliases && |
e1534ae9 | 208 | page_mapcount(page) && !Page_dcache_dirty(page)) { |
985c30ef | 209 | void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
f8829cae | 210 | memcpy(dst, vfrom, len); |
eacb9d61 | 211 | kunmap_coherent(); |
985c30ef | 212 | } else { |
f8829cae | 213 | memcpy(dst, src, len); |
985c30ef RB |
214 | if (cpu_has_dc_aliases) |
215 | SetPageDcacheDirty(page); | |
216 | } | |
f8829cae | 217 | } |
bf9621aa | 218 | EXPORT_SYMBOL_GPL(copy_from_user_page); |
f8829cae | 219 | |
84fd089a | 220 | void __init fixrange_init(unsigned long start, unsigned long end, |
1da177e4 LT |
221 | pgd_t *pgd_base) |
222 | { | |
b633648c | 223 | #ifdef CONFIG_HIGHMEM |
1da177e4 | 224 | pgd_t *pgd; |
c6e8b587 | 225 | pud_t *pud; |
1da177e4 LT |
226 | pmd_t *pmd; |
227 | pte_t *pte; | |
c6e8b587 | 228 | int i, j, k; |
1da177e4 LT |
229 | unsigned long vaddr; |
230 | ||
231 | vaddr = start; | |
232 | i = __pgd_offset(vaddr); | |
c6e8b587 RB |
233 | j = __pud_offset(vaddr); |
234 | k = __pmd_offset(vaddr); | |
1da177e4 LT |
235 | pgd = pgd_base + i; |
236 | ||
464fd83e | 237 | for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) { |
c6e8b587 | 238 | pud = (pud_t *)pgd; |
464fd83e | 239 | for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) { |
c6e8b587 | 240 | pmd = (pmd_t *)pud; |
464fd83e | 241 | for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) { |
c6e8b587 RB |
242 | if (pmd_none(*pmd)) { |
243 | pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); | |
f8829cae | 244 | set_pmd(pmd, __pmd((unsigned long)pte)); |
b72b7092 | 245 | BUG_ON(pte != pte_offset_kernel(pmd, 0)); |
c6e8b587 RB |
246 | } |
247 | vaddr += PMD_SIZE; | |
1da177e4 | 248 | } |
c6e8b587 | 249 | k = 0; |
1da177e4 LT |
250 | } |
251 | j = 0; | |
252 | } | |
f8829cae | 253 | #endif |
1da177e4 | 254 | } |
1da177e4 | 255 | |
def3ab5d PB |
256 | unsigned __weak platform_maar_init(unsigned num_pairs) |
257 | { | |
258 | struct maar_config cfg[BOOT_MEM_MAP_MAX]; | |
259 | unsigned i, num_configured, num_cfg = 0; | |
260 | phys_addr_t skip; | |
261 | ||
262 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
263 | switch (boot_mem_map.map[i].type) { | |
264 | case BOOT_MEM_RAM: | |
265 | case BOOT_MEM_INIT_RAM: | |
266 | break; | |
267 | default: | |
268 | continue; | |
269 | } | |
270 | ||
271 | skip = 0x10000 - (boot_mem_map.map[i].addr & 0xffff); | |
272 | ||
273 | cfg[num_cfg].lower = boot_mem_map.map[i].addr; | |
274 | cfg[num_cfg].lower += skip; | |
275 | ||
276 | cfg[num_cfg].upper = cfg[num_cfg].lower; | |
277 | cfg[num_cfg].upper += boot_mem_map.map[i].size - 1; | |
278 | cfg[num_cfg].upper -= skip; | |
279 | ||
280 | cfg[num_cfg].attrs = MIPS_MAAR_S; | |
281 | num_cfg++; | |
282 | } | |
283 | ||
284 | num_configured = maar_config(cfg, num_cfg, num_pairs); | |
285 | if (num_configured < num_cfg) | |
286 | pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n", | |
287 | num_pairs, num_cfg); | |
288 | ||
289 | return num_configured; | |
290 | } | |
291 | ||
e060f6ed | 292 | void maar_init(void) |
def3ab5d PB |
293 | { |
294 | unsigned num_maars, used, i; | |
651ca7f4 | 295 | phys_addr_t lower, upper, attr; |
e060f6ed PB |
296 | static struct { |
297 | struct maar_config cfgs[3]; | |
298 | unsigned used; | |
299 | } recorded = { { { 0 } }, 0 }; | |
def3ab5d PB |
300 | |
301 | if (!cpu_has_maar) | |
302 | return; | |
303 | ||
304 | /* Detect the number of MAARs */ | |
305 | write_c0_maari(~0); | |
306 | back_to_back_c0_hazard(); | |
307 | num_maars = read_c0_maari() + 1; | |
308 | ||
309 | /* MAARs should be in pairs */ | |
310 | WARN_ON(num_maars % 2); | |
311 | ||
e060f6ed PB |
312 | /* Set MAARs using values we recorded already */ |
313 | if (recorded.used) { | |
314 | used = maar_config(recorded.cfgs, recorded.used, num_maars / 2); | |
315 | BUG_ON(used != recorded.used); | |
316 | } else { | |
317 | /* Configure the required MAARs */ | |
318 | used = platform_maar_init(num_maars / 2); | |
319 | } | |
def3ab5d PB |
320 | |
321 | /* Disable any further MAARs */ | |
322 | for (i = (used * 2); i < num_maars; i++) { | |
323 | write_c0_maari(i); | |
324 | back_to_back_c0_hazard(); | |
325 | write_c0_maar(0); | |
326 | back_to_back_c0_hazard(); | |
327 | } | |
651ca7f4 | 328 | |
e060f6ed PB |
329 | if (recorded.used) |
330 | return; | |
331 | ||
651ca7f4 PB |
332 | pr_info("MAAR configuration:\n"); |
333 | for (i = 0; i < num_maars; i += 2) { | |
334 | write_c0_maari(i); | |
335 | back_to_back_c0_hazard(); | |
336 | upper = read_c0_maar(); | |
337 | ||
338 | write_c0_maari(i + 1); | |
339 | back_to_back_c0_hazard(); | |
340 | lower = read_c0_maar(); | |
341 | ||
342 | attr = lower & upper; | |
343 | lower = (lower & MIPS_MAAR_ADDR) << 4; | |
344 | upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff; | |
345 | ||
346 | pr_info(" [%d]: ", i / 2); | |
347 | if (!(attr & MIPS_MAAR_V)) { | |
348 | pr_cont("disabled\n"); | |
349 | continue; | |
350 | } | |
351 | ||
352 | pr_cont("%pa-%pa", &lower, &upper); | |
353 | ||
354 | if (attr & MIPS_MAAR_S) | |
355 | pr_cont(" speculate"); | |
356 | ||
357 | pr_cont("\n"); | |
e060f6ed PB |
358 | |
359 | /* Record the setup for use on secondary CPUs */ | |
360 | if (used <= ARRAY_SIZE(recorded.cfgs)) { | |
361 | recorded.cfgs[recorded.used].lower = lower; | |
362 | recorded.cfgs[recorded.used].upper = upper; | |
363 | recorded.cfgs[recorded.used].attrs = attr; | |
364 | recorded.used++; | |
365 | } | |
651ca7f4 | 366 | } |
def3ab5d PB |
367 | } |
368 | ||
b4819b59 | 369 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
61ef2489 | 370 | int page_is_ram(unsigned long pagenr) |
565200a1 AN |
371 | { |
372 | int i; | |
373 | ||
374 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
375 | unsigned long addr, end; | |
376 | ||
43064c0c DD |
377 | switch (boot_mem_map.map[i].type) { |
378 | case BOOT_MEM_RAM: | |
379 | case BOOT_MEM_INIT_RAM: | |
380 | break; | |
381 | default: | |
565200a1 AN |
382 | /* not usable memory */ |
383 | continue; | |
43064c0c | 384 | } |
565200a1 AN |
385 | |
386 | addr = PFN_UP(boot_mem_map.map[i].addr); | |
387 | end = PFN_DOWN(boot_mem_map.map[i].addr + | |
388 | boot_mem_map.map[i].size); | |
389 | ||
390 | if (pagenr >= addr && pagenr < end) | |
391 | return 1; | |
392 | } | |
393 | ||
394 | return 0; | |
395 | } | |
396 | ||
1da177e4 LT |
397 | void __init paging_init(void) |
398 | { | |
cce335ae | 399 | unsigned long max_zone_pfns[MAX_NR_ZONES]; |
d3ce0e98 | 400 | unsigned long lastpfn __maybe_unused; |
1da177e4 LT |
401 | |
402 | pagetable_init(); | |
403 | ||
404 | #ifdef CONFIG_HIGHMEM | |
405 | kmap_init(); | |
406 | #endif | |
05502339 | 407 | #ifdef CONFIG_ZONE_DMA |
cce335ae | 408 | max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN; |
1da177e4 | 409 | #endif |
cce335ae RB |
410 | #ifdef CONFIG_ZONE_DMA32 |
411 | max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; | |
412 | #endif | |
413 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | |
414 | lastpfn = max_low_pfn; | |
1da177e4 | 415 | #ifdef CONFIG_HIGHMEM |
cce335ae RB |
416 | max_zone_pfns[ZONE_HIGHMEM] = highend_pfn; |
417 | lastpfn = highend_pfn; | |
cbb8fc07 | 418 | |
cce335ae | 419 | if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) { |
cbb8fc07 | 420 | printk(KERN_WARNING "This processor doesn't support highmem." |
cce335ae RB |
421 | " %ldk highmem ignored\n", |
422 | (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10)); | |
423 | max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn; | |
424 | lastpfn = max_low_pfn; | |
cbb8fc07 | 425 | } |
1da177e4 LT |
426 | #endif |
427 | ||
cce335ae | 428 | free_area_init_nodes(max_zone_pfns); |
1da177e4 LT |
429 | } |
430 | ||
3d503753 DJ |
431 | #ifdef CONFIG_64BIT |
432 | static struct kcore_list kcore_kseg0; | |
433 | #endif | |
434 | ||
1132137e | 435 | static inline void mem_init_free_highmem(void) |
1da177e4 | 436 | { |
1132137e JL |
437 | #ifdef CONFIG_HIGHMEM |
438 | unsigned long tmp; | |
1da177e4 | 439 | |
1132137e JL |
440 | for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { |
441 | struct page *page = pfn_to_page(tmp); | |
442 | ||
443 | if (!page_is_ram(tmp)) | |
444 | SetPageReserved(page); | |
445 | else | |
446 | free_highmem_page(page); | |
447 | } | |
448 | #endif | |
449 | } | |
450 | ||
451 | void __init mem_init(void) | |
452 | { | |
1da177e4 LT |
453 | #ifdef CONFIG_HIGHMEM |
454 | #ifdef CONFIG_DISCONTIGMEM | |
455 | #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" | |
456 | #endif | |
b6da0ffb | 457 | max_mapnr = highend_pfn ? highend_pfn : max_low_pfn; |
1da177e4 | 458 | #else |
565200a1 | 459 | max_mapnr = max_low_pfn; |
1da177e4 LT |
460 | #endif |
461 | high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); | |
462 | ||
ab9988a3 | 463 | maar_init(); |
0c988534 | 464 | free_all_bootmem(); |
31605922 | 465 | setup_zero_pages(); /* Setup zeroed pages. */ |
1132137e JL |
466 | mem_init_free_highmem(); |
467 | mem_init_print_info(NULL); | |
1da177e4 | 468 | |
3d503753 DJ |
469 | #ifdef CONFIG_64BIT |
470 | if ((unsigned long) &_text > (unsigned long) CKSEG0) | |
471 | /* The -4 is a hack so that user tools don't have to handle | |
472 | the overflow. */ | |
c30bb2a2 KH |
473 | kclist_add(&kcore_kseg0, (void *) CKSEG0, |
474 | 0x80000000 - 4, KCORE_TEXT); | |
3d503753 | 475 | #endif |
1da177e4 | 476 | } |
b4819b59 | 477 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
1da177e4 | 478 | |
c44e8d5e | 479 | void free_init_pages(const char *what, unsigned long begin, unsigned long end) |
6fd11a21 | 480 | { |
acd86b86 | 481 | unsigned long pfn; |
6fd11a21 | 482 | |
acd86b86 FBH |
483 | for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) { |
484 | struct page *page = pfn_to_page(pfn); | |
485 | void *addr = phys_to_virt(PFN_PHYS(pfn)); | |
486 | ||
acd86b86 | 487 | memset(addr, POISON_FREE_INITMEM, PAGE_SIZE); |
31605922 | 488 | free_reserved_page(page); |
6fd11a21 RB |
489 | } |
490 | printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); | |
491 | } | |
492 | ||
1da177e4 LT |
493 | #ifdef CONFIG_BLK_DEV_INITRD |
494 | void free_initrd_mem(unsigned long start, unsigned long end) | |
495 | { | |
11199692 JL |
496 | free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM, |
497 | "initrd"); | |
1da177e4 LT |
498 | } |
499 | #endif | |
500 | ||
0893d3fb MC |
501 | void (*free_init_pages_eva)(void *begin, void *end) = NULL; |
502 | ||
fb4bb133 | 503 | void __init_refok free_initmem(void) |
1da177e4 | 504 | { |
c44e8d5e | 505 | prom_free_prom_memory(); |
0893d3fb MC |
506 | /* |
507 | * Let the platform define a specific function to free the | |
508 | * init section since EVA may have used any possible mapping | |
509 | * between virtual and physical addresses. | |
510 | */ | |
511 | if (free_init_pages_eva) | |
512 | free_init_pages_eva((void *)&__init_begin, (void *)&__init_end); | |
513 | else | |
514 | free_initmem_default(POISON_FREE_INITMEM); | |
1da177e4 | 515 | } |
69a6c312 | 516 | |
82622284 | 517 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT |
69a6c312 | 518 | unsigned long pgd_current[NR_CPUS]; |
82622284 | 519 | #endif |
9975e77d RB |
520 | |
521 | /* | |
522 | * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER | |
523 | * are constants. So we use the variants from asm-offset.h until that gcc | |
524 | * will officially be retired. | |
485172b3 DD |
525 | * |
526 | * Align swapper_pg_dir in to 64K, allows its address to be loaded | |
527 | * with a single LUI instruction in the TLB handlers. If we used | |
528 | * __aligned(64K), its size would get rounded up to the alignment | |
529 | * size, and waste space. So we place it in its own section and align | |
530 | * it in the linker script. | |
9975e77d | 531 | */ |
485172b3 | 532 | pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir); |
325f8a0a | 533 | #ifndef __PAGETABLE_PMD_FOLDED |
485172b3 | 534 | pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss; |
69a6c312 | 535 | #endif |
485172b3 | 536 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss; |