[deliverable/linux.git] / arch / mips / mti-malta / malta-platform.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2006, 07 MIPS Technologies, Inc.
 *   written by Ralf Baechle (ralf@linux-mips.org)
 *     written by Ralf Baechle <ralf@linux-mips.org>
 *
 * Copyright (C) 2008 Wind River Systems, Inc.
 *   updated by Tiejun Chen <tiejun.chen@windriver.com>
 *
 * 1. Probe driver for the Malta's UART ports:
 *
 *   o 2 ports in the SMC SuperIO
 *   o 1 port in the CBUS UART, a discrete 16550 which normally is only used
 *     for bringups.
 *
 * We don't use 8250_platform.c on Malta as it would result in the CBUS
 * UART becoming ttyS0.
 *
 * 2. Register RTC-CMOS platform device on Malta.
 */
#include <linux/init.h>
#include <linux/serial_8250.h>
#include <linux/mc146818rtc.h>
#include <linux/module.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <mtd/mtd-abi.h>

#define SMC_PORT(base, int)						\
{									\
	.iobase		= base,						\
	.irq		= int,						\
	.uartclk	= 1843200,					\
	.iotype		= UPIO_PORT,					\
	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,		\
	.regshift	= 0,						\
}

#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)

static struct plat_serial8250_port uart8250_data[] = {
	SMC_PORT(0x3F8, 4),
	SMC_PORT(0x2F8, 3),
	{
		.mapbase	= 0x1f000900,	/* The CBUS UART */
		.irq		= MIPS_CPU_IRQ_BASE + 2,
		.uartclk	= 3686400,	/* Twice the usual clk! */
		.iotype		= UPIO_MEM32,
		.flags		= CBUS_UART_FLAGS,
		.regshift	= 3,
	},
	{ },
};

static struct platform_device malta_uart8250_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= uart8250_data,
	},
};

struct resource malta_rtc_resources[] = {
	{
		.start	= RTC_PORT(0),
		.end	= RTC_PORT(7),
		.flags	= IORESOURCE_IO,
	}, {
		.start	= RTC_IRQ,
		.end	= RTC_IRQ,
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device malta_rtc_device = {
	.name		= "rtc_cmos",
	.id		= -1,
	.resource	= malta_rtc_resources,
	.num_resources	= ARRAY_SIZE(malta_rtc_resources),
};

static struct mtd_partition malta_mtd_partitions[] = {
	{
		.name =		"YAMON",
		.offset =	0x0,
		.size =		0x100000,
		.mask_flags =	MTD_WRITEABLE
	}, {
		.name =		"User FS",
		.offset = 	0x100000,
		.size =		0x2e0000
	}, {
		.name =		"Board Config",
		.offset =	0x3e0000,
		.size =		0x020000,
		.mask_flags =	MTD_WRITEABLE
	}
};

static struct physmap_flash_data malta_flash_data = {
	.width		= 4,
	.nr_parts	= ARRAY_SIZE(malta_mtd_partitions),
	.parts		= malta_mtd_partitions
};

static struct resource malta_flash_resource = {
	.start		= 0x1e000000,
	.end		= 0x1e3fffff,
	.flags		= IORESOURCE_MEM
};

static struct platform_device malta_flash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data	= &malta_flash_data,
	},
	.num_resources	= 1,
	.resource	= &malta_flash_resource,
};

static struct platform_device *malta_devices[] __initdata = {
	&malta_uart8250_device,
	&malta_rtc_device,
	&malta_flash_device,
};

static int __init malta_add_devices(void)
{
	int err;

	err = platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
	if (err)
		return err;

	/*
	 * Set RTC to BCD mode to support current alarm code.
	 */
	CMOS_WRITE(CMOS_READ(RTC_CONTROL) & ~RTC_DM_BINARY, RTC_CONTROL);

	return 0;
}

device_initcall(malta_add_devices);
Commit	Line	Data
e7c4782f RB	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
566a3b95	6	* Copyright (C) 2006, 07 MIPS Technologies, Inc.
e7c4782f	7	* written by Ralf Baechle (ralf@linux-mips.org)
566a3b95	8	* written by Ralf Baechle <ralf@linux-mips.org>
e7c4782f	9	*
192cc7f0 TC	10	* Copyright (C) 2008 Wind River Systems, Inc.
	11	* updated by Tiejun Chen <tiejun.chen@windriver.com>
	12	*
	13	* 1. Probe driver for the Malta's UART ports:
e7c4782f RB	14	*
	15	* o 2 ports in the SMC SuperIO
	16	* o 1 port in the CBUS UART, a discrete 16550 which normally is only used
	17	* for bringups.
	18	*
	19	* We don't use 8250_platform.c on Malta as it would result in the CBUS
	20	* UART becoming ttyS0.
192cc7f0 TC	21	*
192cc7f0 TC	22	* 2. Register RTC-CMOS platform device on Malta.
e7c4782f	23	*/
e7c4782f RB	24	#include <linux/init.h>
e7c4782f RB	25	#include <linux/serial_8250.h>
192cc7f0	26	#include <linux/mc146818rtc.h>
566a3b95 RB	27	#include <linux/module.h>
	28	#include <linux/mtd/partitions.h>
	29	#include <linux/mtd/physmap.h>
192cc7f0	30	#include <linux/platform_device.h>
566a3b95	31	#include <mtd/mtd-abi.h>
e7c4782f RB	32
	33	#define SMC_PORT(base, int) \
	34	{ \
	35	.iobase = base, \
	36	.irq = int, \
	37	.uartclk = 1843200, \
	38	.iotype = UPIO_PORT, \
	39	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST, \
	40	.regshift = 0, \
	41	}
	42
	43	#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP)
	44
	45	static struct plat_serial8250_port uart8250_data[] = {
	46	SMC_PORT(0x3F8, 4),
	47	SMC_PORT(0x2F8, 3),
	48	{
	49	.mapbase = 0x1f000900, /* The CBUS UART */
	50	.irq = MIPS_CPU_IRQ_BASE + 2,
	51	.uartclk = 3686400, /* Twice the usual clk! */
	52	.iotype = UPIO_MEM32,
	53	.flags = CBUS_UART_FLAGS,
	54	.regshift = 3,
	55	},
	56	{ },
	57	};
	58
192cc7f0	59	static struct platform_device malta_uart8250_device = {
e7c4782f	60	.name = "serial8250",
566a3b95	61	.id = PLAT8250_DEV_PLATFORM,
e7c4782f RB	62	.dev = {
	63	.platform_data = uart8250_data,
	64	},
	65	};
	66
192cc7f0 TC	67	struct resource malta_rtc_resources[] = {
	68	{
	69	.start = RTC_PORT(0),
	70	.end = RTC_PORT(7),
	71	.flags = IORESOURCE_IO,
	72	}, {
	73	.start = RTC_IRQ,
	74	.end = RTC_IRQ,
	75	.flags = IORESOURCE_IRQ,
	76	}
	77	};
	78
	79	static struct platform_device malta_rtc_device = {
	80	.name = "rtc_cmos",
	81	.id = -1,
	82	.resource = malta_rtc_resources,
	83	.num_resources = ARRAY_SIZE(malta_rtc_resources),
	84	};
	85
566a3b95 RB	86	static struct mtd_partition malta_mtd_partitions[] = {
	87	{
	88	.name = "YAMON",
	89	.offset = 0x0,
	90	.size = 0x100000,
	91	.mask_flags = MTD_WRITEABLE
	92	}, {
	93	.name = "User FS",
	94	.offset = 0x100000,
	95	.size = 0x2e0000
	96	}, {
	97	.name = "Board Config",
	98	.offset = 0x3e0000,
	99	.size = 0x020000,
	100	.mask_flags = MTD_WRITEABLE
	101	}
	102	};
	103
	104	static struct physmap_flash_data malta_flash_data = {
	105	.width = 4,
	106	.nr_parts = ARRAY_SIZE(malta_mtd_partitions),
	107	.parts = malta_mtd_partitions
	108	};
	109
	110	static struct resource malta_flash_resource = {
	111	.start = 0x1e000000,
	112	.end = 0x1e3fffff,
	113	.flags = IORESOURCE_MEM
	114	};
	115
	116	static struct platform_device malta_flash_device = {
	117	.name = "physmap-flash",
	118	.id = 0,
	119	.dev = {
	120	.platform_data = &malta_flash_data,
	121	},
	122	.num_resources = 1,
	123	.resource = &malta_flash_resource,
	124	};
	125
192cc7f0 TC	126	static struct platform_device *malta_devices[] __initdata = {
	127	&malta_uart8250_device,
	128	&malta_rtc_device,
566a3b95	129	&malta_flash_device,
192cc7f0 TC	130	};
	131
	132	static int __init malta_add_devices(void)
e7c4782f	133	{
192cc7f0	134	int err;
e7c4782f	135
192cc7f0 TC	136	err = platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
	137	if (err)
	138	return err;
	139
	140	/*
	141	* Set RTC to BCD mode to support current alarm code.
	142	*/
	143	CMOS_WRITE(CMOS_READ(RTC_CONTROL) & ~RTC_DM_BINARY, RTC_CONTROL);
	144
	145	return 0;
	146	}
e7c4782f	147
192cc7f0	148	device_initcall(malta_add_devices);