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0c965407 J |
1 | /* |
2 | * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights | |
3 | * reserved. | |
4 | * | |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the NetLogic | |
9 | * license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or without | |
12 | * modification, are permitted provided that the following conditions | |
13 | * are met: | |
14 | * | |
15 | * 1. Redistributions of source code must retain the above copyright | |
16 | * notice, this list of conditions and the following disclaimer. | |
17 | * 2. Redistributions in binary form must reproduce the above copyright | |
18 | * notice, this list of conditions and the following disclaimer in | |
19 | * the documentation and/or other materials provided with the | |
20 | * distribution. | |
21 | * | |
22 | * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR | |
23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | |
24 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
25 | * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE | |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
29 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
30 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE | |
31 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN | |
32 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
33 | */ | |
34 | ||
35 | #include <linux/kernel.h> | |
36 | #include <linux/init.h> | |
37 | #include <linux/linkage.h> | |
38 | #include <linux/interrupt.h> | |
0c965407 J |
39 | #include <linux/mm.h> |
40 | #include <linux/slab.h> | |
41 | #include <linux/irq.h> | |
42 | ||
43 | #include <asm/errno.h> | |
44 | #include <asm/signal.h> | |
0c965407 J |
45 | #include <asm/ptrace.h> |
46 | #include <asm/mipsregs.h> | |
47 | #include <asm/thread_info.h> | |
48 | ||
49 | #include <asm/netlogic/mips-extns.h> | |
50 | #include <asm/netlogic/interrupt.h> | |
51 | #include <asm/netlogic/haldefs.h> | |
52 | #include <asm/netlogic/common.h> | |
53 | ||
65040e22 J |
54 | #if defined(CONFIG_CPU_XLP) |
55 | #include <asm/netlogic/xlp-hal/iomap.h> | |
56 | #include <asm/netlogic/xlp-hal/xlp.h> | |
57 | #include <asm/netlogic/xlp-hal/pic.h> | |
58 | #elif defined(CONFIG_CPU_XLR) | |
0c965407 J |
59 | #include <asm/netlogic/xlr/iomap.h> |
60 | #include <asm/netlogic/xlr/pic.h> | |
ed21cfe2 | 61 | #include <asm/netlogic/xlr/fmn.h> |
65040e22 J |
62 | #else |
63 | #error "Unknown CPU" | |
64 | #endif | |
0c965407 | 65 | |
38541742 J |
66 | #ifdef CONFIG_SMP |
67 | #define SMP_IRQ_MASK ((1ULL << IRQ_IPI_SMP_FUNCTION) | \ | |
68 | (1ULL << IRQ_IPI_SMP_RESCHEDULE)) | |
69 | #else | |
70 | #define SMP_IRQ_MASK 0 | |
71 | #endif | |
70342287 | 72 | #define PERCPU_IRQ_MASK (SMP_IRQ_MASK | (1ull << IRQ_TIMER) | \ |
ed21cfe2 | 73 | (1ull << IRQ_FMN)) |
38541742 J |
74 | |
75 | struct nlm_pic_irq { | |
76 | void (*extra_ack)(struct irq_data *); | |
77 | struct nlm_soc_info *node; | |
78 | int picirq; | |
79 | int irt; | |
80 | int flags; | |
81 | }; | |
82 | ||
0c965407 J |
83 | static void xlp_pic_enable(struct irq_data *d) |
84 | { | |
85 | unsigned long flags; | |
38541742 | 86 | struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d); |
0c965407 | 87 | |
38541742 J |
88 | BUG_ON(!pd); |
89 | spin_lock_irqsave(&pd->node->piclock, flags); | |
90 | nlm_pic_enable_irt(pd->node->picbase, pd->irt); | |
91 | spin_unlock_irqrestore(&pd->node->piclock, flags); | |
0c965407 J |
92 | } |
93 | ||
94 | static void xlp_pic_disable(struct irq_data *d) | |
95 | { | |
38541742 | 96 | struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d); |
0c965407 | 97 | unsigned long flags; |
0c965407 | 98 | |
38541742 J |
99 | BUG_ON(!pd); |
100 | spin_lock_irqsave(&pd->node->piclock, flags); | |
101 | nlm_pic_disable_irt(pd->node->picbase, pd->irt); | |
102 | spin_unlock_irqrestore(&pd->node->piclock, flags); | |
0c965407 J |
103 | } |
104 | ||
105 | static void xlp_pic_mask_ack(struct irq_data *d) | |
106 | { | |
38541742 J |
107 | struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d); |
108 | uint64_t mask = 1ull << pd->picirq; | |
0c965407 | 109 | |
70342287 | 110 | write_c0_eirr(mask); /* ack by writing EIRR */ |
0c965407 J |
111 | } |
112 | ||
113 | static void xlp_pic_unmask(struct irq_data *d) | |
114 | { | |
38541742 | 115 | struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d); |
0c965407 | 116 | |
38541742 | 117 | if (!pd) |
0c965407 J |
118 | return; |
119 | ||
38541742 J |
120 | if (pd->extra_ack) |
121 | pd->extra_ack(d); | |
122 | ||
0c965407 | 123 | /* Ack is a single write, no need to lock */ |
38541742 | 124 | nlm_pic_ack(pd->node->picbase, pd->irt); |
0c965407 J |
125 | } |
126 | ||
127 | static struct irq_chip xlp_pic = { | |
128 | .name = "XLP-PIC", | |
129 | .irq_enable = xlp_pic_enable, | |
130 | .irq_disable = xlp_pic_disable, | |
131 | .irq_mask_ack = xlp_pic_mask_ack, | |
132 | .irq_unmask = xlp_pic_unmask, | |
133 | }; | |
134 | ||
135 | static void cpuintr_disable(struct irq_data *d) | |
136 | { | |
137 | uint64_t eimr; | |
138 | uint64_t mask = 1ull << d->irq; | |
139 | ||
140 | eimr = read_c0_eimr(); | |
141 | write_c0_eimr(eimr & ~mask); | |
142 | } | |
143 | ||
144 | static void cpuintr_enable(struct irq_data *d) | |
145 | { | |
146 | uint64_t eimr; | |
147 | uint64_t mask = 1ull << d->irq; | |
148 | ||
149 | eimr = read_c0_eimr(); | |
150 | write_c0_eimr(eimr | mask); | |
151 | } | |
152 | ||
153 | static void cpuintr_ack(struct irq_data *d) | |
154 | { | |
155 | uint64_t mask = 1ull << d->irq; | |
156 | ||
157 | write_c0_eirr(mask); | |
158 | } | |
159 | ||
160 | static void cpuintr_nop(struct irq_data *d) | |
161 | { | |
162 | WARN(d->irq >= PIC_IRQ_BASE, "Bad irq %d", d->irq); | |
163 | } | |
164 | ||
165 | /* | |
166 | * Chip definition for CPU originated interrupts(timer, msg) and | |
167 | * IPIs | |
168 | */ | |
169 | struct irq_chip nlm_cpu_intr = { | |
170 | .name = "XLP-CPU-INTR", | |
171 | .irq_enable = cpuintr_enable, | |
172 | .irq_disable = cpuintr_disable, | |
173 | .irq_mask = cpuintr_nop, | |
174 | .irq_ack = cpuintr_nop, | |
175 | .irq_eoi = cpuintr_ack, | |
176 | }; | |
177 | ||
38541742 | 178 | static void __init nlm_init_percpu_irqs(void) |
0c965407 | 179 | { |
38541742 | 180 | int i; |
0c965407 J |
181 | |
182 | for (i = 0; i < PIC_IRT_FIRST_IRQ; i++) | |
183 | irq_set_chip_and_handler(i, &nlm_cpu_intr, handle_percpu_irq); | |
0c965407 J |
184 | #ifdef CONFIG_SMP |
185 | irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr, | |
186 | nlm_smp_function_ipi_handler); | |
187 | irq_set_chip_and_handler(IRQ_IPI_SMP_RESCHEDULE, &nlm_cpu_intr, | |
188 | nlm_smp_resched_ipi_handler); | |
0c965407 | 189 | #endif |
38541742 J |
190 | } |
191 | ||
192 | void nlm_setup_pic_irq(int node, int picirq, int irq, int irt) | |
193 | { | |
194 | struct nlm_pic_irq *pic_data; | |
195 | int xirq; | |
196 | ||
197 | xirq = nlm_irq_to_xirq(node, irq); | |
198 | pic_data = kzalloc(sizeof(*pic_data), GFP_KERNEL); | |
199 | BUG_ON(pic_data == NULL); | |
200 | pic_data->irt = irt; | |
201 | pic_data->picirq = picirq; | |
202 | pic_data->node = nlm_get_node(node); | |
203 | irq_set_chip_and_handler(xirq, &xlp_pic, handle_level_irq); | |
204 | irq_set_handler_data(xirq, pic_data); | |
205 | } | |
0c965407 | 206 | |
38541742 J |
207 | void nlm_set_pic_extra_ack(int node, int irq, void (*xack)(struct irq_data *)) |
208 | { | |
209 | struct nlm_pic_irq *pic_data; | |
210 | int xirq; | |
211 | ||
212 | xirq = nlm_irq_to_xirq(node, irq); | |
213 | pic_data = irq_get_handler_data(xirq); | |
214 | pic_data->extra_ack = xack; | |
215 | } | |
216 | ||
217 | static void nlm_init_node_irqs(int node) | |
218 | { | |
219 | int i, irt; | |
220 | uint64_t irqmask; | |
221 | struct nlm_soc_info *nodep; | |
222 | ||
223 | pr_info("Init IRQ for node %d\n", node); | |
224 | nodep = nlm_get_node(node); | |
225 | irqmask = PERCPU_IRQ_MASK; | |
226 | for (i = PIC_IRT_FIRST_IRQ; i <= PIC_IRT_LAST_IRQ; i++) { | |
227 | irt = nlm_irq_to_irt(i); | |
0c965407 J |
228 | if (irt == -1) |
229 | continue; | |
38541742 J |
230 | nlm_setup_pic_irq(node, i, i, irt); |
231 | /* set interrupts to first cpu in node */ | |
232 | nlm_pic_init_irt(nodep->picbase, irt, i, | |
233 | node * NLM_CPUS_PER_NODE); | |
234 | irqmask |= (1ull << i); | |
0c965407 | 235 | } |
77ae798f | 236 | nodep->irqmask = irqmask; |
0c965407 J |
237 | } |
238 | ||
239 | void __init arch_init_irq(void) | |
240 | { | |
241 | /* Initialize the irq descriptors */ | |
38541742 J |
242 | nlm_init_percpu_irqs(); |
243 | nlm_init_node_irqs(0); | |
77ae798f | 244 | write_c0_eimr(nlm_current_node()->irqmask); |
ed21cfe2 GR |
245 | #if defined(CONFIG_CPU_XLR) |
246 | nlm_setup_fmn_irq(); | |
247 | #endif | |
0c965407 J |
248 | } |
249 | ||
38541742 | 250 | void nlm_smp_irq_init(int hwcpuid) |
0c965407 | 251 | { |
38541742 J |
252 | int node, cpu; |
253 | ||
254 | node = hwcpuid / NLM_CPUS_PER_NODE; | |
255 | cpu = hwcpuid % NLM_CPUS_PER_NODE; | |
256 | ||
257 | if (cpu == 0 && node != 0) | |
258 | nlm_init_node_irqs(node); | |
77ae798f | 259 | write_c0_eimr(nlm_current_node()->irqmask); |
0c965407 J |
260 | } |
261 | ||
262 | asmlinkage void plat_irq_dispatch(void) | |
263 | { | |
264 | uint64_t eirr; | |
77ae798f | 265 | int i, node; |
0c965407 | 266 | |
77ae798f | 267 | node = nlm_nodeid(); |
0c965407 | 268 | eirr = read_c0_eirr() & read_c0_eimr(); |
38541742 | 269 | |
0c965407 J |
270 | i = __ilog2_u64(eirr); |
271 | if (i == -1) | |
272 | return; | |
273 | ||
38541742 J |
274 | /* per-CPU IRQs don't need translation */ |
275 | if (eirr & PERCPU_IRQ_MASK) { | |
276 | do_IRQ(i); | |
277 | return; | |
278 | } | |
279 | ||
280 | /* top level irq handling */ | |
77ae798f | 281 | do_IRQ(nlm_irq_to_xirq(node, i)); |
0c965407 | 282 | } |