[deliverable/linux.git] / arch / mips / sgi-ip22 / ip22-nvram.c

/*
 * ip22-nvram.c: NVRAM and serial EEPROM handling.
 *
 * Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
 */
#include <linux/module.h>

#include <asm/sgi/hpc3.h>
#include <asm/sgi/ip22.h>

/* Control opcode for serial eeprom  */
#define EEPROM_READ	0xc000	/* serial memory read */
#define EEPROM_WEN	0x9800	/* write enable before prog modes */
#define EEPROM_WRITE	0xa000	/* serial memory write */
#define EEPROM_WRALL	0x8800	/* write all registers */
#define EEPROM_WDS	0x8000	/* disable all programming */
#define EEPROM_PRREAD	0xc000	/* read protect register */
#define EEPROM_PREN	0x9800	/* enable protect register mode */
#define EEPROM_PRCLEAR	0xffff	/* clear protect register */
#define EEPROM_PRWRITE	0xa000	/* write protect register */
#define EEPROM_PRDS	0x8000	/* disable protect register, forever */

#define EEPROM_EPROT	0x01	/* Protect register enable */
#define EEPROM_CSEL	0x02	/* Chip select */
#define EEPROM_ECLK	0x04	/* EEPROM clock */
#define EEPROM_DATO	0x08	/* Data out */
#define EEPROM_DATI	0x10	/* Data in */

/* We need to use these functions early... */
#define delay() ({						\
	int x;							\
	for (x=0; x<100000; x++) __asm__ __volatile__(""); })

#define eeprom_cs_on(ptr) ({	\
	__raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr);	\
	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr);	\
	__raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr);	\
	delay();						\
	__raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr);	\
	__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })


#define eeprom_cs_off(ptr) ({	\
	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr);	\
	__raw_writel(__raw_readl(ptr) & ~EEPROM_CSEL, ptr);	\
	__raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr);	\
	__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })

#define BITS_IN_COMMAND 11
/*
 * clock in the nvram command and the register number. For the
 * national semiconductor nv ram chip the op code is 3 bits and
 * the address is 6/8 bits.
 */
static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
{
	unsigned short ser_cmd;
	int i;

	ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
	for (i = 0; i < BITS_IN_COMMAND; i++) {
		if (ser_cmd & (1<<15))	/* if high order bit set */
			__raw_writel(__raw_readl(ctrl) | EEPROM_DATO, ctrl);
		else
			__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
		__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
		delay();
		__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
		delay();
		ser_cmd <<= 1;
	}
	/* see data sheet timing diagram */
	__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
}

unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
{
	unsigned short res = 0;
	int i;

	__raw_writel(__raw_readl(ctrl) & ~EEPROM_EPROT, ctrl);
	eeprom_cs_on(ctrl);
	eeprom_cmd(ctrl, EEPROM_READ, reg);

	/* clock the data ouf of serial mem */
	for (i = 0; i < 16; i++) {
		__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
		delay();
		__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
		delay();
		res <<= 1;
		if (__raw_readl(ctrl) & EEPROM_DATI)
			res |= 1;
	}

	eeprom_cs_off(ctrl);

	return res;
}

EXPORT_SYMBOL(ip22_eeprom_read);

/*
 * Read specified register from main NVRAM
 */
unsigned short ip22_nvram_read(int reg)
{
	if (ip22_is_fullhouse())
		/* IP22 (Indigo2 aka FullHouse) stores env variables into
		 * 93CS56 Microwire Bus EEPROM 2048 Bit (128x16) */
		return ip22_eeprom_read(&hpc3c0->eeprom, reg);
	else {
		unsigned short tmp;
		/* IP24 (Indy aka Guiness) uses DS1386 8K version */
		reg <<= 1;
		tmp = hpc3c0->bbram[reg++] & 0xff;
		return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff);
	}
}

EXPORT_SYMBOL(ip22_nvram_read);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* ip22-nvram.c: NVRAM and serial EEPROM handling.
	3	*
	4	* Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
	5	*/
	6	#include <linux/module.h>
	7
	8	#include <asm/sgi/hpc3.h>
	9	#include <asm/sgi/ip22.h>
	10
	11	/* Control opcode for serial eeprom */
	12	#define EEPROM_READ 0xc000 /* serial memory read */
	13	#define EEPROM_WEN 0x9800 /* write enable before prog modes */
	14	#define EEPROM_WRITE 0xa000 /* serial memory write */
	15	#define EEPROM_WRALL 0x8800 /* write all registers */
	16	#define EEPROM_WDS 0x8000 /* disable all programming */
70342287 RB	17	#define EEPROM_PRREAD 0xc000 /* read protect register */
	18	#define EEPROM_PREN 0x9800 /* enable protect register mode */
	19	#define EEPROM_PRCLEAR 0xffff /* clear protect register */
	20	#define EEPROM_PRWRITE 0xa000 /* write protect register */
	21	#define EEPROM_PRDS 0x8000 /* disable protect register, forever */
1da177e4 LT	22
	23	#define EEPROM_EPROT 0x01 /* Protect register enable */
	24	#define EEPROM_CSEL 0x02 /* Chip select */
	25	#define EEPROM_ECLK 0x04 /* EEPROM clock */
	26	#define EEPROM_DATO 0x08 /* Data out */
	27	#define EEPROM_DATI 0x10 /* Data in */
	28
	29	/* We need to use these functions early... */
70342287	30	#define delay() ({ \
1da177e4 LT	31	int x; \
	32	for (x=0; x<100000; x++) __asm__ __volatile__(""); })
	33
	34	#define eeprom_cs_on(ptr) ({ \
5b3af8f1 TB	35	__raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr); \
	36	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \
	37	__raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr); \
70342287	38	delay(); \
5b3af8f1 TB	39	__raw_writel(__raw_readl(ptr) \| EEPROM_CSEL, ptr); \
5b3af8f1 TB	40	__raw_writel(__raw_readl(ptr) \| EEPROM_ECLK, ptr); })
1da177e4	41
42a3b4f2	42
1da177e4	43	#define eeprom_cs_off(ptr) ({ \
5b3af8f1 TB	44	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \
	45	__raw_writel(__raw_readl(ptr) & ~EEPROM_CSEL, ptr); \
	46	__raw_writel(__raw_readl(ptr) \| EEPROM_EPROT, ptr); \
	47	__raw_writel(__raw_readl(ptr) \| EEPROM_ECLK, ptr); })
1da177e4	48
70342287	49	#define BITS_IN_COMMAND 11
1da177e4 LT	50	/*
	51	* clock in the nvram command and the register number. For the
	52	* national semiconductor nv ram chip the op code is 3 bits and
42a3b4f2	53	* the address is 6/8 bits.
1da177e4	54	*/
78709b9d	55	static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
1da177e4 LT	56	{
	57	unsigned short ser_cmd;
	58	int i;
	59
	60	ser_cmd = cmd \| (reg << (16 - BITS_IN_COMMAND));
	61	for (i = 0; i < BITS_IN_COMMAND; i++) {
	62	if (ser_cmd & (1<<15)) /* if high order bit set */
5b3af8f1	63	__raw_writel(__raw_readl(ctrl) \| EEPROM_DATO, ctrl);
1da177e4	64	else
5b3af8f1 TB	65	__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
	66	__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
	67	delay();
	68	__raw_writel(__raw_readl(ctrl) \| EEPROM_ECLK, ctrl);
	69	delay();
1da177e4 LT	70	ser_cmd <<= 1;
1da177e4 LT	71	}
78709b9d	72	/* see data sheet timing diagram */
5b3af8f1	73	__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
1da177e4 LT	74	}
1da177e4 LT	75
78709b9d	76	unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
1da177e4 LT	77	{
	78	unsigned short res = 0;
	79	int i;
	80
5b3af8f1	81	__raw_writel(__raw_readl(ctrl) & ~EEPROM_EPROT, ctrl);
1da177e4 LT	82	eeprom_cs_on(ctrl);
	83	eeprom_cmd(ctrl, EEPROM_READ, reg);
	84
	85	/* clock the data ouf of serial mem */
	86	for (i = 0; i < 16; i++) {
5b3af8f1	87	__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
1da177e4	88	delay();
5b3af8f1	89	__raw_writel(__raw_readl(ctrl) \| EEPROM_ECLK, ctrl);
1da177e4 LT	90	delay();
1da177e4 LT	91	res <<= 1;
5b3af8f1	92	if (__raw_readl(ctrl) & EEPROM_DATI)
1da177e4 LT	93	res \|= 1;
1da177e4 LT	94	}
42a3b4f2	95
1da177e4 LT	96	eeprom_cs_off(ctrl);
	97
	98	return res;
	99	}
	100
	101	EXPORT_SYMBOL(ip22_eeprom_read);
	102
	103	/*
	104	* Read specified register from main NVRAM
	105	*/
	106	unsigned short ip22_nvram_read(int reg)
	107	{
	108	if (ip22_is_fullhouse())
	109	/* IP22 (Indigo2 aka FullHouse) stores env variables into
	110	* 93CS56 Microwire Bus EEPROM 2048 Bit (128x16) */
	111	return ip22_eeprom_read(&hpc3c0->eeprom, reg);
	112	else {
	113	unsigned short tmp;
	114	/* IP24 (Indy aka Guiness) uses DS1386 8K version */
	115	reg <<= 1;
	116	tmp = hpc3c0->bbram[reg++] & 0xff;
	117	return (tmp << 8) \| (hpc3c0->bbram[reg] & 0xff);
42a3b4f2	118	}
1da177e4 LT	119	}
	120
	121	EXPORT_SYMBOL(ip22_nvram_read);