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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General | |
3 | * Public License. See the file "COPYING" in the main directory of this | |
4 | * archive for more details. | |
5 | * | |
6 | * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com) | |
7 | * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc. | |
8 | */ | |
1da177e4 LT |
9 | #include <linux/kernel.h> |
10 | #include <linux/init.h> | |
11 | #include <linux/sched.h> | |
631330f5 | 12 | #include <linux/smp.h> |
1da177e4 LT |
13 | #include <linux/mm.h> |
14 | #include <linux/module.h> | |
15 | #include <linux/cpumask.h> | |
16 | #include <asm/cpu.h> | |
17 | #include <asm/io.h> | |
18 | #include <asm/pgtable.h> | |
19 | #include <asm/time.h> | |
20 | #include <asm/sn/types.h> | |
21 | #include <asm/sn/sn0/addrs.h> | |
22 | #include <asm/sn/sn0/hubni.h> | |
23 | #include <asm/sn/sn0/hubio.h> | |
24 | #include <asm/sn/klconfig.h> | |
25 | #include <asm/sn/ioc3.h> | |
26 | #include <asm/mipsregs.h> | |
27 | #include <asm/sn/gda.h> | |
28 | #include <asm/sn/hub.h> | |
29 | #include <asm/sn/intr.h> | |
30 | #include <asm/current.h> | |
1da177e4 LT |
31 | #include <asm/processor.h> |
32 | #include <asm/mmu_context.h> | |
33 | #include <asm/thread_info.h> | |
34 | #include <asm/sn/launch.h> | |
35 | #include <asm/sn/sn_private.h> | |
36 | #include <asm/sn/sn0/ip27.h> | |
37 | #include <asm/sn/mapped_kernel.h> | |
38 | ||
39 | #define CPU_NONE (cpuid_t)-1 | |
40 | ||
41 | static DECLARE_BITMAP(hub_init_mask, MAX_COMPACT_NODES); | |
42 | nasid_t master_nasid = INVALID_NASID; | |
43 | ||
44 | cnodeid_t nasid_to_compact_node[MAX_NASIDS]; | |
45 | nasid_t compact_to_nasid_node[MAX_COMPACT_NODES]; | |
46 | cnodeid_t cpuid_to_compact_node[MAXCPUS]; | |
47 | ||
48 | EXPORT_SYMBOL(nasid_to_compact_node); | |
49 | ||
cc6e8e08 RB |
50 | struct cpuinfo_ip27 sn_cpu_info[NR_CPUS]; |
51 | EXPORT_SYMBOL_GPL(sn_cpu_info); | |
52 | ||
1da177e4 LT |
53 | extern void pcibr_setup(cnodeid_t); |
54 | ||
55 | extern void xtalk_probe_node(cnodeid_t nid); | |
56 | ||
234fcd14 | 57 | static void __cpuinit per_hub_init(cnodeid_t cnode) |
1da177e4 LT |
58 | { |
59 | struct hub_data *hub = hub_data(cnode); | |
60 | nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode); | |
4f12bfe5 | 61 | int i; |
1da177e4 LT |
62 | |
63 | cpu_set(smp_processor_id(), hub->h_cpus); | |
64 | ||
65 | if (test_and_set_bit(cnode, hub_init_mask)) | |
66 | return; | |
1da177e4 LT |
67 | /* |
68 | * Set CRB timeout at 5ms, (< PI timeout of 10ms) | |
69 | */ | |
70 | REMOTE_HUB_S(nasid, IIO_ICTP, 0x800); | |
71 | REMOTE_HUB_S(nasid, IIO_ICTO, 0xff); | |
72 | ||
73 | hub_rtc_init(cnode); | |
74 | xtalk_probe_node(cnode); | |
75 | ||
76 | #ifdef CONFIG_REPLICATE_EXHANDLERS | |
77 | /* | |
78 | * If this is not a headless node initialization, | |
79 | * copy over the caliased exception handlers. | |
80 | */ | |
81 | if (get_compact_nodeid() == cnode) { | |
82 | extern char except_vec2_generic, except_vec3_generic; | |
83 | extern void build_tlb_refill_handler(void); | |
84 | ||
85 | memcpy((void *)(CKSEG0 + 0x100), &except_vec2_generic, 0x80); | |
86 | memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x80); | |
87 | build_tlb_refill_handler(); | |
88 | memcpy((void *)(CKSEG0 + 0x100), (void *) CKSEG0, 0x80); | |
89 | memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x100); | |
90 | __flush_cache_all(); | |
91 | } | |
92 | #endif | |
4f12bfe5 RB |
93 | |
94 | /* | |
95 | * Some interrupts are reserved by hardware or by software convention. | |
25985edc | 96 | * Mark these as reserved right away so they won't be used accidentally |
4f12bfe5 RB |
97 | * later. |
98 | */ | |
99 | for (i = 0; i <= BASE_PCI_IRQ; i++) { | |
100 | __set_bit(i, hub->irq_alloc_mask); | |
101 | LOCAL_HUB_CLR_INTR(INT_PEND0_BASELVL + i); | |
102 | } | |
103 | ||
104 | __set_bit(IP_PEND0_6_63, hub->irq_alloc_mask); | |
105 | LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63); | |
106 | ||
107 | for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) { | |
108 | __set_bit(i, hub->irq_alloc_mask); | |
109 | LOCAL_HUB_CLR_INTR(INT_PEND1_BASELVL + i); | |
110 | } | |
1da177e4 LT |
111 | } |
112 | ||
06d428d7 | 113 | void __cpuinit per_cpu_init(void) |
1da177e4 LT |
114 | { |
115 | int cpu = smp_processor_id(); | |
116 | int slice = LOCAL_HUB_L(PI_CPU_NUM); | |
117 | cnodeid_t cnode = get_compact_nodeid(); | |
118 | struct hub_data *hub = hub_data(cnode); | |
119 | struct slice_data *si = hub->slice + slice; | |
120 | int i; | |
121 | ||
122 | if (test_and_set_bit(slice, &hub->slice_map)) | |
123 | return; | |
124 | ||
125 | clear_c0_status(ST0_IM); | |
126 | ||
4f12bfe5 RB |
127 | per_hub_init(cnode); |
128 | ||
1da177e4 LT |
129 | for (i = 0; i < LEVELS_PER_SLICE; i++) |
130 | si->level_to_irq[i] = -1; | |
131 | ||
1da177e4 LT |
132 | /* |
133 | * We use this so we can find the local hub's data as fast as only | |
134 | * possible. | |
135 | */ | |
136 | cpu_data[cpu].data = si; | |
137 | ||
138 | cpu_time_init(); | |
139 | install_ipi(); | |
140 | ||
141 | /* Install our NMI handler if symmon hasn't installed one. */ | |
142 | install_cpu_nmi_handler(cputoslice(cpu)); | |
143 | ||
144 | set_c0_status(SRB_DEV0 | SRB_DEV1); | |
1da177e4 LT |
145 | } |
146 | ||
147 | /* | |
148 | * get_nasid() returns the physical node id number of the caller. | |
149 | */ | |
150 | nasid_t | |
151 | get_nasid(void) | |
152 | { | |
153 | return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK) | |
154 | >> NSRI_NODEID_SHFT); | |
155 | } | |
156 | ||
157 | /* | |
158 | * Map the physical node id to a virtual node id (virtual node ids are contiguous). | |
159 | */ | |
160 | cnodeid_t get_compact_nodeid(void) | |
161 | { | |
162 | return NASID_TO_COMPACT_NODEID(get_nasid()); | |
163 | } | |
164 | ||
1da177e4 LT |
165 | static inline void ioc3_eth_init(void) |
166 | { | |
167 | struct ioc3 *ioc3; | |
168 | nasid_t nid; | |
169 | ||
170 | nid = get_nasid(); | |
171 | ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base; | |
172 | ||
173 | ioc3->eier = 0; | |
174 | } | |
175 | ||
1da177e4 LT |
176 | extern void ip27_reboot_setup(void); |
177 | ||
2925aba4 | 178 | void __init plat_mem_setup(void) |
1da177e4 LT |
179 | { |
180 | hubreg_t p, e, n_mode; | |
181 | nasid_t nid; | |
182 | ||
1da177e4 LT |
183 | ip27_reboot_setup(); |
184 | ||
185 | /* | |
186 | * hub_rtc init and cpu clock intr enabled for later calibrate_delay. | |
187 | */ | |
188 | nid = get_nasid(); | |
189 | printk("IP27: Running on node %d.\n", nid); | |
190 | ||
191 | p = LOCAL_HUB_L(PI_CPU_PRESENT_A) & 1; | |
192 | e = LOCAL_HUB_L(PI_CPU_ENABLE_A) & 1; | |
193 | printk("Node %d has %s primary CPU%s.\n", nid, | |
194 | p ? "a" : "no", | |
195 | e ? ", CPU is running" : ""); | |
196 | ||
197 | p = LOCAL_HUB_L(PI_CPU_PRESENT_B) & 1; | |
198 | e = LOCAL_HUB_L(PI_CPU_ENABLE_B) & 1; | |
199 | printk("Node %d has %s secondary CPU%s.\n", nid, | |
200 | p ? "a" : "no", | |
201 | e ? ", CPU is running" : ""); | |
202 | ||
203 | /* | |
204 | * Try to catch kernel missconfigurations and give user an | |
205 | * indication what option to select. | |
206 | */ | |
207 | n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK; | |
208 | printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M'); | |
aa9772e3 | 209 | #ifdef CONFIG_SGI_SN_N_MODE |
1da177e4 LT |
210 | if (!n_mode) |
211 | panic("Kernel compiled for M mode."); | |
212 | #else | |
213 | if (n_mode) | |
214 | panic("Kernel compiled for N mode."); | |
215 | #endif | |
216 | ||
1da177e4 LT |
217 | ioc3_eth_init(); |
218 | per_cpu_init(); | |
219 | ||
220 | set_io_port_base(IO_BASE); | |
1da177e4 | 221 | } |