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1da177e4 LT |
1 | /* |
2 | * Setup pointers to hardware-dependent routines. | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
8 | * Copyright (C) 1996, 97, 98, 2000, 03, 04 Ralf Baechle (ralf@linux-mips.org) | |
9 | */ | |
10 | #include <linux/config.h> | |
11 | #include <linux/eisa.h> | |
12 | #include <linux/hdreg.h> | |
13 | #include <linux/ioport.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mc146818rtc.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/console.h> | |
20 | #include <linux/fb.h> | |
21 | #include <linux/tty.h> | |
22 | ||
23 | #include <asm/arc/types.h> | |
24 | #include <asm/sgialib.h> | |
25 | #include <asm/bcache.h> | |
26 | #include <asm/bootinfo.h> | |
27 | #include <asm/io.h> | |
28 | #include <asm/irq.h> | |
29 | #include <asm/mc146818-time.h> | |
30 | #include <asm/processor.h> | |
31 | #include <asm/ptrace.h> | |
32 | #include <asm/reboot.h> | |
33 | #include <asm/sni.h> | |
34 | #include <asm/time.h> | |
35 | #include <asm/traps.h> | |
36 | ||
37 | extern void sni_machine_restart(char *command); | |
38 | extern void sni_machine_halt(void); | |
39 | extern void sni_machine_power_off(void); | |
40 | ||
41 | static void __init sni_rm200_pci_timer_setup(struct irqaction *irq) | |
42 | { | |
43 | /* set the clock to 100 Hz */ | |
44 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ | |
45 | outb_p(LATCH & 0xff , 0x40); /* LSB */ | |
46 | outb(LATCH >> 8 , 0x40); /* MSB */ | |
47 | setup_irq(0, irq); | |
48 | } | |
49 | ||
50 | /* | |
51 | * A bit more gossip about the iron we're running on ... | |
52 | */ | |
53 | static inline void sni_pcimt_detect(void) | |
54 | { | |
55 | char boardtype[80]; | |
56 | unsigned char csmsr; | |
57 | char *p = boardtype; | |
58 | unsigned int asic; | |
59 | ||
60 | csmsr = *(volatile unsigned char *)PCIMT_CSMSR; | |
61 | ||
62 | p += sprintf(p, "%s PCI", (csmsr & 0x80) ? "RM200" : "RM300"); | |
63 | if ((csmsr & 0x80) == 0) | |
64 | p += sprintf(p, ", board revision %s", | |
65 | (csmsr & 0x20) ? "D" : "C"); | |
66 | asic = csmsr & 0x80; | |
67 | asic = (csmsr & 0x08) ? asic : !asic; | |
68 | p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1"); | |
69 | printk("%s.\n", boardtype); | |
70 | } | |
71 | ||
72 | static void __init sni_display_setup(void) | |
73 | { | |
74 | #ifdef CONFIG_VT | |
75 | #if defined(CONFIG_VGA_CONSOLE) | |
76 | struct screen_info *si = &screen_info; | |
77 | DISPLAY_STATUS *di; | |
78 | ||
79 | di = ArcGetDisplayStatus(1); | |
80 | ||
81 | if (di) { | |
82 | si->orig_x = di->CursorXPosition; | |
83 | si->orig_y = di->CursorYPosition; | |
84 | si->orig_video_cols = di->CursorMaxXPosition; | |
85 | si->orig_video_lines = di->CursorMaxYPosition; | |
86 | si->orig_video_isVGA = VIDEO_TYPE_VGAC; | |
87 | si->orig_video_points = 16; | |
88 | } | |
89 | #endif | |
90 | #endif | |
91 | } | |
92 | ||
93 | static struct resource sni_io_resource = { | |
94 | "PCIMT IO MEM", 0x00001000UL, 0x03bfffffUL, IORESOURCE_IO, | |
95 | }; | |
96 | ||
97 | static struct resource pcimt_io_resources[] = { | |
98 | { "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, | |
99 | { "timer", 0x40, 0x5f, IORESOURCE_BUSY }, | |
100 | { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, | |
101 | { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, | |
102 | { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, | |
103 | { "PCI config data", 0xcfc, 0xcff, IORESOURCE_BUSY } | |
104 | }; | |
105 | ||
106 | static struct resource sni_mem_resource = { | |
107 | "PCIMT PCI MEM", 0x10000000UL, 0xffffffffUL, IORESOURCE_MEM | |
108 | }; | |
109 | ||
110 | /* | |
111 | * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used | |
112 | * for other purposes. Be paranoid and allocate all of the before the PCI | |
113 | * code gets a chance to to map anything else there ... | |
42a3b4f2 | 114 | * |
1da177e4 LT |
115 | * This leaves the following areas available: |
116 | * | |
117 | * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory | |
118 | * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory | |
119 | * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory | |
120 | * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory | |
121 | * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory | |
122 | */ | |
123 | static struct resource pcimt_mem_resources[] = { | |
124 | { "Video RAM area", 0x100a0000, 0x100bffff, IORESOURCE_BUSY }, | |
125 | { "ISA Reserved", 0x100c0000, 0x100fffff, IORESOURCE_BUSY }, | |
126 | { "PCI IO", 0x14000000, 0x17bfffff, IORESOURCE_BUSY }, | |
127 | { "Cache Replacement Area", 0x17c00000, 0x17ffffff, IORESOURCE_BUSY}, | |
128 | { "PCI INT Acknowledge", 0x1a000000, 0x1a000003, IORESOURCE_BUSY }, | |
129 | { "Boot PROM", 0x1fc00000, 0x1fc7ffff, IORESOURCE_BUSY}, | |
130 | { "Diag PROM", 0x1fc80000, 0x1fcfffff, IORESOURCE_BUSY}, | |
131 | { "X-Bus", 0x1fd00000, 0x1fdfffff, IORESOURCE_BUSY}, | |
132 | { "BIOS map", 0x1fe00000, 0x1fefffff, IORESOURCE_BUSY}, | |
133 | { "NVRAM / EEPROM", 0x1ff00000, 0x1ff7ffff, IORESOURCE_BUSY}, | |
134 | { "ASIC PCI", 0x1fff0000, 0x1fffefff, IORESOURCE_BUSY}, | |
135 | { "MP Agent", 0x1ffff000, 0x1fffffff, IORESOURCE_BUSY}, | |
136 | { "Main Memory", 0x20000000, 0x9fffffff, IORESOURCE_BUSY} | |
137 | }; | |
138 | ||
139 | static void __init sni_resource_init(void) | |
140 | { | |
141 | int i; | |
142 | ||
143 | /* request I/O space for devices used on all i[345]86 PCs */ | |
144 | for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++) | |
145 | request_resource(&ioport_resource, pcimt_io_resources + i); | |
146 | ||
147 | /* request mem space for pcimt-specific devices */ | |
148 | for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++) | |
149 | request_resource(&sni_mem_resource, pcimt_mem_resources + i); | |
150 | ||
151 | ioport_resource.end = sni_io_resource.end; | |
152 | } | |
153 | ||
154 | extern struct pci_ops sni_pci_ops; | |
155 | ||
156 | static struct pci_controller sni_controller = { | |
157 | .pci_ops = &sni_pci_ops, | |
158 | .mem_resource = &sni_mem_resource, | |
159 | .mem_offset = 0x10000000UL, | |
160 | .io_resource = &sni_io_resource, | |
161 | .io_offset = 0x00000000UL | |
162 | }; | |
163 | ||
164 | static inline void sni_pcimt_time_init(void) | |
165 | { | |
166 | rtc_get_time = mc146818_get_cmos_time; | |
167 | rtc_set_time = mc146818_set_rtc_mmss; | |
168 | } | |
169 | ||
170 | static int __init sni_rm200_pci_setup(void) | |
171 | { | |
172 | sni_pcimt_detect(); | |
173 | sni_pcimt_sc_init(); | |
174 | sni_pcimt_time_init(); | |
175 | ||
176 | set_io_port_base(SNI_PORT_BASE); | |
177 | ioport_resource.end = sni_io_resource.end; | |
178 | ||
179 | /* | |
180 | * Setup (E)ISA I/O memory access stuff | |
181 | */ | |
182 | isa_slot_offset = 0xb0000000; | |
183 | #ifdef CONFIG_EISA | |
184 | EISA_bus = 1; | |
185 | #endif | |
186 | ||
187 | sni_resource_init(); | |
188 | board_timer_setup = sni_rm200_pci_timer_setup; | |
189 | ||
190 | _machine_restart = sni_machine_restart; | |
191 | _machine_halt = sni_machine_halt; | |
192 | _machine_power_off = sni_machine_power_off; | |
193 | ||
194 | sni_display_setup(); | |
195 | ||
196 | #ifdef CONFIG_PCI | |
197 | register_pci_controller(&sni_controller); | |
198 | #endif | |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
203 | early_initcall(sni_rm200_pci_setup); |