Commit | Line | Data |
---|---|---|
89d63fe1 AN |
1 | /* |
2 | * linux/arch/mips/txx9/generic/setup.c | |
3 | * | |
4 | * Based on linux/arch/mips/txx9/rbtx4938/setup.c, | |
5 | * and RBTX49xx patch from CELF patch archive. | |
6 | * | |
7 | * 2003-2005 (c) MontaVista Software, Inc. | |
8 | * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file "COPYING" in the main directory of this archive | |
12 | * for more details. | |
13 | */ | |
14 | #include <linux/init.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/types.h> | |
edcaf1a6 AN |
17 | #include <linux/interrupt.h> |
18 | #include <linux/string.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/clk.h> | |
21 | #include <linux/err.h> | |
e0eb7307 | 22 | #include <linux/gpio.h> |
68314725 | 23 | #include <linux/platform_device.h> |
7779a5e0 | 24 | #include <linux/serial_core.h> |
51f607c7 | 25 | #include <linux/mtd/physmap.h> |
edcaf1a6 | 26 | #include <asm/bootinfo.h> |
e0eb7307 | 27 | #include <asm/time.h> |
a49297e8 | 28 | #include <asm/reboot.h> |
d10e025f | 29 | #include <asm/r4kcache.h> |
89d63fe1 | 30 | #include <asm/txx9/generic.h> |
07517529 | 31 | #include <asm/txx9/pci.h> |
496a3b5c | 32 | #include <asm/txx9tmr.h> |
edcaf1a6 AN |
33 | #ifdef CONFIG_CPU_TX49XX |
34 | #include <asm/txx9/tx4938.h> | |
35 | #endif | |
89d63fe1 AN |
36 | |
37 | /* EBUSC settings of TX4927, etc. */ | |
38 | struct resource txx9_ce_res[8]; | |
39 | static char txx9_ce_res_name[8][4]; /* "CEn" */ | |
40 | ||
41 | /* pcode, internal register */ | |
94a4c329 | 42 | unsigned int txx9_pcode; |
89d63fe1 AN |
43 | char txx9_pcode_str[8]; |
44 | static struct resource txx9_reg_res = { | |
45 | .name = txx9_pcode_str, | |
46 | .flags = IORESOURCE_MEM, | |
47 | }; | |
48 | void __init | |
49 | txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) | |
50 | { | |
51 | int i; | |
52 | ||
53 | for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { | |
54 | sprintf(txx9_ce_res_name[i], "CE%d", i); | |
55 | txx9_ce_res[i].flags = IORESOURCE_MEM; | |
56 | txx9_ce_res[i].name = txx9_ce_res_name[i]; | |
57 | } | |
58 | ||
073828d0 | 59 | txx9_pcode = pcode; |
89d63fe1 AN |
60 | sprintf(txx9_pcode_str, "TX%x", pcode); |
61 | if (base) { | |
62 | txx9_reg_res.start = base & 0xfffffffffULL; | |
63 | txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); | |
64 | request_resource(&iomem_resource, &txx9_reg_res); | |
65 | } | |
66 | } | |
67 | ||
68 | /* clocks */ | |
69 | unsigned int txx9_master_clock; | |
70 | unsigned int txx9_cpu_clock; | |
71 | unsigned int txx9_gbus_clock; | |
edcaf1a6 | 72 | |
c7b95bcb AN |
73 | #ifdef CONFIG_CPU_TX39XX |
74 | /* don't enable by default - see errata */ | |
75 | int txx9_ccfg_toeon __initdata; | |
76 | #else | |
94a4c329 | 77 | int txx9_ccfg_toeon __initdata = 1; |
c7b95bcb | 78 | #endif |
edcaf1a6 AN |
79 | |
80 | /* Minimum CLK support */ | |
81 | ||
82 | struct clk *clk_get(struct device *dev, const char *id) | |
83 | { | |
84 | if (!strcmp(id, "spi-baseclk")) | |
94a4c329 | 85 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4); |
edcaf1a6 | 86 | if (!strcmp(id, "imbus_clk")) |
94a4c329 | 87 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2); |
edcaf1a6 AN |
88 | return ERR_PTR(-ENOENT); |
89 | } | |
90 | EXPORT_SYMBOL(clk_get); | |
91 | ||
92 | int clk_enable(struct clk *clk) | |
93 | { | |
94 | return 0; | |
95 | } | |
96 | EXPORT_SYMBOL(clk_enable); | |
97 | ||
98 | void clk_disable(struct clk *clk) | |
99 | { | |
100 | } | |
101 | EXPORT_SYMBOL(clk_disable); | |
102 | ||
103 | unsigned long clk_get_rate(struct clk *clk) | |
104 | { | |
105 | return (unsigned long)clk; | |
106 | } | |
107 | EXPORT_SYMBOL(clk_get_rate); | |
108 | ||
109 | void clk_put(struct clk *clk) | |
110 | { | |
111 | } | |
112 | EXPORT_SYMBOL(clk_put); | |
113 | ||
8d795f2a AN |
114 | /* GPIO support */ |
115 | ||
116 | #ifdef CONFIG_GENERIC_GPIO | |
117 | int gpio_to_irq(unsigned gpio) | |
118 | { | |
119 | return -EINVAL; | |
120 | } | |
121 | EXPORT_SYMBOL(gpio_to_irq); | |
122 | ||
123 | int irq_to_gpio(unsigned irq) | |
124 | { | |
125 | return -EINVAL; | |
126 | } | |
127 | EXPORT_SYMBOL(irq_to_gpio); | |
128 | #endif | |
129 | ||
860e546c AN |
130 | #define BOARD_VEC(board) extern struct txx9_board_vec board; |
131 | #include <asm/txx9/boards.h> | |
132 | #undef BOARD_VEC | |
edcaf1a6 | 133 | |
edcaf1a6 AN |
134 | struct txx9_board_vec *txx9_board_vec __initdata; |
135 | static char txx9_system_type[32]; | |
136 | ||
860e546c AN |
137 | static struct txx9_board_vec *board_vecs[] __initdata = { |
138 | #define BOARD_VEC(board) &board, | |
139 | #include <asm/txx9/boards.h> | |
140 | #undef BOARD_VEC | |
141 | }; | |
142 | ||
143 | static struct txx9_board_vec *__init find_board_byname(const char *name) | |
144 | { | |
145 | int i; | |
146 | ||
147 | /* search board_vecs table */ | |
148 | for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { | |
149 | if (strstr(board_vecs[i]->system, name)) | |
150 | return board_vecs[i]; | |
151 | } | |
152 | return NULL; | |
153 | } | |
154 | ||
e0dfb20c | 155 | static void __init prom_init_cmdline(void) |
edcaf1a6 AN |
156 | { |
157 | int argc = (int)fw_arg0; | |
e0dfb20c | 158 | int *argv32 = (int *)fw_arg1; |
edcaf1a6 | 159 | int i; /* Always ignore the "-c" at argv[0] */ |
e0dfb20c | 160 | char builtin[CL_SIZE]; |
edcaf1a6 AN |
161 | |
162 | /* ignore all built-in args if any f/w args given */ | |
e0dfb20c AN |
163 | /* |
164 | * But if built-in strings was started with '+', append them | |
165 | * to command line args. If built-in was started with '-', | |
166 | * ignore all f/w args. | |
167 | */ | |
168 | builtin[0] = '\0'; | |
169 | if (arcs_cmdline[0] == '+') | |
170 | strcpy(builtin, arcs_cmdline + 1); | |
171 | else if (arcs_cmdline[0] == '-') { | |
172 | strcpy(builtin, arcs_cmdline + 1); | |
173 | argc = 0; | |
174 | } else if (argc <= 1) | |
175 | strcpy(builtin, arcs_cmdline); | |
176 | arcs_cmdline[0] = '\0'; | |
edcaf1a6 AN |
177 | |
178 | for (i = 1; i < argc; i++) { | |
e0dfb20c | 179 | char *str = (char *)(long)argv32[i]; |
edcaf1a6 AN |
180 | if (i != 1) |
181 | strcat(arcs_cmdline, " "); | |
e0dfb20c AN |
182 | if (strchr(str, ' ')) { |
183 | strcat(arcs_cmdline, "\""); | |
184 | strcat(arcs_cmdline, str); | |
185 | strcat(arcs_cmdline, "\""); | |
186 | } else | |
187 | strcat(arcs_cmdline, str); | |
188 | } | |
189 | /* append saved builtin args */ | |
190 | if (builtin[0]) { | |
191 | if (arcs_cmdline[0]) | |
192 | strcat(arcs_cmdline, " "); | |
193 | strcat(arcs_cmdline, builtin); | |
edcaf1a6 AN |
194 | } |
195 | } | |
196 | ||
d10e025f AN |
197 | static int txx9_ic_disable __initdata; |
198 | static int txx9_dc_disable __initdata; | |
199 | ||
200 | #if defined(CONFIG_CPU_TX49XX) | |
201 | /* flush all cache on very early stage (before 4k_cache_init) */ | |
202 | static void __init early_flush_dcache(void) | |
203 | { | |
204 | unsigned int conf = read_c0_config(); | |
205 | unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); | |
206 | unsigned int linesz = 32; | |
207 | unsigned long addr, end; | |
208 | ||
209 | end = INDEX_BASE + dc_size / 4; | |
210 | /* 4way, waybit=0 */ | |
211 | for (addr = INDEX_BASE; addr < end; addr += linesz) { | |
212 | cache_op(Index_Writeback_Inv_D, addr | 0); | |
213 | cache_op(Index_Writeback_Inv_D, addr | 1); | |
214 | cache_op(Index_Writeback_Inv_D, addr | 2); | |
215 | cache_op(Index_Writeback_Inv_D, addr | 3); | |
216 | } | |
217 | } | |
218 | ||
219 | static void __init txx9_cache_fixup(void) | |
220 | { | |
221 | unsigned int conf; | |
222 | ||
223 | conf = read_c0_config(); | |
224 | /* flush and disable */ | |
225 | if (txx9_ic_disable) { | |
226 | conf |= TX49_CONF_IC; | |
227 | write_c0_config(conf); | |
228 | } | |
229 | if (txx9_dc_disable) { | |
230 | early_flush_dcache(); | |
231 | conf |= TX49_CONF_DC; | |
232 | write_c0_config(conf); | |
233 | } | |
234 | ||
235 | /* enable cache */ | |
236 | conf = read_c0_config(); | |
237 | if (!txx9_ic_disable) | |
238 | conf &= ~TX49_CONF_IC; | |
239 | if (!txx9_dc_disable) | |
240 | conf &= ~TX49_CONF_DC; | |
241 | write_c0_config(conf); | |
242 | ||
243 | if (conf & TX49_CONF_IC) | |
244 | pr_info("TX49XX I-Cache disabled.\n"); | |
245 | if (conf & TX49_CONF_DC) | |
246 | pr_info("TX49XX D-Cache disabled.\n"); | |
247 | } | |
248 | #elif defined(CONFIG_CPU_TX39XX) | |
249 | /* flush all cache on very early stage (before tx39_cache_init) */ | |
250 | static void __init early_flush_dcache(void) | |
251 | { | |
252 | unsigned int conf = read_c0_config(); | |
253 | unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> | |
254 | TX39_CONF_DCS_SHIFT)); | |
255 | unsigned int linesz = 16; | |
256 | unsigned long addr, end; | |
257 | ||
258 | end = INDEX_BASE + dc_size / 2; | |
259 | /* 2way, waybit=0 */ | |
260 | for (addr = INDEX_BASE; addr < end; addr += linesz) { | |
261 | cache_op(Index_Writeback_Inv_D, addr | 0); | |
262 | cache_op(Index_Writeback_Inv_D, addr | 1); | |
263 | } | |
264 | } | |
265 | ||
266 | static void __init txx9_cache_fixup(void) | |
267 | { | |
268 | unsigned int conf; | |
269 | ||
270 | conf = read_c0_config(); | |
271 | /* flush and disable */ | |
272 | if (txx9_ic_disable) { | |
273 | conf &= ~TX39_CONF_ICE; | |
274 | write_c0_config(conf); | |
275 | } | |
276 | if (txx9_dc_disable) { | |
277 | early_flush_dcache(); | |
278 | conf &= ~TX39_CONF_DCE; | |
279 | write_c0_config(conf); | |
280 | } | |
281 | ||
282 | /* enable cache */ | |
283 | conf = read_c0_config(); | |
284 | if (!txx9_ic_disable) | |
285 | conf |= TX39_CONF_ICE; | |
286 | if (!txx9_dc_disable) | |
287 | conf |= TX39_CONF_DCE; | |
288 | write_c0_config(conf); | |
289 | ||
290 | if (!(conf & TX39_CONF_ICE)) | |
291 | pr_info("TX39XX I-Cache disabled.\n"); | |
292 | if (!(conf & TX39_CONF_DCE)) | |
293 | pr_info("TX39XX D-Cache disabled.\n"); | |
294 | } | |
295 | #else | |
296 | static inline void txx9_cache_fixup(void) | |
297 | { | |
298 | } | |
299 | #endif | |
300 | ||
860e546c | 301 | static void __init preprocess_cmdline(void) |
edcaf1a6 | 302 | { |
860e546c AN |
303 | char cmdline[CL_SIZE]; |
304 | char *s; | |
305 | ||
306 | strcpy(cmdline, arcs_cmdline); | |
307 | s = cmdline; | |
308 | arcs_cmdline[0] = '\0'; | |
309 | while (s && *s) { | |
310 | char *str = strsep(&s, " "); | |
311 | if (strncmp(str, "board=", 6) == 0) { | |
312 | txx9_board_vec = find_board_byname(str + 6); | |
313 | continue; | |
314 | } else if (strncmp(str, "masterclk=", 10) == 0) { | |
315 | unsigned long val; | |
316 | if (strict_strtoul(str + 10, 10, &val) == 0) | |
317 | txx9_master_clock = val; | |
318 | continue; | |
d10e025f AN |
319 | } else if (strcmp(str, "icdisable") == 0) { |
320 | txx9_ic_disable = 1; | |
321 | continue; | |
322 | } else if (strcmp(str, "dcdisable") == 0) { | |
323 | txx9_dc_disable = 1; | |
324 | continue; | |
c7b95bcb AN |
325 | } else if (strcmp(str, "toeoff") == 0) { |
326 | txx9_ccfg_toeon = 0; | |
327 | continue; | |
328 | } else if (strcmp(str, "toeon") == 0) { | |
329 | txx9_ccfg_toeon = 1; | |
330 | continue; | |
860e546c AN |
331 | } |
332 | if (arcs_cmdline[0]) | |
333 | strcat(arcs_cmdline, " "); | |
334 | strcat(arcs_cmdline, str); | |
335 | } | |
d10e025f AN |
336 | |
337 | txx9_cache_fixup(); | |
860e546c AN |
338 | } |
339 | ||
340 | static void __init select_board(void) | |
341 | { | |
342 | const char *envstr; | |
343 | ||
344 | /* first, determine by "board=" argument in preprocess_cmdline() */ | |
345 | if (txx9_board_vec) | |
346 | return; | |
347 | /* next, determine by "board" envvar */ | |
348 | envstr = prom_getenv("board"); | |
349 | if (envstr) { | |
350 | txx9_board_vec = find_board_byname(envstr); | |
351 | if (txx9_board_vec) | |
352 | return; | |
353 | } | |
354 | ||
355 | /* select "default" board */ | |
edcaf1a6 | 356 | #ifdef CONFIG_CPU_TX39XX |
7a1fdf19 | 357 | txx9_board_vec = &jmr3927_vec; |
edcaf1a6 AN |
358 | #endif |
359 | #ifdef CONFIG_CPU_TX49XX | |
360 | switch (TX4938_REV_PCODE()) { | |
8d795f2a | 361 | #ifdef CONFIG_TOSHIBA_RBTX4927 |
edcaf1a6 | 362 | case 0x4927: |
7a1fdf19 | 363 | txx9_board_vec = &rbtx4927_vec; |
edcaf1a6 AN |
364 | break; |
365 | case 0x4937: | |
7a1fdf19 | 366 | txx9_board_vec = &rbtx4937_vec; |
edcaf1a6 | 367 | break; |
8d795f2a AN |
368 | #endif |
369 | #ifdef CONFIG_TOSHIBA_RBTX4938 | |
edcaf1a6 | 370 | case 0x4938: |
7a1fdf19 | 371 | txx9_board_vec = &rbtx4938_vec; |
edcaf1a6 | 372 | break; |
8d795f2a | 373 | #endif |
edcaf1a6 AN |
374 | } |
375 | #endif | |
860e546c AN |
376 | } |
377 | ||
378 | void __init prom_init(void) | |
379 | { | |
380 | prom_init_cmdline(); | |
381 | preprocess_cmdline(); | |
382 | select_board(); | |
7a1fdf19 YY |
383 | |
384 | strcpy(txx9_system_type, txx9_board_vec->system); | |
385 | ||
7b226094 | 386 | txx9_board_vec->prom_init(); |
edcaf1a6 AN |
387 | } |
388 | ||
389 | void __init prom_free_prom_memory(void) | |
390 | { | |
391 | } | |
392 | ||
393 | const char *get_system_type(void) | |
394 | { | |
395 | return txx9_system_type; | |
396 | } | |
397 | ||
398 | char * __init prom_getcmdline(void) | |
399 | { | |
400 | return &(arcs_cmdline[0]); | |
401 | } | |
402 | ||
265b89db AN |
403 | const char *__init prom_getenv(const char *name) |
404 | { | |
405 | const s32 *str = (const s32 *)fw_arg2; | |
406 | ||
407 | if (!str) | |
408 | return NULL; | |
409 | /* YAMON style ("name", "value" pairs) */ | |
410 | while (str[0] && str[1]) { | |
411 | if (!strcmp((const char *)(unsigned long)str[0], name)) | |
412 | return (const char *)(unsigned long)str[1]; | |
413 | str += 2; | |
414 | } | |
415 | return NULL; | |
416 | } | |
417 | ||
a49297e8 AN |
418 | static void __noreturn txx9_machine_halt(void) |
419 | { | |
420 | local_irq_disable(); | |
421 | clear_c0_status(ST0_IM); | |
422 | while (1) { | |
423 | if (cpu_wait) { | |
424 | (*cpu_wait)(); | |
425 | if (cpu_has_counter) { | |
426 | /* | |
427 | * Clear counter interrupt while it | |
428 | * breaks WAIT instruction even if | |
429 | * masked. | |
430 | */ | |
431 | write_c0_compare(0); | |
432 | } | |
433 | } | |
434 | } | |
435 | } | |
436 | ||
68314725 AN |
437 | /* Watchdog support */ |
438 | void __init txx9_wdt_init(unsigned long base) | |
439 | { | |
440 | struct resource res = { | |
441 | .start = base, | |
442 | .end = base + 0x100 - 1, | |
443 | .flags = IORESOURCE_MEM, | |
444 | }; | |
445 | platform_device_register_simple("txx9wdt", -1, &res, 1); | |
446 | } | |
447 | ||
496a3b5c AN |
448 | void txx9_wdt_now(unsigned long base) |
449 | { | |
450 | struct txx9_tmr_reg __iomem *tmrptr = | |
451 | ioremap(base, sizeof(struct txx9_tmr_reg)); | |
452 | /* disable watch dog timer */ | |
453 | __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); | |
454 | __raw_writel(0, &tmrptr->tcr); | |
455 | /* kick watchdog */ | |
456 | __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); | |
457 | __raw_writel(1, &tmrptr->cpra); /* immediate */ | |
458 | __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, | |
459 | &tmrptr->tcr); | |
460 | } | |
461 | ||
c49f91f5 AN |
462 | /* SPI support */ |
463 | void __init txx9_spi_init(int busid, unsigned long base, int irq) | |
464 | { | |
465 | struct resource res[] = { | |
466 | { | |
467 | .start = base, | |
468 | .end = base + 0x20 - 1, | |
469 | .flags = IORESOURCE_MEM, | |
470 | }, { | |
471 | .start = irq, | |
472 | .flags = IORESOURCE_IRQ, | |
473 | }, | |
474 | }; | |
475 | platform_device_register_simple("spi_txx9", busid, | |
476 | res, ARRAY_SIZE(res)); | |
477 | } | |
478 | ||
479 | void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) | |
480 | { | |
481 | struct platform_device *pdev = | |
482 | platform_device_alloc("tc35815-mac", id); | |
483 | if (!pdev || | |
484 | platform_device_add_data(pdev, ethaddr, 6) || | |
485 | platform_device_add(pdev)) | |
486 | platform_device_put(pdev); | |
487 | } | |
488 | ||
7779a5e0 AN |
489 | void __init txx9_sio_init(unsigned long baseaddr, int irq, |
490 | unsigned int line, unsigned int sclk, int nocts) | |
491 | { | |
492 | #ifdef CONFIG_SERIAL_TXX9 | |
493 | struct uart_port req; | |
494 | ||
495 | memset(&req, 0, sizeof(req)); | |
496 | req.line = line; | |
497 | req.iotype = UPIO_MEM; | |
498 | req.membase = ioremap(baseaddr, 0x24); | |
499 | req.mapbase = baseaddr; | |
500 | req.irq = irq; | |
501 | if (!nocts) | |
502 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; | |
503 | if (sclk) { | |
504 | req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; | |
505 | req.uartclk = sclk; | |
506 | } else | |
507 | req.uartclk = TXX9_IMCLK; | |
508 | early_serial_txx9_setup(&req); | |
509 | #endif /* CONFIG_SERIAL_TXX9 */ | |
510 | } | |
511 | ||
e352953c AN |
512 | #ifdef CONFIG_EARLY_PRINTK |
513 | static void __init null_prom_putchar(char c) | |
514 | { | |
515 | } | |
516 | void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; | |
517 | ||
518 | void __init prom_putchar(char c) | |
519 | { | |
520 | txx9_prom_putchar(c); | |
521 | } | |
522 | ||
523 | static void __iomem *early_txx9_sio_port; | |
524 | ||
525 | static void __init early_txx9_sio_putchar(char c) | |
526 | { | |
527 | #define TXX9_SICISR 0x0c | |
528 | #define TXX9_SITFIFO 0x1c | |
529 | #define TXX9_SICISR_TXALS 0x00000002 | |
530 | while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & | |
531 | TXX9_SICISR_TXALS)) | |
532 | ; | |
533 | __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); | |
534 | } | |
535 | ||
536 | void __init txx9_sio_putchar_init(unsigned long baseaddr) | |
537 | { | |
538 | early_txx9_sio_port = ioremap(baseaddr, 0x24); | |
539 | txx9_prom_putchar = early_txx9_sio_putchar; | |
540 | } | |
541 | #endif /* CONFIG_EARLY_PRINTK */ | |
542 | ||
edcaf1a6 AN |
543 | /* wrappers */ |
544 | void __init plat_mem_setup(void) | |
545 | { | |
94a4c329 AN |
546 | ioport_resource.start = 0; |
547 | ioport_resource.end = ~0UL; /* no limit */ | |
548 | iomem_resource.start = 0; | |
549 | iomem_resource.end = ~0UL; /* no limit */ | |
a49297e8 AN |
550 | |
551 | /* fallback restart/halt routines */ | |
552 | _machine_restart = (void (*)(char *))txx9_machine_halt; | |
553 | _machine_halt = txx9_machine_halt; | |
554 | pm_power_off = txx9_machine_halt; | |
555 | ||
07517529 AN |
556 | #ifdef CONFIG_PCI |
557 | pcibios_plat_setup = txx9_pcibios_setup; | |
558 | #endif | |
edcaf1a6 AN |
559 | txx9_board_vec->mem_setup(); |
560 | } | |
561 | ||
562 | void __init arch_init_irq(void) | |
563 | { | |
564 | txx9_board_vec->irq_setup(); | |
565 | } | |
566 | ||
567 | void __init plat_time_init(void) | |
568 | { | |
1374d084 AN |
569 | #ifdef CONFIG_CPU_TX49XX |
570 | mips_hpt_frequency = txx9_cpu_clock / 2; | |
571 | #endif | |
edcaf1a6 AN |
572 | txx9_board_vec->time_init(); |
573 | } | |
574 | ||
575 | static int __init _txx9_arch_init(void) | |
576 | { | |
577 | if (txx9_board_vec->arch_init) | |
578 | txx9_board_vec->arch_init(); | |
579 | return 0; | |
580 | } | |
581 | arch_initcall(_txx9_arch_init); | |
582 | ||
583 | static int __init _txx9_device_init(void) | |
584 | { | |
585 | if (txx9_board_vec->device_init) | |
586 | txx9_board_vec->device_init(); | |
587 | return 0; | |
588 | } | |
589 | device_initcall(_txx9_device_init); | |
590 | ||
591 | int (*txx9_irq_dispatch)(int pending); | |
592 | asmlinkage void plat_irq_dispatch(void) | |
593 | { | |
594 | int pending = read_c0_status() & read_c0_cause() & ST0_IM; | |
595 | int irq = txx9_irq_dispatch(pending); | |
596 | ||
597 | if (likely(irq >= 0)) | |
598 | do_IRQ(irq); | |
599 | else | |
600 | spurious_interrupt(); | |
601 | } | |
4c642f3f AN |
602 | |
603 | /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ | |
604 | #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B | |
605 | static unsigned long __swizzle_addr_none(unsigned long port) | |
606 | { | |
607 | return port; | |
608 | } | |
609 | unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; | |
610 | EXPORT_SYMBOL(__swizzle_addr_b); | |
611 | #endif | |
51f607c7 AN |
612 | |
613 | void __init txx9_physmap_flash_init(int no, unsigned long addr, | |
614 | unsigned long size, | |
615 | const struct physmap_flash_data *pdata) | |
616 | { | |
617 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | |
618 | struct resource res = { | |
619 | .start = addr, | |
620 | .end = addr + size - 1, | |
621 | .flags = IORESOURCE_MEM, | |
622 | }; | |
623 | struct platform_device *pdev; | |
624 | #ifdef CONFIG_MTD_PARTITIONS | |
625 | static struct mtd_partition parts[2]; | |
626 | struct physmap_flash_data pdata_part; | |
627 | ||
628 | /* If this area contained boot area, make separate partition */ | |
629 | if (pdata->nr_parts == 0 && !pdata->parts && | |
630 | addr < 0x1fc00000 && addr + size > 0x1fc00000 && | |
631 | !parts[0].name) { | |
632 | parts[0].name = "boot"; | |
633 | parts[0].offset = 0x1fc00000 - addr; | |
634 | parts[0].size = addr + size - 0x1fc00000; | |
635 | parts[1].name = "user"; | |
636 | parts[1].offset = 0; | |
637 | parts[1].size = 0x1fc00000 - addr; | |
638 | pdata_part = *pdata; | |
639 | pdata_part.nr_parts = ARRAY_SIZE(parts); | |
640 | pdata_part.parts = parts; | |
641 | pdata = &pdata_part; | |
642 | } | |
643 | #endif | |
644 | pdev = platform_device_alloc("physmap-flash", no); | |
645 | if (!pdev || | |
646 | platform_device_add_resources(pdev, &res, 1) || | |
647 | platform_device_add_data(pdev, pdata, sizeof(*pdata)) || | |
648 | platform_device_add(pdev)) | |
649 | platform_device_put(pdev); | |
650 | #endif | |
651 | } |