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b920de1b DH |
1 | /* MN10300 On-chip serial port UART driver |
2 | * | |
3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | |
4 | * Written by David Howells (dhowells@redhat.com) | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public Licence | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the Licence, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | static const char serial_name[] = "MN10300 Serial driver"; | |
13 | static const char serial_version[] = "mn10300_serial-1.0"; | |
14 | static const char serial_revdate[] = "2007-11-06"; | |
15 | ||
16 | #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
17 | #define SUPPORT_SYSRQ | |
18 | #endif | |
19 | ||
b920de1b DH |
20 | #include <linux/module.h> |
21 | #include <linux/serial.h> | |
22 | #include <linux/circ_buf.h> | |
23 | #include <linux/errno.h> | |
24 | #include <linux/signal.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/timer.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/tty.h> | |
29 | #include <linux/tty_flip.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/string.h> | |
32 | #include <linux/ioport.h> | |
33 | #include <linux/mm.h> | |
34 | #include <linux/slab.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/console.h> | |
37 | #include <linux/sysrq.h> | |
38 | ||
39 | #include <asm/system.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/irq.h> | |
42 | #include <asm/bitops.h> | |
43 | #include <asm/serial-regs.h> | |
44 | #include <asm/unit/timex.h> | |
45 | #include "mn10300-serial.h" | |
46 | ||
47 | static inline __attribute__((format(printf, 1, 2))) | |
48 | void no_printk(const char *fmt, ...) | |
49 | { | |
50 | } | |
51 | ||
52 | #define kenter(FMT, ...) \ | |
53 | printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__) | |
54 | #define _enter(FMT, ...) \ | |
55 | no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__) | |
56 | #define kdebug(FMT, ...) \ | |
57 | printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__) | |
58 | #define _debug(FMT, ...) \ | |
59 | no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__) | |
60 | #define kproto(FMT, ...) \ | |
61 | printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__) | |
62 | #define _proto(FMT, ...) \ | |
63 | no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__) | |
64 | ||
65 | #define NR_UARTS 3 | |
66 | ||
67 | #ifdef CONFIG_MN10300_TTYSM_CONSOLE | |
68 | static void mn10300_serial_console_write(struct console *co, | |
69 | const char *s, unsigned count); | |
70 | static int __init mn10300_serial_console_setup(struct console *co, | |
71 | char *options); | |
72 | ||
73 | static struct uart_driver mn10300_serial_driver; | |
74 | static struct console mn10300_serial_console = { | |
75 | .name = "ttySM", | |
76 | .write = mn10300_serial_console_write, | |
77 | .device = uart_console_device, | |
78 | .setup = mn10300_serial_console_setup, | |
79 | .flags = CON_PRINTBUFFER, | |
80 | .index = -1, | |
81 | .data = &mn10300_serial_driver, | |
82 | }; | |
83 | #endif | |
84 | ||
85 | static struct uart_driver mn10300_serial_driver = { | |
86 | .owner = NULL, | |
87 | .driver_name = "mn10300-serial", | |
88 | .dev_name = "ttySM", | |
89 | .major = TTY_MAJOR, | |
90 | .minor = 128, | |
91 | .nr = NR_UARTS, | |
92 | #ifdef CONFIG_MN10300_TTYSM_CONSOLE | |
93 | .cons = &mn10300_serial_console, | |
94 | #endif | |
95 | }; | |
96 | ||
97 | static unsigned int mn10300_serial_tx_empty(struct uart_port *); | |
98 | static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl); | |
99 | static unsigned int mn10300_serial_get_mctrl(struct uart_port *); | |
100 | static void mn10300_serial_stop_tx(struct uart_port *); | |
101 | static void mn10300_serial_start_tx(struct uart_port *); | |
102 | static void mn10300_serial_send_xchar(struct uart_port *, char ch); | |
103 | static void mn10300_serial_stop_rx(struct uart_port *); | |
104 | static void mn10300_serial_enable_ms(struct uart_port *); | |
105 | static void mn10300_serial_break_ctl(struct uart_port *, int ctl); | |
106 | static int mn10300_serial_startup(struct uart_port *); | |
107 | static void mn10300_serial_shutdown(struct uart_port *); | |
108 | static void mn10300_serial_set_termios(struct uart_port *, | |
109 | struct ktermios *new, | |
110 | struct ktermios *old); | |
111 | static const char *mn10300_serial_type(struct uart_port *); | |
112 | static void mn10300_serial_release_port(struct uart_port *); | |
113 | static int mn10300_serial_request_port(struct uart_port *); | |
114 | static void mn10300_serial_config_port(struct uart_port *, int); | |
115 | static int mn10300_serial_verify_port(struct uart_port *, | |
116 | struct serial_struct *); | |
117 | ||
118 | static const struct uart_ops mn10300_serial_ops = { | |
119 | .tx_empty = mn10300_serial_tx_empty, | |
120 | .set_mctrl = mn10300_serial_set_mctrl, | |
121 | .get_mctrl = mn10300_serial_get_mctrl, | |
122 | .stop_tx = mn10300_serial_stop_tx, | |
123 | .start_tx = mn10300_serial_start_tx, | |
124 | .send_xchar = mn10300_serial_send_xchar, | |
125 | .stop_rx = mn10300_serial_stop_rx, | |
126 | .enable_ms = mn10300_serial_enable_ms, | |
127 | .break_ctl = mn10300_serial_break_ctl, | |
128 | .startup = mn10300_serial_startup, | |
129 | .shutdown = mn10300_serial_shutdown, | |
130 | .set_termios = mn10300_serial_set_termios, | |
131 | .type = mn10300_serial_type, | |
132 | .release_port = mn10300_serial_release_port, | |
133 | .request_port = mn10300_serial_request_port, | |
134 | .config_port = mn10300_serial_config_port, | |
135 | .verify_port = mn10300_serial_verify_port, | |
136 | }; | |
137 | ||
138 | static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id); | |
139 | ||
140 | /* | |
141 | * the first on-chip serial port: ttySM0 (aka SIF0) | |
142 | */ | |
143 | #ifdef CONFIG_MN10300_TTYSM0 | |
144 | struct mn10300_serial_port mn10300_serial_port_sif0 = { | |
145 | .uart.ops = &mn10300_serial_ops, | |
146 | .uart.membase = (void __iomem *) &SC0CTR, | |
147 | .uart.mapbase = (unsigned long) &SC0CTR, | |
148 | .uart.iotype = UPIO_MEM, | |
149 | .uart.irq = 0, | |
150 | .uart.uartclk = 0, /* MN10300_IOCLK, */ | |
151 | .uart.fifosize = 1, | |
152 | .uart.flags = UPF_BOOT_AUTOCONF, | |
153 | .uart.line = 0, | |
154 | .uart.type = PORT_MN10300, | |
155 | .uart.lock = | |
156 | __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock), | |
157 | .name = "ttySM0", | |
158 | ._iobase = &SC0CTR, | |
159 | ._control = &SC0CTR, | |
160 | ._status = (volatile u8 *) &SC0STR, | |
161 | ._intr = &SC0ICR, | |
162 | ._rxb = &SC0RXB, | |
163 | ._txb = &SC0TXB, | |
164 | .rx_name = "ttySM0/Rx", | |
165 | .tx_name = "ttySM0/Tx", | |
166 | #ifdef CONFIG_MN10300_TTYSM0_TIMER8 | |
167 | .tm_name = "ttySM0/Timer8", | |
168 | ._tmxmd = &TM8MD, | |
169 | ._tmxbr = &TM8BR, | |
170 | ._tmicr = &TM8ICR, | |
171 | .tm_irq = TM8IRQ, | |
172 | .div_timer = MNSCx_DIV_TIMER_16BIT, | |
173 | #else /* CONFIG_MN10300_TTYSM0_TIMER2 */ | |
174 | .tm_name = "ttySM0/Timer2", | |
175 | ._tmxmd = &TM2MD, | |
176 | ._tmxbr = (volatile u16 *) &TM2BR, | |
177 | ._tmicr = &TM2ICR, | |
178 | .tm_irq = TM2IRQ, | |
179 | .div_timer = MNSCx_DIV_TIMER_8BIT, | |
180 | #endif | |
181 | .rx_irq = SC0RXIRQ, | |
182 | .tx_irq = SC0TXIRQ, | |
183 | .rx_icr = &GxICR(SC0RXIRQ), | |
184 | .tx_icr = &GxICR(SC0TXIRQ), | |
185 | .clock_src = MNSCx_CLOCK_SRC_IOCLK, | |
186 | .options = 0, | |
187 | #ifdef CONFIG_GDBSTUB_ON_TTYSM0 | |
188 | .gdbstub = 1, | |
189 | #endif | |
190 | }; | |
191 | #endif /* CONFIG_MN10300_TTYSM0 */ | |
192 | ||
193 | /* | |
194 | * the second on-chip serial port: ttySM1 (aka SIF1) | |
195 | */ | |
196 | #ifdef CONFIG_MN10300_TTYSM1 | |
197 | struct mn10300_serial_port mn10300_serial_port_sif1 = { | |
198 | .uart.ops = &mn10300_serial_ops, | |
199 | .uart.membase = (void __iomem *) &SC1CTR, | |
200 | .uart.mapbase = (unsigned long) &SC1CTR, | |
201 | .uart.iotype = UPIO_MEM, | |
202 | .uart.irq = 0, | |
203 | .uart.uartclk = 0, /* MN10300_IOCLK, */ | |
204 | .uart.fifosize = 1, | |
205 | .uart.flags = UPF_BOOT_AUTOCONF, | |
206 | .uart.line = 1, | |
207 | .uart.type = PORT_MN10300, | |
208 | .uart.lock = | |
209 | __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock), | |
210 | .name = "ttySM1", | |
211 | ._iobase = &SC1CTR, | |
212 | ._control = &SC1CTR, | |
213 | ._status = (volatile u8 *) &SC1STR, | |
214 | ._intr = &SC1ICR, | |
215 | ._rxb = &SC1RXB, | |
216 | ._txb = &SC1TXB, | |
217 | .rx_name = "ttySM1/Rx", | |
218 | .tx_name = "ttySM1/Tx", | |
219 | #ifdef CONFIG_MN10300_TTYSM1_TIMER9 | |
220 | .tm_name = "ttySM1/Timer9", | |
221 | ._tmxmd = &TM9MD, | |
222 | ._tmxbr = &TM9BR, | |
223 | ._tmicr = &TM9ICR, | |
224 | .tm_irq = TM9IRQ, | |
225 | .div_timer = MNSCx_DIV_TIMER_16BIT, | |
226 | #else /* CONFIG_MN10300_TTYSM1_TIMER3 */ | |
227 | .tm_name = "ttySM1/Timer3", | |
228 | ._tmxmd = &TM3MD, | |
229 | ._tmxbr = (volatile u16 *) &TM3BR, | |
230 | ._tmicr = &TM3ICR, | |
231 | .tm_irq = TM3IRQ, | |
232 | .div_timer = MNSCx_DIV_TIMER_8BIT, | |
233 | #endif | |
234 | .rx_irq = SC1RXIRQ, | |
235 | .tx_irq = SC1TXIRQ, | |
236 | .rx_icr = &GxICR(SC1RXIRQ), | |
237 | .tx_icr = &GxICR(SC1TXIRQ), | |
238 | .clock_src = MNSCx_CLOCK_SRC_IOCLK, | |
239 | .options = 0, | |
240 | #ifdef CONFIG_GDBSTUB_ON_TTYSM1 | |
241 | .gdbstub = 1, | |
242 | #endif | |
243 | }; | |
244 | #endif /* CONFIG_MN10300_TTYSM1 */ | |
245 | ||
246 | /* | |
247 | * the third on-chip serial port: ttySM2 (aka SIF2) | |
248 | */ | |
249 | #ifdef CONFIG_MN10300_TTYSM2 | |
250 | struct mn10300_serial_port mn10300_serial_port_sif2 = { | |
251 | .uart.ops = &mn10300_serial_ops, | |
252 | .uart.membase = (void __iomem *) &SC2CTR, | |
253 | .uart.mapbase = (unsigned long) &SC2CTR, | |
254 | .uart.iotype = UPIO_MEM, | |
255 | .uart.irq = 0, | |
256 | .uart.uartclk = 0, /* MN10300_IOCLK, */ | |
257 | .uart.fifosize = 1, | |
258 | .uart.flags = UPF_BOOT_AUTOCONF, | |
259 | .uart.line = 2, | |
260 | #ifdef CONFIG_MN10300_TTYSM2_CTS | |
261 | .uart.type = PORT_MN10300_CTS, | |
262 | #else | |
263 | .uart.type = PORT_MN10300, | |
264 | #endif | |
265 | .uart.lock = | |
266 | __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock), | |
267 | .name = "ttySM2", | |
268 | .rx_name = "ttySM2/Rx", | |
269 | .tx_name = "ttySM2/Tx", | |
270 | .tm_name = "ttySM2/Timer10", | |
271 | ._iobase = &SC2CTR, | |
272 | ._control = &SC2CTR, | |
273 | ._status = &SC2STR, | |
274 | ._intr = &SC2ICR, | |
275 | ._rxb = &SC2RXB, | |
276 | ._txb = &SC2TXB, | |
277 | ._tmxmd = &TM10MD, | |
278 | ._tmxbr = &TM10BR, | |
279 | ._tmicr = &TM10ICR, | |
280 | .tm_irq = TM10IRQ, | |
281 | .div_timer = MNSCx_DIV_TIMER_16BIT, | |
282 | .rx_irq = SC2RXIRQ, | |
283 | .tx_irq = SC2TXIRQ, | |
284 | .rx_icr = &GxICR(SC2RXIRQ), | |
285 | .tx_icr = &GxICR(SC2TXIRQ), | |
286 | .clock_src = MNSCx_CLOCK_SRC_IOCLK, | |
287 | #ifdef CONFIG_MN10300_TTYSM2_CTS | |
288 | .options = MNSCx_OPT_CTS, | |
289 | #else | |
290 | .options = 0, | |
291 | #endif | |
292 | #ifdef CONFIG_GDBSTUB_ON_TTYSM2 | |
293 | .gdbstub = 1, | |
294 | #endif | |
295 | }; | |
296 | #endif /* CONFIG_MN10300_TTYSM2 */ | |
297 | ||
298 | ||
299 | /* | |
300 | * list of available serial ports | |
301 | */ | |
302 | struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = { | |
303 | #ifdef CONFIG_MN10300_TTYSM0 | |
304 | [0] = &mn10300_serial_port_sif0, | |
305 | #endif | |
306 | #ifdef CONFIG_MN10300_TTYSM1 | |
307 | [1] = &mn10300_serial_port_sif1, | |
308 | #endif | |
309 | #ifdef CONFIG_MN10300_TTYSM2 | |
310 | [2] = &mn10300_serial_port_sif2, | |
311 | #endif | |
312 | [NR_UARTS] = NULL, | |
313 | }; | |
314 | ||
315 | ||
316 | /* | |
317 | * we abuse the serial ports' baud timers' interrupt lines to get the ability | |
318 | * to deliver interrupts to userspace as we use the ports' interrupt lines to | |
319 | * do virtual DMA on account of the ports having no hardware FIFOs | |
320 | * | |
321 | * we can generate an interrupt manually in the assembly stubs by writing to | |
322 | * the enable and detect bits in the interrupt control register, so all we need | |
323 | * to do here is disable the interrupt line | |
324 | * | |
325 | * note that we can't just leave the line enabled as the baud rate timer *also* | |
326 | * generates interrupts | |
327 | */ | |
328 | static void mn10300_serial_mask_ack(unsigned int irq) | |
329 | { | |
330 | u16 tmp; | |
331 | GxICR(irq) = GxICR_LEVEL_6; | |
332 | tmp = GxICR(irq); /* flush write buffer */ | |
333 | } | |
334 | ||
335 | static void mn10300_serial_nop(unsigned int irq) | |
336 | { | |
337 | } | |
338 | ||
339 | static struct irq_chip mn10300_serial_pic = { | |
340 | .name = "mnserial", | |
341 | .ack = mn10300_serial_mask_ack, | |
342 | .mask = mn10300_serial_mask_ack, | |
343 | .mask_ack = mn10300_serial_mask_ack, | |
344 | .unmask = mn10300_serial_nop, | |
345 | .end = mn10300_serial_nop, | |
346 | }; | |
347 | ||
348 | ||
349 | /* | |
350 | * serial virtual DMA interrupt jump table | |
351 | */ | |
352 | struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS]; | |
353 | ||
354 | static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port) | |
355 | { | |
356 | u16 x; | |
357 | *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT; | |
358 | x = *port->tx_icr; | |
359 | } | |
360 | ||
361 | static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port) | |
362 | { | |
363 | u16 x; | |
364 | *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE; | |
365 | x = *port->tx_icr; | |
366 | } | |
367 | ||
368 | static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port) | |
369 | { | |
370 | u16 x; | |
371 | *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT; | |
372 | x = *port->rx_icr; | |
373 | } | |
374 | ||
375 | /* | |
376 | * multi-bit equivalent of test_and_clear_bit() | |
377 | */ | |
378 | static int mask_test_and_clear(volatile u8 *ptr, u8 mask) | |
379 | { | |
380 | u32 epsw; | |
381 | asm volatile(" bclr %1,(%2) \n" | |
382 | " mov epsw,%0 \n" | |
383 | : "=d"(epsw) : "d"(mask), "a"(ptr)); | |
384 | return !(epsw & EPSW_FLAG_Z); | |
385 | } | |
386 | ||
387 | /* | |
388 | * receive chars from the ring buffer for this serial port | |
389 | * - must do break detection here (not done in the UART) | |
390 | */ | |
391 | static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port) | |
392 | { | |
393 | struct uart_icount *icount = &port->uart.icount; | |
34492b58 | 394 | struct tty_struct *tty = port->uart.info->port.tty; |
b920de1b DH |
395 | unsigned ix; |
396 | int count; | |
397 | u8 st, ch, push, status, overrun; | |
398 | ||
399 | _enter("%s", port->name); | |
400 | ||
401 | push = 0; | |
402 | ||
403 | count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE); | |
404 | count = tty_buffer_request_room(tty, count); | |
405 | if (count == 0) { | |
406 | if (!tty->low_latency) | |
407 | tty_flip_buffer_push(tty); | |
408 | return; | |
409 | } | |
410 | ||
411 | try_again: | |
412 | /* pull chars out of the hat */ | |
413 | ix = port->rx_outp; | |
414 | if (ix == port->rx_inp) { | |
415 | if (push && !tty->low_latency) | |
416 | tty_flip_buffer_push(tty); | |
417 | return; | |
418 | } | |
419 | ||
420 | ch = port->rx_buffer[ix++]; | |
421 | st = port->rx_buffer[ix++]; | |
422 | smp_rmb(); | |
423 | port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1); | |
424 | port->uart.icount.rx++; | |
425 | ||
426 | st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF; | |
427 | status = 0; | |
428 | overrun = 0; | |
429 | ||
430 | /* the UART doesn't detect BREAK, so we have to do that ourselves | |
431 | * - it starts as a framing error on a NUL character | |
432 | * - then we count another two NUL characters before issuing TTY_BREAK | |
433 | * - then we end on a normal char or one that has all the bottom bits | |
434 | * zero and the top bits set | |
435 | */ | |
436 | switch (port->rx_brk) { | |
437 | case 0: | |
438 | /* not breaking at the moment */ | |
439 | break; | |
440 | ||
441 | case 1: | |
442 | if (st & SC01STR_FEF && ch == 0) { | |
443 | port->rx_brk = 2; | |
444 | goto try_again; | |
445 | } | |
446 | goto not_break; | |
447 | ||
448 | case 2: | |
449 | if (st & SC01STR_FEF && ch == 0) { | |
450 | port->rx_brk = 3; | |
451 | _proto("Rx Break Detected"); | |
452 | icount->brk++; | |
453 | if (uart_handle_break(&port->uart)) | |
454 | goto ignore_char; | |
455 | status |= 1 << TTY_BREAK; | |
456 | goto insert; | |
457 | } | |
458 | goto not_break; | |
459 | ||
460 | default: | |
461 | if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF)) | |
462 | goto try_again; /* still breaking */ | |
463 | ||
464 | port->rx_brk = 0; /* end of the break */ | |
465 | ||
466 | switch (ch) { | |
467 | case 0xFF: | |
468 | case 0xFE: | |
469 | case 0xFC: | |
470 | case 0xF8: | |
471 | case 0xF0: | |
472 | case 0xE0: | |
473 | case 0xC0: | |
474 | case 0x80: | |
475 | case 0x00: | |
476 | /* discard char at probable break end */ | |
477 | goto try_again; | |
478 | } | |
479 | break; | |
480 | } | |
481 | ||
482 | process_errors: | |
483 | /* handle framing error */ | |
484 | if (st & SC01STR_FEF) { | |
485 | if (ch == 0) { | |
486 | /* framing error with NUL char is probably a BREAK */ | |
487 | port->rx_brk = 1; | |
488 | goto try_again; | |
489 | } | |
490 | ||
491 | _proto("Rx Framing Error"); | |
492 | icount->frame++; | |
493 | status |= 1 << TTY_FRAME; | |
494 | } | |
495 | ||
496 | /* handle parity error */ | |
497 | if (st & SC01STR_PEF) { | |
498 | _proto("Rx Parity Error"); | |
499 | icount->parity++; | |
500 | status = TTY_PARITY; | |
501 | } | |
502 | ||
503 | /* handle normal char */ | |
504 | if (status == 0) { | |
505 | if (uart_handle_sysrq_char(&port->uart, ch)) | |
506 | goto ignore_char; | |
507 | status = (1 << TTY_NORMAL); | |
508 | } | |
509 | ||
510 | /* handle overrun error */ | |
511 | if (st & SC01STR_OEF) { | |
512 | if (port->rx_brk) | |
513 | goto try_again; | |
514 | ||
515 | _proto("Rx Overrun Error"); | |
516 | icount->overrun++; | |
517 | overrun = 1; | |
518 | } | |
519 | ||
520 | insert: | |
521 | status &= port->uart.read_status_mask; | |
522 | ||
523 | if (!overrun && !(status & port->uart.ignore_status_mask)) { | |
524 | int flag; | |
525 | ||
526 | if (status & (1 << TTY_BREAK)) | |
527 | flag = TTY_BREAK; | |
528 | else if (status & (1 << TTY_PARITY)) | |
529 | flag = TTY_PARITY; | |
530 | else if (status & (1 << TTY_FRAME)) | |
531 | flag = TTY_FRAME; | |
532 | else | |
533 | flag = TTY_NORMAL; | |
534 | ||
535 | tty_insert_flip_char(tty, ch, flag); | |
536 | } | |
537 | ||
538 | /* overrun is special, since it's reported immediately, and doesn't | |
539 | * affect the current character | |
540 | */ | |
541 | if (overrun) | |
542 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
543 | ||
544 | count--; | |
545 | if (count <= 0) { | |
546 | if (!tty->low_latency) | |
547 | tty_flip_buffer_push(tty); | |
548 | return; | |
549 | } | |
550 | ||
551 | ignore_char: | |
552 | push = 1; | |
553 | goto try_again; | |
554 | ||
555 | not_break: | |
556 | port->rx_brk = 0; | |
557 | goto process_errors; | |
558 | } | |
559 | ||
560 | /* | |
561 | * handle an interrupt from the serial transmission "virtual DMA" driver | |
562 | * - note: the interrupt routine will disable its own interrupts when the Tx | |
563 | * buffer is empty | |
564 | */ | |
565 | static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port) | |
566 | { | |
567 | _enter("%s", port->name); | |
568 | ||
a8893fb3 AT |
569 | if (!port->uart.info || !port->uart.info->port.tty) { |
570 | mn10300_serial_dis_tx_intr(port); | |
571 | return; | |
572 | } | |
573 | ||
b920de1b DH |
574 | if (uart_tx_stopped(&port->uart) || |
575 | uart_circ_empty(&port->uart.info->xmit)) | |
576 | mn10300_serial_dis_tx_intr(port); | |
577 | ||
578 | if (uart_circ_chars_pending(&port->uart.info->xmit) < WAKEUP_CHARS) | |
579 | uart_write_wakeup(&port->uart); | |
580 | } | |
581 | ||
582 | /* | |
583 | * deal with a change in the status of the CTS line | |
584 | */ | |
585 | static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st) | |
586 | { | |
587 | u16 ctr; | |
588 | ||
589 | port->tx_cts = st; | |
590 | port->uart.icount.cts++; | |
591 | ||
592 | /* flip the CTS state selector flag to interrupt when it changes | |
593 | * back */ | |
594 | ctr = *port->_control; | |
595 | ctr ^= SC2CTR_TWS; | |
596 | *port->_control = ctr; | |
597 | ||
598 | uart_handle_cts_change(&port->uart, st & SC2STR_CTS); | |
599 | wake_up_interruptible(&port->uart.info->delta_msr_wait); | |
600 | } | |
601 | ||
602 | /* | |
603 | * handle a virtual interrupt generated by the lower level "virtual DMA" | |
604 | * routines (irq is the baud timer interrupt) | |
605 | */ | |
606 | static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id) | |
607 | { | |
608 | struct mn10300_serial_port *port = dev_id; | |
609 | u8 st; | |
610 | ||
611 | spin_lock(&port->uart.lock); | |
612 | ||
613 | if (port->intr_flags) { | |
614 | _debug("INT %s: %x", port->name, port->intr_flags); | |
615 | ||
616 | if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL)) | |
617 | mn10300_serial_receive_interrupt(port); | |
618 | ||
619 | if (mask_test_and_clear(&port->intr_flags, | |
620 | MNSCx_TX_SPACE | MNSCx_TX_EMPTY)) | |
621 | mn10300_serial_transmit_interrupt(port); | |
622 | } | |
623 | ||
624 | /* the only modem control line amongst the whole lot is CTS on | |
625 | * serial port 2 */ | |
626 | if (port->type == PORT_MN10300_CTS) { | |
627 | st = *port->_status; | |
628 | if ((port->tx_cts ^ st) & SC2STR_CTS) | |
629 | mn10300_serial_cts_changed(port, st); | |
630 | } | |
631 | ||
632 | spin_unlock(&port->uart.lock); | |
633 | ||
634 | return IRQ_HANDLED; | |
635 | } | |
636 | ||
637 | /* | |
638 | * return indication of whether the hardware transmit buffer is empty | |
639 | */ | |
640 | static unsigned int mn10300_serial_tx_empty(struct uart_port *_port) | |
641 | { | |
642 | struct mn10300_serial_port *port = | |
643 | container_of(_port, struct mn10300_serial_port, uart); | |
644 | ||
645 | _enter("%s", port->name); | |
646 | ||
647 | return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ? | |
648 | 0 : TIOCSER_TEMT; | |
649 | } | |
650 | ||
651 | /* | |
652 | * set the modem control lines (we don't have any) | |
653 | */ | |
654 | static void mn10300_serial_set_mctrl(struct uart_port *_port, | |
655 | unsigned int mctrl) | |
656 | { | |
657 | struct mn10300_serial_port *port = | |
658 | container_of(_port, struct mn10300_serial_port, uart); | |
659 | ||
660 | _enter("%s,%x", port->name, mctrl); | |
661 | } | |
662 | ||
663 | /* | |
664 | * get the modem control line statuses | |
665 | */ | |
666 | static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port) | |
667 | { | |
668 | struct mn10300_serial_port *port = | |
669 | container_of(_port, struct mn10300_serial_port, uart); | |
670 | ||
671 | _enter("%s", port->name); | |
672 | ||
673 | if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS)) | |
674 | return TIOCM_CAR | TIOCM_DSR; | |
675 | ||
676 | return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR; | |
677 | } | |
678 | ||
679 | /* | |
680 | * stop transmitting characters | |
681 | */ | |
682 | static void mn10300_serial_stop_tx(struct uart_port *_port) | |
683 | { | |
684 | struct mn10300_serial_port *port = | |
685 | container_of(_port, struct mn10300_serial_port, uart); | |
686 | ||
687 | _enter("%s", port->name); | |
688 | ||
689 | /* disable the virtual DMA */ | |
690 | mn10300_serial_dis_tx_intr(port); | |
691 | } | |
692 | ||
693 | /* | |
694 | * start transmitting characters | |
695 | * - jump-start transmission if it has stalled | |
696 | * - enable the serial Tx interrupt (used by the virtual DMA controller) | |
697 | * - force an interrupt to happen if necessary | |
698 | */ | |
699 | static void mn10300_serial_start_tx(struct uart_port *_port) | |
700 | { | |
701 | struct mn10300_serial_port *port = | |
702 | container_of(_port, struct mn10300_serial_port, uart); | |
703 | ||
704 | u16 x; | |
705 | ||
706 | _enter("%s{%lu}", | |
707 | port->name, | |
708 | CIRC_CNT(&port->uart.info->xmit.head, | |
709 | &port->uart.info->xmit.tail, | |
710 | UART_XMIT_SIZE)); | |
711 | ||
712 | /* kick the virtual DMA controller */ | |
713 | x = *port->tx_icr; | |
714 | x |= GxICR_ENABLE; | |
715 | ||
716 | if (*port->_status & SC01STR_TBF) | |
717 | x &= ~(GxICR_REQUEST | GxICR_DETECT); | |
718 | else | |
719 | x |= GxICR_REQUEST | GxICR_DETECT; | |
720 | ||
721 | _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx", | |
722 | *port->_control, *port->_intr, *port->_status, | |
723 | *port->_tmxmd, *port->_tmxbr, *port->tx_icr); | |
724 | ||
725 | *port->tx_icr = x; | |
726 | x = *port->tx_icr; | |
727 | } | |
728 | ||
729 | /* | |
730 | * transmit a high-priority XON/XOFF character | |
731 | */ | |
732 | static void mn10300_serial_send_xchar(struct uart_port *_port, char ch) | |
733 | { | |
734 | struct mn10300_serial_port *port = | |
735 | container_of(_port, struct mn10300_serial_port, uart); | |
736 | ||
737 | _enter("%s,%02x", port->name, ch); | |
738 | ||
739 | if (likely(port->gdbstub)) { | |
740 | port->tx_xchar = ch; | |
741 | if (ch) | |
742 | mn10300_serial_en_tx_intr(port); | |
743 | } | |
744 | } | |
745 | ||
746 | /* | |
747 | * stop receiving characters | |
748 | * - called whilst the port is being closed | |
749 | */ | |
750 | static void mn10300_serial_stop_rx(struct uart_port *_port) | |
751 | { | |
752 | struct mn10300_serial_port *port = | |
753 | container_of(_port, struct mn10300_serial_port, uart); | |
754 | ||
755 | u16 ctr; | |
756 | ||
757 | _enter("%s", port->name); | |
758 | ||
759 | ctr = *port->_control; | |
760 | ctr &= ~SC01CTR_RXE; | |
761 | *port->_control = ctr; | |
762 | ||
763 | mn10300_serial_dis_rx_intr(port); | |
764 | } | |
765 | ||
766 | /* | |
767 | * enable modem status interrupts | |
768 | */ | |
769 | static void mn10300_serial_enable_ms(struct uart_port *_port) | |
770 | { | |
771 | struct mn10300_serial_port *port = | |
772 | container_of(_port, struct mn10300_serial_port, uart); | |
773 | ||
774 | u16 ctr, cts; | |
775 | ||
776 | _enter("%s", port->name); | |
777 | ||
778 | if (port->type == PORT_MN10300_CTS) { | |
779 | /* want to interrupt when CTS goes low if CTS is now high and | |
780 | * vice versa | |
781 | */ | |
782 | port->tx_cts = *port->_status; | |
783 | ||
784 | cts = (port->tx_cts & SC2STR_CTS) ? | |
785 | SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS; | |
786 | ||
787 | ctr = *port->_control; | |
788 | ctr &= ~SC2CTR_TWS; | |
789 | ctr |= cts; | |
790 | *port->_control = ctr; | |
791 | ||
792 | mn10300_serial_en_tx_intr(port); | |
793 | } | |
794 | } | |
795 | ||
796 | /* | |
797 | * transmit or cease transmitting a break signal | |
798 | */ | |
799 | static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl) | |
800 | { | |
801 | struct mn10300_serial_port *port = | |
802 | container_of(_port, struct mn10300_serial_port, uart); | |
803 | ||
804 | _enter("%s,%d", port->name, ctl); | |
805 | ||
806 | if (ctl) { | |
807 | /* tell the virtual DMA handler to assert BREAK */ | |
808 | port->tx_break = 1; | |
809 | mn10300_serial_en_tx_intr(port); | |
810 | } else { | |
811 | port->tx_break = 0; | |
812 | *port->_control &= ~SC01CTR_BKE; | |
813 | mn10300_serial_en_tx_intr(port); | |
814 | } | |
815 | } | |
816 | ||
817 | /* | |
818 | * grab the interrupts and enable the port for reception | |
819 | */ | |
820 | static int mn10300_serial_startup(struct uart_port *_port) | |
821 | { | |
822 | struct mn10300_serial_port *port = | |
823 | container_of(_port, struct mn10300_serial_port, uart); | |
824 | struct mn10300_serial_int *pint; | |
825 | ||
826 | _enter("%s{%d}", port->name, port->gdbstub); | |
827 | ||
828 | if (unlikely(port->gdbstub)) | |
829 | return -EBUSY; | |
830 | ||
831 | /* allocate an Rx buffer for the virtual DMA handler */ | |
832 | port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL); | |
833 | if (!port->rx_buffer) | |
834 | return -ENOMEM; | |
835 | ||
836 | port->rx_inp = port->rx_outp = 0; | |
837 | ||
838 | /* finally, enable the device */ | |
839 | *port->_intr = SC01ICR_TI; | |
840 | *port->_control |= SC01CTR_TXE | SC01CTR_RXE; | |
841 | ||
842 | pint = &mn10300_serial_int_tbl[port->rx_irq]; | |
843 | pint->port = port; | |
844 | pint->vdma = mn10300_serial_vdma_rx_handler; | |
845 | pint = &mn10300_serial_int_tbl[port->tx_irq]; | |
846 | pint->port = port; | |
847 | pint->vdma = mn10300_serial_vdma_tx_handler; | |
848 | ||
849 | set_intr_level(port->rx_irq, GxICR_LEVEL_1); | |
850 | set_intr_level(port->tx_irq, GxICR_LEVEL_1); | |
851 | set_irq_chip(port->tm_irq, &mn10300_serial_pic); | |
852 | ||
853 | if (request_irq(port->rx_irq, mn10300_serial_interrupt, | |
854 | IRQF_DISABLED, port->rx_name, port) < 0) | |
855 | goto error; | |
856 | ||
857 | if (request_irq(port->tx_irq, mn10300_serial_interrupt, | |
858 | IRQF_DISABLED, port->tx_name, port) < 0) | |
859 | goto error2; | |
860 | ||
861 | if (request_irq(port->tm_irq, mn10300_serial_interrupt, | |
862 | IRQF_DISABLED, port->tm_name, port) < 0) | |
863 | goto error3; | |
864 | mn10300_serial_mask_ack(port->tm_irq); | |
865 | ||
866 | return 0; | |
867 | ||
868 | error3: | |
869 | free_irq(port->tx_irq, port); | |
870 | error2: | |
871 | free_irq(port->rx_irq, port); | |
872 | error: | |
873 | kfree(port->rx_buffer); | |
874 | port->rx_buffer = NULL; | |
875 | return -EBUSY; | |
876 | } | |
877 | ||
878 | /* | |
879 | * shutdown the port and release interrupts | |
880 | */ | |
881 | static void mn10300_serial_shutdown(struct uart_port *_port) | |
882 | { | |
883 | struct mn10300_serial_port *port = | |
884 | container_of(_port, struct mn10300_serial_port, uart); | |
885 | ||
886 | _enter("%s", port->name); | |
887 | ||
888 | /* disable the serial port and its baud rate timer */ | |
889 | port->tx_break = 0; | |
890 | *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE); | |
891 | *port->_tmxmd = 0; | |
892 | ||
893 | if (port->rx_buffer) { | |
894 | void *buf = port->rx_buffer; | |
895 | port->rx_buffer = NULL; | |
896 | kfree(buf); | |
897 | } | |
898 | ||
899 | /* disable all intrs */ | |
900 | free_irq(port->tm_irq, port); | |
901 | free_irq(port->rx_irq, port); | |
902 | free_irq(port->tx_irq, port); | |
903 | ||
904 | *port->rx_icr = GxICR_LEVEL_1; | |
905 | *port->tx_icr = GxICR_LEVEL_1; | |
906 | } | |
907 | ||
908 | /* | |
909 | * this routine is called to set the UART divisor registers to match the | |
910 | * specified baud rate for a serial port. | |
911 | */ | |
912 | static void mn10300_serial_change_speed(struct mn10300_serial_port *port, | |
913 | struct ktermios *new, | |
914 | struct ktermios *old) | |
915 | { | |
916 | unsigned long flags; | |
917 | unsigned long ioclk = port->ioclk; | |
918 | unsigned cflag; | |
919 | int baud, bits, xdiv, tmp; | |
920 | u16 tmxbr, scxctr; | |
921 | u8 tmxmd, battempt; | |
922 | u8 div_timer = port->div_timer; | |
923 | ||
924 | _enter("%s{%lu}", port->name, ioclk); | |
925 | ||
926 | /* byte size and parity */ | |
927 | cflag = new->c_cflag; | |
928 | switch (cflag & CSIZE) { | |
929 | case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break; | |
930 | case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break; | |
931 | default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break; | |
932 | } | |
933 | ||
934 | if (cflag & CSTOPB) { | |
935 | scxctr |= SC01CTR_STB_2BIT; | |
936 | bits++; | |
937 | } | |
938 | ||
939 | if (cflag & PARENB) { | |
940 | bits++; | |
941 | if (cflag & PARODD) | |
942 | scxctr |= SC01CTR_PB_ODD; | |
943 | #ifdef CMSPAR | |
944 | else if (cflag & CMSPAR) | |
945 | scxctr |= SC01CTR_PB_FIXED0; | |
946 | #endif | |
947 | else | |
948 | scxctr |= SC01CTR_PB_EVEN; | |
949 | } | |
950 | ||
951 | /* Determine divisor based on baud rate */ | |
952 | battempt = 0; | |
953 | ||
954 | if (div_timer == MNSCx_DIV_TIMER_16BIT) | |
955 | scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8 | |
956 | * == SC2CTR_CK_TM10UFLOW) */ | |
957 | else if (div_timer == MNSCx_DIV_TIMER_8BIT) | |
958 | scxctr |= SC0CTR_CK_TM2UFLOW_8; | |
959 | ||
960 | try_alternative: | |
961 | baud = uart_get_baud_rate(&port->uart, new, old, 0, | |
962 | port->ioclk / 8); | |
963 | ||
964 | _debug("ALT %d [baud %d]", battempt, baud); | |
965 | ||
966 | if (!baud) | |
967 | baud = 9600; /* B0 transition handled in rs_set_termios */ | |
968 | xdiv = 1; | |
969 | if (baud == 134) { | |
970 | baud = 269; /* 134 is really 134.5 */ | |
971 | xdiv = 2; | |
972 | } | |
973 | ||
974 | if (baud == 38400 && | |
975 | (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST | |
976 | ) { | |
977 | _debug("CUSTOM %u", port->uart.custom_divisor); | |
978 | ||
979 | if (div_timer == MNSCx_DIV_TIMER_16BIT) { | |
980 | if (port->uart.custom_divisor <= 65535) { | |
981 | tmxmd = TM8MD_SRC_IOCLK; | |
982 | tmxbr = port->uart.custom_divisor; | |
983 | port->uart.uartclk = ioclk; | |
984 | goto timer_okay; | |
985 | } | |
986 | if (port->uart.custom_divisor / 8 <= 65535) { | |
987 | tmxmd = TM8MD_SRC_IOCLK_8; | |
988 | tmxbr = port->uart.custom_divisor / 8; | |
989 | port->uart.custom_divisor = tmxbr * 8; | |
990 | port->uart.uartclk = ioclk / 8; | |
991 | goto timer_okay; | |
992 | } | |
993 | if (port->uart.custom_divisor / 32 <= 65535) { | |
994 | tmxmd = TM8MD_SRC_IOCLK_32; | |
995 | tmxbr = port->uart.custom_divisor / 32; | |
996 | port->uart.custom_divisor = tmxbr * 32; | |
997 | port->uart.uartclk = ioclk / 32; | |
998 | goto timer_okay; | |
999 | } | |
1000 | ||
1001 | } else if (div_timer == MNSCx_DIV_TIMER_8BIT) { | |
1002 | if (port->uart.custom_divisor <= 255) { | |
1003 | tmxmd = TM2MD_SRC_IOCLK; | |
1004 | tmxbr = port->uart.custom_divisor; | |
1005 | port->uart.uartclk = ioclk; | |
1006 | goto timer_okay; | |
1007 | } | |
1008 | if (port->uart.custom_divisor / 8 <= 255) { | |
1009 | tmxmd = TM2MD_SRC_IOCLK_8; | |
1010 | tmxbr = port->uart.custom_divisor / 8; | |
1011 | port->uart.custom_divisor = tmxbr * 8; | |
1012 | port->uart.uartclk = ioclk / 8; | |
1013 | goto timer_okay; | |
1014 | } | |
1015 | if (port->uart.custom_divisor / 32 <= 255) { | |
1016 | tmxmd = TM2MD_SRC_IOCLK_32; | |
1017 | tmxbr = port->uart.custom_divisor / 32; | |
1018 | port->uart.custom_divisor = tmxbr * 32; | |
1019 | port->uart.uartclk = ioclk / 32; | |
1020 | goto timer_okay; | |
1021 | } | |
1022 | } | |
1023 | } | |
1024 | ||
1025 | switch (div_timer) { | |
1026 | case MNSCx_DIV_TIMER_16BIT: | |
1027 | port->uart.uartclk = ioclk; | |
1028 | tmxmd = TM8MD_SRC_IOCLK; | |
1029 | tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1; | |
1030 | if (tmp > 0 && tmp <= 65535) | |
1031 | goto timer_okay; | |
1032 | ||
1033 | port->uart.uartclk = ioclk / 8; | |
1034 | tmxmd = TM8MD_SRC_IOCLK_8; | |
1035 | tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1; | |
1036 | if (tmp > 0 && tmp <= 65535) | |
1037 | goto timer_okay; | |
1038 | ||
1039 | port->uart.uartclk = ioclk / 32; | |
1040 | tmxmd = TM8MD_SRC_IOCLK_32; | |
1041 | tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1; | |
1042 | if (tmp > 0 && tmp <= 65535) | |
1043 | goto timer_okay; | |
1044 | break; | |
1045 | ||
1046 | case MNSCx_DIV_TIMER_8BIT: | |
1047 | port->uart.uartclk = ioclk; | |
1048 | tmxmd = TM2MD_SRC_IOCLK; | |
1049 | tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1; | |
1050 | if (tmp > 0 && tmp <= 255) | |
1051 | goto timer_okay; | |
1052 | ||
1053 | port->uart.uartclk = ioclk / 8; | |
1054 | tmxmd = TM2MD_SRC_IOCLK_8; | |
1055 | tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1; | |
1056 | if (tmp > 0 && tmp <= 255) | |
1057 | goto timer_okay; | |
1058 | ||
1059 | port->uart.uartclk = ioclk / 32; | |
1060 | tmxmd = TM2MD_SRC_IOCLK_32; | |
1061 | tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1; | |
1062 | if (tmp > 0 && tmp <= 255) | |
1063 | goto timer_okay; | |
1064 | break; | |
1065 | ||
1066 | default: | |
1067 | BUG(); | |
1068 | return; | |
1069 | } | |
1070 | ||
1071 | /* refuse to change to a baud rate we can't support */ | |
1072 | _debug("CAN'T SUPPORT"); | |
1073 | ||
1074 | switch (battempt) { | |
1075 | case 0: | |
1076 | if (old) { | |
1077 | new->c_cflag &= ~CBAUD; | |
1078 | new->c_cflag |= (old->c_cflag & CBAUD); | |
1079 | battempt = 1; | |
1080 | goto try_alternative; | |
1081 | } | |
1082 | ||
1083 | case 1: | |
1084 | /* as a last resort, if the quotient is zero, default to 9600 | |
1085 | * bps */ | |
1086 | new->c_cflag &= ~CBAUD; | |
1087 | new->c_cflag |= B9600; | |
1088 | battempt = 2; | |
1089 | goto try_alternative; | |
1090 | ||
1091 | default: | |
1092 | /* hmmm... can't seem to support 9600 either | |
1093 | * - we could try iterating through the speeds we know about to | |
1094 | * find the lowest | |
1095 | */ | |
1096 | new->c_cflag &= ~CBAUD; | |
1097 | new->c_cflag |= B0; | |
1098 | ||
1099 | if (div_timer == MNSCx_DIV_TIMER_16BIT) | |
1100 | tmxmd = TM8MD_SRC_IOCLK_32; | |
1101 | else if (div_timer == MNSCx_DIV_TIMER_8BIT) | |
1102 | tmxmd = TM2MD_SRC_IOCLK_32; | |
1103 | tmxbr = 1; | |
1104 | ||
1105 | port->uart.uartclk = ioclk / 32; | |
1106 | break; | |
1107 | } | |
1108 | timer_okay: | |
1109 | ||
1110 | _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr); | |
1111 | ||
1112 | /* make the changes */ | |
1113 | spin_lock_irqsave(&port->uart.lock, flags); | |
1114 | ||
1115 | uart_update_timeout(&port->uart, new->c_cflag, baud); | |
1116 | ||
1117 | /* set the timer to produce the required baud rate */ | |
1118 | switch (div_timer) { | |
1119 | case MNSCx_DIV_TIMER_16BIT: | |
1120 | *port->_tmxmd = 0; | |
1121 | *port->_tmxbr = tmxbr; | |
1122 | *port->_tmxmd = TM8MD_INIT_COUNTER; | |
1123 | *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE; | |
1124 | break; | |
1125 | ||
1126 | case MNSCx_DIV_TIMER_8BIT: | |
1127 | *port->_tmxmd = 0; | |
1128 | *(volatile u8 *) port->_tmxbr = (u8) tmxbr; | |
1129 | *port->_tmxmd = TM2MD_INIT_COUNTER; | |
1130 | *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE; | |
1131 | break; | |
1132 | } | |
1133 | ||
1134 | /* CTS flow control flag and modem status interrupts */ | |
1135 | scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS); | |
1136 | ||
1137 | if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) { | |
1138 | /* want to interrupt when CTS goes low if CTS is now | |
1139 | * high and vice versa | |
1140 | */ | |
1141 | port->tx_cts = *port->_status; | |
1142 | ||
1143 | if (port->tx_cts & SC2STR_CTS) | |
1144 | scxctr |= SC2CTR_TWE; | |
1145 | else | |
1146 | scxctr |= SC2CTR_TWE | SC2CTR_TWS; | |
1147 | } | |
1148 | ||
1149 | /* set up parity check flag */ | |
1150 | port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN); | |
1151 | if (new->c_iflag & INPCK) | |
1152 | port->uart.read_status_mask |= | |
1153 | (1 << TTY_PARITY) | (1 << TTY_FRAME); | |
1154 | if (new->c_iflag & (BRKINT | PARMRK)) | |
1155 | port->uart.read_status_mask |= (1 << TTY_BREAK); | |
1156 | ||
1157 | /* characters to ignore */ | |
1158 | port->uart.ignore_status_mask = 0; | |
1159 | if (new->c_iflag & IGNPAR) | |
1160 | port->uart.ignore_status_mask |= | |
1161 | (1 << TTY_PARITY) | (1 << TTY_FRAME); | |
1162 | if (new->c_iflag & IGNBRK) { | |
1163 | port->uart.ignore_status_mask |= (1 << TTY_BREAK); | |
1164 | /* | |
1165 | * If we're ignoring parity and break indicators, | |
1166 | * ignore overruns to (for real raw support). | |
1167 | */ | |
1168 | if (new->c_iflag & IGNPAR) | |
1169 | port->uart.ignore_status_mask |= (1 << TTY_OVERRUN); | |
1170 | } | |
1171 | ||
1172 | /* Ignore all characters if CREAD is not set */ | |
1173 | if ((new->c_cflag & CREAD) == 0) | |
1174 | port->uart.ignore_status_mask |= (1 << TTY_NORMAL); | |
1175 | ||
1176 | scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE); | |
1177 | *port->_control = scxctr; | |
1178 | ||
1179 | spin_unlock_irqrestore(&port->uart.lock, flags); | |
1180 | } | |
1181 | ||
1182 | /* | |
1183 | * set the terminal I/O parameters | |
1184 | */ | |
1185 | static void mn10300_serial_set_termios(struct uart_port *_port, | |
1186 | struct ktermios *new, | |
1187 | struct ktermios *old) | |
1188 | { | |
1189 | struct mn10300_serial_port *port = | |
1190 | container_of(_port, struct mn10300_serial_port, uart); | |
1191 | ||
1192 | _enter("%s,%p,%p", port->name, new, old); | |
1193 | ||
1194 | mn10300_serial_change_speed(port, new, old); | |
1195 | ||
1196 | /* handle turning off CRTSCTS */ | |
1197 | if (!(new->c_cflag & CRTSCTS)) { | |
1198 | u16 ctr = *port->_control; | |
1199 | ctr &= ~SC2CTR_TWE; | |
1200 | *port->_control = ctr; | |
1201 | } | |
1202 | } | |
1203 | ||
1204 | /* | |
1205 | * return description of port type | |
1206 | */ | |
1207 | static const char *mn10300_serial_type(struct uart_port *_port) | |
1208 | { | |
1209 | struct mn10300_serial_port *port = | |
1210 | container_of(_port, struct mn10300_serial_port, uart); | |
1211 | ||
1212 | if (port->uart.type == PORT_MN10300_CTS) | |
1213 | return "MN10300 SIF_CTS"; | |
1214 | ||
1215 | return "MN10300 SIF"; | |
1216 | } | |
1217 | ||
1218 | /* | |
1219 | * release I/O and memory regions in use by port | |
1220 | */ | |
1221 | static void mn10300_serial_release_port(struct uart_port *_port) | |
1222 | { | |
1223 | struct mn10300_serial_port *port = | |
1224 | container_of(_port, struct mn10300_serial_port, uart); | |
1225 | ||
1226 | _enter("%s", port->name); | |
1227 | ||
1228 | release_mem_region((unsigned long) port->_iobase, 16); | |
1229 | } | |
1230 | ||
1231 | /* | |
1232 | * request I/O and memory regions for port | |
1233 | */ | |
1234 | static int mn10300_serial_request_port(struct uart_port *_port) | |
1235 | { | |
1236 | struct mn10300_serial_port *port = | |
1237 | container_of(_port, struct mn10300_serial_port, uart); | |
1238 | ||
1239 | _enter("%s", port->name); | |
1240 | ||
1241 | request_mem_region((unsigned long) port->_iobase, 16, port->name); | |
1242 | return 0; | |
1243 | } | |
1244 | ||
1245 | /* | |
1246 | * configure the type and reserve the ports | |
1247 | */ | |
1248 | static void mn10300_serial_config_port(struct uart_port *_port, int type) | |
1249 | { | |
1250 | struct mn10300_serial_port *port = | |
1251 | container_of(_port, struct mn10300_serial_port, uart); | |
1252 | ||
1253 | _enter("%s", port->name); | |
1254 | ||
1255 | port->uart.type = PORT_MN10300; | |
1256 | ||
1257 | if (port->options & MNSCx_OPT_CTS) | |
1258 | port->uart.type = PORT_MN10300_CTS; | |
1259 | ||
1260 | mn10300_serial_request_port(_port); | |
1261 | } | |
1262 | ||
1263 | /* | |
1264 | * verify serial parameters are suitable for this port type | |
1265 | */ | |
1266 | static int mn10300_serial_verify_port(struct uart_port *_port, | |
1267 | struct serial_struct *ss) | |
1268 | { | |
1269 | struct mn10300_serial_port *port = | |
1270 | container_of(_port, struct mn10300_serial_port, uart); | |
1271 | void *mapbase = (void *) (unsigned long) port->uart.mapbase; | |
1272 | ||
1273 | _enter("%s", port->name); | |
1274 | ||
1275 | /* these things may not be changed */ | |
1276 | if (ss->irq != port->uart.irq || | |
1277 | ss->port != port->uart.iobase || | |
1278 | ss->io_type != port->uart.iotype || | |
1279 | ss->iomem_base != mapbase || | |
1280 | ss->iomem_reg_shift != port->uart.regshift || | |
1281 | ss->hub6 != port->uart.hub6 || | |
1282 | ss->xmit_fifo_size != port->uart.fifosize) | |
1283 | return -EINVAL; | |
1284 | ||
1285 | /* type may be changed on a port that supports CTS */ | |
1286 | if (ss->type != port->uart.type) { | |
1287 | if (!(port->options & MNSCx_OPT_CTS)) | |
1288 | return -EINVAL; | |
1289 | ||
1290 | if (ss->type != PORT_MN10300 && | |
1291 | ss->type != PORT_MN10300_CTS) | |
1292 | return -EINVAL; | |
1293 | } | |
1294 | ||
1295 | return 0; | |
1296 | } | |
1297 | ||
1298 | /* | |
1299 | * initialise the MN10300 on-chip UARTs | |
1300 | */ | |
1301 | static int __init mn10300_serial_init(void) | |
1302 | { | |
1303 | struct mn10300_serial_port *port; | |
1304 | int ret, i; | |
1305 | ||
1306 | printk(KERN_INFO "%s version %s (%s)\n", | |
1307 | serial_name, serial_version, serial_revdate); | |
1308 | ||
1309 | #ifdef CONFIG_MN10300_TTYSM2 | |
1310 | SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */ | |
1311 | #endif | |
1312 | ||
1313 | set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt); | |
1314 | ||
1315 | ret = uart_register_driver(&mn10300_serial_driver); | |
1316 | if (!ret) { | |
1317 | for (i = 0 ; i < NR_PORTS ; i++) { | |
1318 | port = mn10300_serial_ports[i]; | |
1319 | if (!port || port->gdbstub) | |
1320 | continue; | |
1321 | ||
1322 | switch (port->clock_src) { | |
1323 | case MNSCx_CLOCK_SRC_IOCLK: | |
1324 | port->ioclk = MN10300_IOCLK; | |
1325 | break; | |
1326 | ||
1327 | #ifdef MN10300_IOBCLK | |
1328 | case MNSCx_CLOCK_SRC_IOBCLK: | |
1329 | port->ioclk = MN10300_IOBCLK; | |
1330 | break; | |
1331 | #endif | |
1332 | default: | |
1333 | BUG(); | |
1334 | } | |
1335 | ||
1336 | ret = uart_add_one_port(&mn10300_serial_driver, | |
1337 | &port->uart); | |
1338 | ||
1339 | if (ret < 0) { | |
1340 | _debug("ERROR %d", -ret); | |
1341 | break; | |
1342 | } | |
1343 | } | |
1344 | ||
1345 | if (ret) | |
1346 | uart_unregister_driver(&mn10300_serial_driver); | |
1347 | } | |
1348 | ||
1349 | return ret; | |
1350 | } | |
1351 | ||
1352 | __initcall(mn10300_serial_init); | |
1353 | ||
1354 | ||
1355 | #ifdef CONFIG_MN10300_TTYSM_CONSOLE | |
1356 | ||
1357 | /* | |
1358 | * print a string to the serial port without disturbing the real user of the | |
1359 | * port too much | |
1360 | * - the console must be locked by the caller | |
1361 | */ | |
1362 | static void mn10300_serial_console_write(struct console *co, | |
1363 | const char *s, unsigned count) | |
1364 | { | |
1365 | struct mn10300_serial_port *port; | |
1366 | unsigned i; | |
1367 | u16 scxctr, txicr, tmp; | |
1368 | u8 tmxmd; | |
1369 | ||
1370 | port = mn10300_serial_ports[co->index]; | |
1371 | ||
1372 | /* firstly hijack the serial port from the "virtual DMA" controller */ | |
1373 | txicr = *port->tx_icr; | |
1374 | *port->tx_icr = GxICR_LEVEL_1; | |
1375 | tmp = *port->tx_icr; | |
1376 | ||
1377 | /* the transmitter may be disabled */ | |
1378 | scxctr = *port->_control; | |
1379 | if (!(scxctr & SC01CTR_TXE)) { | |
1380 | /* restart the UART clock */ | |
1381 | tmxmd = *port->_tmxmd; | |
1382 | ||
1383 | switch (port->div_timer) { | |
1384 | case MNSCx_DIV_TIMER_16BIT: | |
1385 | *port->_tmxmd = 0; | |
1386 | *port->_tmxmd = TM8MD_INIT_COUNTER; | |
1387 | *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE; | |
1388 | break; | |
1389 | ||
1390 | case MNSCx_DIV_TIMER_8BIT: | |
1391 | *port->_tmxmd = 0; | |
1392 | *port->_tmxmd = TM2MD_INIT_COUNTER; | |
1393 | *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE; | |
1394 | break; | |
1395 | } | |
1396 | ||
1397 | /* enable the transmitter */ | |
1398 | *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE; | |
1399 | ||
1400 | } else if (scxctr & SC01CTR_BKE) { | |
1401 | /* stop transmitting BREAK */ | |
1402 | *port->_control = (scxctr & ~SC01CTR_BKE); | |
1403 | } | |
1404 | ||
1405 | /* send the chars into the serial port (with LF -> LFCR conversion) */ | |
1406 | for (i = 0; i < count; i++) { | |
1407 | char ch = *s++; | |
1408 | ||
1409 | while (*port->_status & SC01STR_TBF) | |
1410 | continue; | |
1411 | *(u8 *) port->_txb = ch; | |
1412 | ||
1413 | if (ch == 0x0a) { | |
1414 | while (*port->_status & SC01STR_TBF) | |
1415 | continue; | |
1416 | *(u8 *) port->_txb = 0xd; | |
1417 | } | |
1418 | } | |
1419 | ||
1420 | /* can't let the transmitter be turned off if it's actually | |
1421 | * transmitting */ | |
1422 | while (*port->_status & (SC01STR_TXF | SC01STR_TBF)) | |
1423 | continue; | |
1424 | ||
1425 | /* disable the transmitter if we re-enabled it */ | |
1426 | if (!(scxctr & SC01CTR_TXE)) | |
1427 | *port->_control = scxctr; | |
1428 | ||
1429 | *port->tx_icr = txicr; | |
1430 | tmp = *port->tx_icr; | |
1431 | } | |
1432 | ||
1433 | /* | |
1434 | * set up a serial port as a console | |
1435 | * - construct a cflag setting for the first rs_open() | |
1436 | * - initialize the serial port | |
1437 | * - return non-zero if we didn't find a serial port. | |
1438 | */ | |
1439 | static int __init mn10300_serial_console_setup(struct console *co, | |
1440 | char *options) | |
1441 | { | |
1442 | struct mn10300_serial_port *port; | |
1443 | int i, parity = 'n', baud = 9600, bits = 8, flow = 0; | |
1444 | ||
1445 | for (i = 0 ; i < NR_PORTS ; i++) { | |
1446 | port = mn10300_serial_ports[i]; | |
1447 | if (port && !port->gdbstub && port->uart.line == co->index) | |
1448 | goto found_device; | |
1449 | } | |
1450 | ||
1451 | return -ENODEV; | |
1452 | ||
1453 | found_device: | |
1454 | switch (port->clock_src) { | |
1455 | case MNSCx_CLOCK_SRC_IOCLK: | |
1456 | port->ioclk = MN10300_IOCLK; | |
1457 | break; | |
1458 | ||
1459 | #ifdef MN10300_IOBCLK | |
1460 | case MNSCx_CLOCK_SRC_IOBCLK: | |
1461 | port->ioclk = MN10300_IOBCLK; | |
1462 | break; | |
1463 | #endif | |
1464 | default: | |
1465 | BUG(); | |
1466 | } | |
1467 | ||
1468 | if (options) | |
1469 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1470 | ||
1471 | return uart_set_options(&port->uart, co, baud, parity, bits, flow); | |
1472 | } | |
1473 | ||
1474 | /* | |
1475 | * register console | |
1476 | */ | |
1477 | static int __init mn10300_serial_console_init(void) | |
1478 | { | |
1479 | register_console(&mn10300_serial_console); | |
1480 | return 0; | |
1481 | } | |
1482 | ||
1483 | console_initcall(mn10300_serial_console_init); | |
1484 | #endif |