projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 7eb64c0f HS |
1 | /* |
| 2 | * a4m072 board Device Tree Source | |
| 3 | * | |
| 4 | * Copyright (C) 2011 DENX Software Engineering GmbH | |
| 5 | * Heiko Schocher <hs@denx.de> | |
| 6 | * | |
| 7 | * Copyright (C) 2007 Semihalf | |
| 8 | * Marian Balakowicz <m8@semihalf.com> | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify it | |
| 11 | * under the terms of the GNU General Public License as published by the | |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 13 | * option) any later version. | |
| 14 | */ | |
| 15 | ||
| 16 | /include/ "mpc5200b.dtsi" | |
| 17 | ||
| fa59f178 GL |
18 | &gpt0 { fsl,has-wdt; }; |
| 19 | &gpt3 { gpio-controller; }; | |
| 20 | &gpt4 { gpio-controller; }; | |
| 21 | &gpt5 { gpio-controller; }; | |
| 22 | ||
| 7eb64c0f HS |
23 | / { |
| 24 | model = "anonymous,a4m072"; | |
| 25 | compatible = "anonymous,a4m072"; | |
| 26 | ||
| 27 | soc5200@f0000000 { | |
| 28 | #address-cells = <1>; | |
| 29 | #size-cells = <1>; | |
| 30 | compatible = "fsl,mpc5200b-immr"; | |
| 31 | ranges = <0 0xf0000000 0x0000c000>; | |
| 32 | reg = <0xf0000000 0x00000100>; | |
| 33 | bus-frequency = <0>; /* From boot loader */ | |
| 34 | system-frequency = <0>; /* From boot loader */ | |
| 35 | ||
| 36 | cdm@200 { | |
| 37 | fsl,init-ext-48mhz-en = <0x0>; | |
| 38 | fsl,init-fd-enable = <0x01>; | |
| 39 | fsl,init-fd-counters = <0x3333>; | |
| 40 | }; | |
| 41 | ||
| 7eb64c0f HS |
42 | spi@f00 { |
| 43 | status = "disabled"; | |
| 44 | }; | |
| 45 | ||
| 46 | psc@2000 { | |
| 47 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | |
| 48 | reg = <0x2000 0x100>; | |
| 49 | interrupts = <2 1 0>; | |
| 50 | }; | |
| 51 | ||
| 52 | psc@2200 { | |
| 53 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | |
| 54 | reg = <0x2200 0x100>; | |
| 55 | interrupts = <2 2 0>; | |
| 56 | }; | |
| 57 | ||
| 58 | psc@2400 { | |
| 59 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | |
| 60 | reg = <0x2400 0x100>; | |
| 61 | interrupts = <2 3 0>; | |
| 62 | }; | |
| 63 | ||
| 64 | psc@2600 { | |
| 65 | status = "disabled"; | |
| 66 | }; | |
| 67 | ||
| 68 | psc@2800 { | |
| 69 | status = "disabled"; | |
| 70 | }; | |
| 71 | ||
| 72 | psc@2c00 { | |
| 73 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | |
| 74 | reg = <0x2c00 0x100>; | |
| 75 | interrupts = <2 4 0>; | |
| 76 | }; | |
| 77 | ||
| 78 | ethernet@3000 { | |
| 79 | phy-handle = <&phy0>; | |
| 80 | }; | |
| 81 | ||
| 82 | mdio@3000 { | |
| 83 | phy0: ethernet-phy@1f { | |
| 84 | reg = <0x1f>; | |
| 85 | interrupts = <1 2 0>; /* IRQ 2 active low */ | |
| 86 | }; | |
| 87 | }; | |
| 88 | ||
| 89 | i2c@3d00 { | |
| 90 | status = "disabled"; | |
| 91 | }; | |
| 92 | ||
| 93 | i2c@3d40 { | |
| 94 | hwmon@2e { | |
| 95 | compatible = "nsc,lm87"; | |
| 96 | reg = <0x2e>; | |
| 97 | }; | |
| 98 | rtc@51 { | |
| 99 | compatible = "nxp,rtc8564"; | |
| 100 | reg = <0x51>; | |
| 101 | }; | |
| 102 | }; | |
| 103 | }; | |
| 104 | ||
| 105 | localbus { | |
| 106 | compatible = "fsl,mpc5200b-lpb","simple-bus"; | |
| 107 | #address-cells = <2>; | |
| 108 | #size-cells = <1>; | |
| 109 | ranges = <0 0 0xfe000000 0x02000000 | |
| 110 | 1 0 0x62000000 0x00400000 | |
| 111 | 2 0 0x64000000 0x00200000 | |
| 112 | 3 0 0x66000000 0x01000000 | |
| 113 | 6 0 0x68000000 0x01000000 | |
| 114 | 7 0 0x6a000000 0x00000004>; | |
| 115 | ||
| 116 | flash@0,0 { | |
| 117 | compatible = "cfi-flash"; | |
| 118 | reg = <0 0 0x02000000>; | |
| 119 | bank-width = <2>; | |
| 120 | #size-cells = <1>; | |
| 121 | #address-cells = <1>; | |
| 122 | }; | |
| 123 | sram0@1,0 { | |
| 124 | compatible = "mtd-ram"; | |
| 125 | reg = <1 0x00000 0x00400000>; | |
| 126 | bank-width = <2>; | |
| 127 | }; | |
| 128 | }; | |
| 129 | ||
| 130 | pci@f0000d00 { | |
| 131 | #interrupt-cells = <1>; | |
| 132 | #size-cells = <2>; | |
| 133 | #address-cells = <3>; | |
| 134 | device_type = "pci"; | |
| 135 | compatible = "fsl,mpc5200-pci"; | |
| 136 | reg = <0xf0000d00 0x100>; | |
| 137 | interrupt-map-mask = <0xf800 0 0 7>; | |
| 138 | interrupt-map = < | |
| 139 | /* IDSEL 0x16 */ | |
| 140 | 0xc000 0 0 1 &mpc5200_pic 1 3 3 | |
| 141 | 0xc000 0 0 2 &mpc5200_pic 1 3 3 | |
| 142 | 0xc000 0 0 3 &mpc5200_pic 1 3 3 | |
| 143 | 0xc000 0 0 4 &mpc5200_pic 1 3 3>; | |
| 144 | clock-frequency = <0>; /* From boot loader */ | |
| 145 | interrupts = <2 8 0 2 9 0 2 10 0>; | |
| 146 | bus-range = <0 0>; | |
| 147 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 | |
| 148 | 0x02000000 0 0x90000000 0x90000000 0 0x10000000 | |
| 149 | 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; | |
| 150 | }; | |
| 151 | }; |