projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0c176fa8 | 1 | #ifndef _IO_H |
| c03719ef | 2 | #define _IO_H |
| 6e913c67 SW |
3 | |
| 4 | #include "types.h" | |
| 5 | ||
| 0c176fa8 MG |
6 | /* |
| 7 | * Low-level I/O routines. | |
| 8 | * | |
| b8b572e1 | 9 | * Copied from <file:arch/powerpc/include/asm/io.h> (which has no copyright) |
| 0c176fa8 MG |
10 | */ |
| 11 | static inline int in_8(const volatile unsigned char *addr) | |
| 12 | { | |
| 13 | int ret; | |
| 14 | ||
| 15 | __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync" | |
| 16 | : "=r" (ret) : "m" (*addr)); | |
| 17 | return ret; | |
| 18 | } | |
| 19 | ||
| 20 | static inline void out_8(volatile unsigned char *addr, int val) | |
| 21 | { | |
| 22 | __asm__ __volatile__("stb%U0%X0 %1,%0; sync" | |
| 23 | : "=m" (*addr) : "r" (val)); | |
| 24 | } | |
| 25 | ||
| 6e913c67 SW |
26 | static inline unsigned in_le16(const volatile u16 *addr) |
| 27 | { | |
| 28 | unsigned ret; | |
| 29 | ||
| 30 | __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync" | |
| 31 | : "=r" (ret) : "r" (addr), "m" (*addr)); | |
| 32 | ||
| 33 | return ret; | |
| 34 | } | |
| 35 | ||
| 36 | static inline unsigned in_be16(const volatile u16 *addr) | |
| 37 | { | |
| 38 | unsigned ret; | |
| 39 | ||
| 40 | __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync" | |
| 41 | : "=r" (ret) : "m" (*addr)); | |
| 42 | return ret; | |
| 43 | } | |
| 44 | ||
| 45 | static inline void out_le16(volatile u16 *addr, int val) | |
| 46 | { | |
| 47 | __asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr) | |
| 48 | : "r" (val), "r" (addr)); | |
| 49 | } | |
| 50 | ||
| 51 | static inline void out_be16(volatile u16 *addr, int val) | |
| 52 | { | |
| 53 | __asm__ __volatile__("sth%U0%X0 %1,%0; sync" | |
| 54 | : "=m" (*addr) : "r" (val)); | |
| 55 | } | |
| 56 | ||
| 0c176fa8 MG |
57 | static inline unsigned in_le32(const volatile unsigned *addr) |
| 58 | { | |
| 59 | unsigned ret; | |
| 60 | ||
| 61 | __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync" | |
| 62 | : "=r" (ret) : "r" (addr), "m" (*addr)); | |
| 63 | return ret; | |
| 64 | } | |
| 65 | ||
| 66 | static inline unsigned in_be32(const volatile unsigned *addr) | |
| 67 | { | |
| 68 | unsigned ret; | |
| 69 | ||
| 70 | __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync" | |
| 71 | : "=r" (ret) : "m" (*addr)); | |
| 72 | return ret; | |
| 73 | } | |
| 74 | ||
| 75 | static inline void out_le32(volatile unsigned *addr, int val) | |
| 76 | { | |
| 77 | __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr) | |
| 78 | : "r" (val), "r" (addr)); | |
| 79 | } | |
| 80 | ||
| 81 | static inline void out_be32(volatile unsigned *addr, int val) | |
| 82 | { | |
| 83 | __asm__ __volatile__("stw%U0%X0 %1,%0; sync" | |
| 84 | : "=m" (*addr) : "r" (val)); | |
| 85 | } | |
| 86 | ||
| 6e913c67 SW |
87 | static inline void sync(void) |
| 88 | { | |
| 89 | asm volatile("sync" : : : "memory"); | |
| 90 | } | |
| 91 | ||
| 92 | static inline void eieio(void) | |
| 93 | { | |
| 94 | asm volatile("eieio" : : : "memory"); | |
| 95 | } | |
| 96 | ||
| 97 | static inline void barrier(void) | |
| 98 | { | |
| 99 | asm volatile("" : : : "memory"); | |
| 100 | } | |
| 101 | ||
| 0c176fa8 | 102 | #endif /* _IO_H */ |