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9b1c59e2 SW |
1 | /* |
2 | * This interface is used for compatibility with old U-boots *ONLY*. | |
3 | * Please do not imitate or extend this. | |
4 | */ | |
5 | ||
6 | /* | |
7 | * (C) Copyright 2000, 2001 | |
8 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __PPCBOOT_H__ | |
27 | #define __PPCBOOT_H__ | |
28 | ||
29 | /* | |
30 | * Board information passed to kernel from PPCBoot | |
31 | * | |
32 | * include/asm-ppc/ppcboot.h | |
33 | */ | |
34 | ||
35 | #include "types.h" | |
36 | ||
37 | typedef struct bd_info { | |
38 | unsigned long bi_memstart; /* start of DRAM memory */ | |
39 | unsigned long bi_memsize; /* size of DRAM memory in bytes */ | |
40 | unsigned long bi_flashstart; /* start of FLASH memory */ | |
41 | unsigned long bi_flashsize; /* size of FLASH memory */ | |
42 | unsigned long bi_flashoffset; /* reserved area for startup monitor */ | |
43 | unsigned long bi_sramstart; /* start of SRAM memory */ | |
44 | unsigned long bi_sramsize; /* size of SRAM memory */ | |
45 | #if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\ | |
46 | defined(TARGET_83xx) | |
47 | unsigned long bi_immr_base; /* base of IMMR register */ | |
48 | #endif | |
49 | #if defined(TARGET_PPC_MPC52xx) | |
50 | unsigned long bi_mbar_base; /* base of internal registers */ | |
51 | #endif | |
52 | unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ | |
53 | unsigned long bi_ip_addr; /* IP Address */ | |
54 | unsigned char bi_enetaddr[6]; /* Ethernet address */ | |
55 | unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ | |
56 | unsigned long bi_intfreq; /* Internal Freq, in MHz */ | |
57 | unsigned long bi_busfreq; /* Bus Freq, in MHz */ | |
58 | #if defined(TARGET_CPM2) | |
59 | unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ | |
60 | unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ | |
61 | unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ | |
62 | unsigned long bi_vco; /* VCO Out from PLL, in MHz */ | |
63 | #endif | |
64 | #if defined(TARGET_PPC_MPC52xx) | |
65 | unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ | |
66 | unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ | |
67 | #endif | |
68 | unsigned long bi_baudrate; /* Console Baudrate */ | |
69 | #if defined(TARGET_4xx) | |
70 | unsigned char bi_s_version[4]; /* Version of this structure */ | |
71 | unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */ | |
72 | unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ | |
73 | unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ | |
74 | unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ | |
75 | unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ | |
76 | #endif | |
77 | #if defined(TARGET_HYMOD) | |
78 | hymod_conf_t bi_hymod_conf; /* hymod configuration information */ | |
79 | #endif | |
80 | #if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \ | |
61d3b949 | 81 | defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1) |
9b1c59e2 SW |
82 | /* second onboard ethernet port */ |
83 | unsigned char bi_enet1addr[6]; | |
84 | #define HAVE_ENET1ADDR | |
85 | #endif | |
61d3b949 SW |
86 | #if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \ |
87 | defined(TARGET_85xx) || defined(TARGET_HAS_ETH2) | |
9b1c59e2 SW |
88 | /* third onboard ethernet ports */ |
89 | unsigned char bi_enet2addr[6]; | |
90 | #define HAVE_ENET2ADDR | |
91 | #endif | |
61d3b949 | 92 | #if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3) |
9b1c59e2 SW |
93 | /* fourth onboard ethernet ports */ |
94 | unsigned char bi_enet3addr[6]; | |
95 | #define HAVE_ENET3ADDR | |
96 | #endif | |
97 | #if defined(TARGET_4xx) | |
98 | unsigned int bi_opbfreq; /* OB clock in Hz */ | |
99 | int bi_iic_fast[2]; /* Use fast i2c mode */ | |
100 | #endif | |
101 | #if defined(TARGET_440GX) | |
102 | int bi_phynum[4]; /* phy mapping */ | |
103 | int bi_phymode[4]; /* phy mode */ | |
104 | #endif | |
105 | } bd_t; | |
106 | ||
107 | #define bi_tbfreq bi_intfreq | |
108 | ||
109 | #endif /* __PPCBOOT_H__ */ |