Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
[deliverable/linux.git] / arch / powerpc / include / asm / dma-mapping.h
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1da177e4 1/*
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2 * Copyright (C) 2004 IBM
3 *
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
1da177e4 6 */
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7#ifndef _ASM_DMA_MAPPING_H
8#define _ASM_DMA_MAPPING_H
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9#ifdef __KERNEL__
10
11#include <linux/types.h>
12#include <linux/cache.h>
13/* need struct page definitions */
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
3affedc4 16#include <linux/dma-attrs.h>
46bab4e4 17#include <linux/dma-debug.h>
33ff910f 18#include <asm/io.h>
ec3cf2ec 19#include <asm/swiotlb.h>
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20
21#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
22
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23/* Some dma direct funcs must be visible for use in other dma_ops */
24extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
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25 dma_addr_t *dma_handle, gfp_t flag,
26 struct dma_attrs *attrs);
ec3cf2ec 27extern void dma_direct_free_coherent(struct device *dev, size_t size,
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28 void *vaddr, dma_addr_t dma_handle,
29 struct dma_attrs *attrs);
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30extern int dma_direct_mmap_coherent(struct device *dev,
31 struct vm_area_struct *vma,
32 void *cpu_addr, dma_addr_t handle,
33 size_t size, struct dma_attrs *attrs);
ec3cf2ec 34
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35#ifdef CONFIG_NOT_COHERENT_CACHE
36/*
37 * DMA-consistent mapping functions for PowerPCs that don't support
38 * cache snooping. These allocate/free a region of uncached mapped
39 * memory space for use with DMA devices. Alternatively, you could
40 * allocate the space "normally" and use the cache management functions
41 * to ensure it is consistent.
42 */
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43struct device;
44extern void *__dma_alloc_coherent(struct device *dev, size_t size,
45 dma_addr_t *handle, gfp_t gfp);
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46extern void __dma_free_coherent(size_t size, void *vaddr);
47extern void __dma_sync(void *vaddr, size_t size, int direction);
48extern void __dma_sync_page(struct page *page, unsigned long offset,
49 size_t size, int direction);
6090912c 50extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
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51
52#else /* ! CONFIG_NOT_COHERENT_CACHE */
53/*
54 * Cache coherent cores.
55 */
56
8b31e49d 57#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
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58#define __dma_free_coherent(size, addr) ((void)0)
59#define __dma_sync(addr, size, rw) ((void)0)
60#define __dma_sync_page(pg, off, sz, rw) ((void)0)
61
62#endif /* ! CONFIG_NOT_COHERENT_CACHE */
63
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64static inline unsigned long device_to_mask(struct device *dev)
65{
66 if (dev->dma_mask && *dev->dma_mask)
67 return *dev->dma_mask;
68 /* Assume devices without mask can take 32 bit addresses */
69 return 0xfffffffful;
70}
71
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72/*
73 * Available generic sets of operations
74 */
75#ifdef CONFIG_PPC64
45223c54 76extern struct dma_map_ops dma_iommu_ops;
4fc665b8 77#endif
45223c54 78extern struct dma_map_ops dma_direct_ops;
4fc665b8 79
45223c54 80static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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81{
82 /* We don't handle the NULL dev case for ISA for now. We could
83 * do it via an out of line call but it is not needed for now. The
84 * only ISA DMA device we support is the floppy and we have a hack
85 * in the floppy driver directly to get a device for us.
86 */
4ae0ff60 87 if (unlikely(dev == NULL))
33ff910f 88 return NULL;
4fc665b8 89
33ff910f 90 return dev->archdata.dma_ops;
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91}
92
45223c54 93static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
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94{
95 dev->archdata.dma_ops = ops;
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96}
97
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98/*
99 * get_dma_offset()
100 *
101 * Get the dma offset on configurations where the dma address can be determined
102 * from the physical address by looking at a simple offset. Direct dma and
103 * swiotlb use this function, but it is typically not used by implementations
104 * with an iommu.
105 */
738ef42e 106static inline dma_addr_t get_dma_offset(struct device *dev)
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107{
108 if (dev)
738ef42e 109 return dev->archdata.dma_data.dma_offset;
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110
111 return PCI_DRAM_OFFSET;
112}
113
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114static inline void set_dma_offset(struct device *dev, dma_addr_t off)
115{
116 if (dev)
117 dev->archdata.dma_data.dma_offset = off;
118}
119
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120/* this will be removed soon */
121#define flush_write_buffers()
122
123#include <asm-generic/dma-mapping-common.h>
124
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125static inline int dma_supported(struct device *dev, u64 mask)
126{
45223c54 127 struct dma_map_ops *dma_ops = get_dma_ops(dev);
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128
129 if (unlikely(dma_ops == NULL))
130 return 0;
131 if (dma_ops->dma_supported == NULL)
132 return 1;
133 return dma_ops->dma_supported(dev, mask);
134}
135
5b6e9ff6 136extern int dma_set_mask(struct device *dev, u64 dma_mask);
33ff910f 137
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138#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
139
140static inline void *dma_alloc_attrs(struct device *dev, size_t size,
141 dma_addr_t *dma_handle, gfp_t flag,
142 struct dma_attrs *attrs)
33ff910f 143{
45223c54 144 struct dma_map_ops *dma_ops = get_dma_ops(dev);
80d3e8ab 145 void *cpu_addr;
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146
147 BUG_ON(!dma_ops);
80d3e8ab 148
bfbf7d61 149 cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
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150
151 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
152
153 return cpu_addr;
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154}
155
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156#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
157
158static inline void dma_free_attrs(struct device *dev, size_t size,
159 void *cpu_addr, dma_addr_t dma_handle,
160 struct dma_attrs *attrs)
33ff910f 161{
45223c54 162 struct dma_map_ops *dma_ops = get_dma_ops(dev);
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163
164 BUG_ON(!dma_ops);
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165
166 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
167
bfbf7d61 168 dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
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169}
170
8d8bb39b 171static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
78b09735 172{
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173 struct dma_map_ops *dma_ops = get_dma_ops(dev);
174
34daa88e 175 debug_dma_mapping_error(dev, dma_addr);
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176 if (dma_ops->mapping_error)
177 return dma_ops->mapping_error(dev, dma_addr);
178
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179#ifdef CONFIG_PPC64
180 return (dma_addr == DMA_ERROR_CODE);
181#else
182 return 0;
183#endif
184}
185
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186static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
187{
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188#ifdef CONFIG_SWIOTLB
189 struct dev_archdata *sd = &dev->archdata;
9a937c91 190
762afb73 191 if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
9a937c91 192 return 0;
762afb73 193#endif
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194
195 if (!dev->dma_mask)
196 return 0;
197
ac2b3e67 198 return addr + size - 1 <= *dev->dma_mask;
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199}
200
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201static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
202{
1cebd7a0 203 return paddr + get_dma_offset(dev);
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204}
205
206static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
207{
1cebd7a0 208 return daddr - get_dma_offset(dev);
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209}
210
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211#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
212#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
1da177e4 213
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214#define ARCH_HAS_DMA_MMAP_COHERENT
215
d3fa72e4 216static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
78b09735 217 enum dma_data_direction direction)
1da177e4 218{
78b09735 219 BUG_ON(direction == DMA_NONE);
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220 __dma_sync(vaddr, size, (int)direction);
221}
222
88ced031 223#endif /* __KERNEL__ */
78b09735 224#endif /* _ASM_DMA_MAPPING_H */
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