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powerpc/mm: Merge various PTE bits and accessors definitions
[deliverable/linux.git] / arch / powerpc / include / asm / elf.h
CommitLineData
a99eb2ef
BB		 1#ifndef _ASM_POWERPC_ELF_H
2#define _ASM_POWERPC_ELF_H
1da177e4 3
88ced031 4#ifdef __KERNEL__
8c65b4a6 5#include <linux/sched.h> /* for task_struct */
dd02ec3a
DW		 6#include <asm/page.h>
7#include <asm/string.h>
88ced031
AB		 8#endif
9
812d904e
KG		 10#include <linux/types.h>
11
1da177e4
LT		 12#include <asm/ptrace.h>
13#include <asm/cputable.h>
36d57ac4 14#include <asm/auxvec.h>
1da177e4
LT		 15
16/* PowerPC relocations defined by the ABIs */
17#define R_PPC_NONE 0
18#define R_PPC_ADDR32 1 /* 32bit absolute address */
19#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
20#define R_PPC_ADDR16 3 /* 16bit absolute address */
21#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
22#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
23#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
24#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
25#define R_PPC_ADDR14_BRTAKEN 8
26#define R_PPC_ADDR14_BRNTAKEN 9
27#define R_PPC_REL24 10 /* PC relative 26 bit */
28#define R_PPC_REL14 11 /* PC relative 16 bit */
29#define R_PPC_REL14_BRTAKEN 12
30#define R_PPC_REL14_BRNTAKEN 13
31#define R_PPC_GOT16 14
32#define R_PPC_GOT16_LO 15
33#define R_PPC_GOT16_HI 16
34#define R_PPC_GOT16_HA 17
35#define R_PPC_PLTREL24 18
36#define R_PPC_COPY 19
37#define R_PPC_GLOB_DAT 20
38#define R_PPC_JMP_SLOT 21
39#define R_PPC_RELATIVE 22
40#define R_PPC_LOCAL24PC 23
41#define R_PPC_UADDR32 24
42#define R_PPC_UADDR16 25
43#define R_PPC_REL32 26
44#define R_PPC_PLT32 27
45#define R_PPC_PLTREL32 28
46#define R_PPC_PLT16_LO 29
47#define R_PPC_PLT16_HI 30
48#define R_PPC_PLT16_HA 31
49#define R_PPC_SDAREL16 32
50#define R_PPC_SECTOFF 33
51#define R_PPC_SECTOFF_LO 34
52#define R_PPC_SECTOFF_HI 35
53#define R_PPC_SECTOFF_HA 36
54
55/* PowerPC relocations defined for the TLS access ABI. */
56#define R_PPC_TLS 67 /* none (sym+add)@tls */
57#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */
58#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */
59#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
60#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
61#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
62#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */
63#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */
64#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
65#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
66#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
67#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */
68#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
69#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
70#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
71#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
72#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
73#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
74#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
75#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
76#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */
77#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */
78#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
79#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
80#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */
81#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */
82#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
83#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
84
a99eb2ef 85/* keep this the last entry. */
1da177e4
LT		 86#define R_PPC_NUM 95
87
88/*
89 * ELF register definitions..
90 *
91 * This program is free software; you can redistribute it and/or
92 * modify it under the terms of the GNU General Public License
93 * as published by the Free Software Foundation; either version
94 * 2 of the License, or (at your option) any later version.
95 */
1da177e4
LT		 96
97#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
98#define ELF_NFPREG 33 /* includes fpscr */
1da177e4
LT		 99
100typedef unsigned long elf_greg_t64;
101typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
102
103typedef unsigned int elf_greg_t32;
104typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
5f149cf0 105typedef elf_gregset_t32 compat_elf_gregset_t;
1da177e4
LT		 106
107/*
a99eb2ef 108 * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
1da177e4 109 */
a99eb2ef
BB		 110#ifdef __powerpc64__
111# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
112# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
ce48b210 113# define ELF_NVSRHALFREG 32 /* Half the vsx registers */
a99eb2ef
BB		 114# define ELF_GREG_TYPE elf_greg_t64
115#else
116# define ELF_NEVRREG 34 /* includes acc (as 2) */
117# define ELF_NVRREG 33 /* includes vscr */
118# define ELF_GREG_TYPE elf_greg_t32
119# define ELF_ARCH EM_PPC
120# define ELF_CLASS ELFCLASS32
121# define ELF_DATA ELFDATA2MSB
122#endif /* __powerpc64__ */
123
1da177e4
LT		 124#ifndef ELF_ARCH
125# define ELF_ARCH EM_PPC64
126# define ELF_CLASS ELFCLASS64
127# define ELF_DATA ELFDATA2MSB
128 typedef elf_greg_t64 elf_greg_t;
129 typedef elf_gregset_t64 elf_gregset_t;
1da177e4
LT		 130#else
131 /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
132 typedef elf_greg_t32 elf_greg_t;
133 typedef elf_gregset_t32 elf_gregset_t;
a99eb2ef 134#endif /* ELF_ARCH */
1da177e4 135
a99eb2ef 136/* Floating point registers */
1da177e4
LT		 137typedef double elf_fpreg_t;
138typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
139
140/* Altivec registers */
141/*
142 * The entries with indexes 0-31 contain the corresponding vector registers.
143 * The entry with index 32 contains the vscr as the last word (offset 12)
144 * within the quadword. This allows the vscr to be stored as either a
145 * quadword (since it must be copied via a vector register to/from storage)
a99eb2ef
BB		 146 * or as a word.
147 *
148 * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
1da177e4
LT		 149 * word (offset 0) within the quadword.
150 *
151 * This definition of the VMX state is compatible with the current PPC32
152 * ptrace interface. This allows signal handling and ptrace to use the same
153 * structures. This also simplifies the implementation of a bi-arch
154 * (combined (32- and 64-bit) gdb.
155 *
156 * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
157 * vrsave along with vscr and so only uses 33 vectors for the register set
158 */
159typedef __vector128 elf_vrreg_t;
160typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
a99eb2ef 161#ifdef __powerpc64__
1da177e4 162typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
ce48b210 163typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
a99eb2ef 164#endif
1da177e4 165
dd02ec3a 166#ifdef __KERNEL__
1da177e4
LT		 167/*
168 * This is used to ensure we don't load something for the wrong architecture.
169 */
170#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
01e31dba 171#define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC)
1da177e4
LT		 172
173#define USE_ELF_CORE_DUMP
81970387 174#define CORE_DUMP_USE_REGSET
637a6ff6 175#define ELF_EXEC_PAGESIZE PAGE_SIZE
1da177e4
LT		 176
177/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
178 use of this is to invoke "./ld.so someprog" to test out a new version of
179 the loader. We need to make sure that it is out of the way of the program
180 that it will "exec", and that there is sufficient room for the brk. */
181
501cb16d
AB		 182extern unsigned long randomize_et_dyn(unsigned long base);
183#define ELF_ET_DYN_BASE (randomize_et_dyn(0x20000000))
1da177e4 184
5f149cf0
RM		 185/*
186 * Our registers are always unsigned longs, whether we're a 32 bit
187 * process or 64 bit, on either a 64 bit or 32 bit kernel.
188 *
189 * This macro relies on elf_regs[i] having the right type to truncate to,
190 * either u32 or u64. It defines the body of the elf_core_copy_regs
191 * function, either the native one with elf_gregset_t elf_regs or
192 * the 32-bit one with elf_gregset_t32 elf_regs.
193 */
194#define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \
195 int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \
196 (size_t)ELF_NGREG); \
197 for (i = 0; i < nregs; i++) \
198 elf_regs[i] = ((unsigned long *) regs)[i]; \
199 memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0]))
200
201/* Common routine for both 32-bit and 64-bit native processes */
a99eb2ef 202static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
5f149cf0 203 struct pt_regs *regs)
1da177e4 204{
5f149cf0 205 PPC_ELF_CORE_COPY_REGS(elf_regs, regs);
1da177e4 206}
a99eb2ef 207#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
1da177e4 208
1f7d6668
MN		 209typedef elf_vrregset_t elf_fpxregset_t;
210
a99eb2ef 211/* ELF_HWCAP yields a mask that user programs can use to figure out what
1da177e4
LT		 212 instruction set this cpu supports. This could be done in userspace,
213 but it's not easy, and we've already done it here. */
a99eb2ef 214# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
1da177e4
LT		 215
216/* This yields a string that ld.so will use to load implementation
217 specific libraries for optimization. This is more specific in
80f15dc7 218 intent than poking at uname or /proc/cpuinfo. */
1da177e4 219
80f15dc7 220#define ELF_PLATFORM (cur_cpu_spec->platform)
9115d134
NL		 221
222/* While ELF_PLATFORM indicates the ISA supported by the platform, it
223 * may not accurately reflect the underlying behavior of the hardware
224 * (as in the case of running in Power5+ compatibility mode on a
225 * Power6 machine). ELF_BASE_PLATFORM allows ld.so to load libraries
226 * that are tuned for the real hardware.
227 */
228#define ELF_BASE_PLATFORM (powerpc_base_platform)
1da177e4 229
80f15dc7
PM		 230#ifdef __powerpc64__
231# define ELF_PLAT_INIT(_r, load_addr) do { \
232 _r->gpr[2] = load_addr; \
233} while (0)
234#endif /* __powerpc64__ */
1da177e4 235
a99eb2ef 236#ifdef __powerpc64__
0b592682 237# define SET_PERSONALITY(ex) \
1da177e4
LT		 238do { \
239 unsigned long new_flags = 0; \
240 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
241 new_flags = _TIF_32BIT; \
242 if ((current_thread_info()->flags & _TIF_32BIT) \
243 != new_flags) \
244 set_thread_flag(TIF_ABI_PENDING); \
245 else \
246 clear_thread_flag(TIF_ABI_PENDING); \
ce10d979 247 if (personality(current->personality) != PER_LINUX32) \
a91a03ee
EM		 248 set_personality(PER_LINUX | \
249 (current->personality & (~PER_MASK))); \
1da177e4 250} while (0)
1da177e4
LT		 251/*
252 * An executable for which elf_read_implies_exec() returns TRUE will
a2f95a5a
AB		 253 * have the READ_IMPLIES_EXEC personality flag set automatically. This
254 * is only required to work around bugs in old 32bit toolchains. Since
255 * the 64bit ABI has never had these issues dont enable the workaround
256 * even if we have an executable stack.
1da177e4 257 */
a99eb2ef 258# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
a2f95a5a 259 (exec_stk != EXSTACK_DISABLE_X) : 0)
a99eb2ef 260#else
0b592682 261# define SET_PERSONALITY(ex) set_personality(PER_LINUX)
a99eb2ef 262#endif /* __powerpc64__ */
1da177e4 263
1da177e4
LT		 264extern int dcache_bsize;
265extern int icache_bsize;
266extern int ucache_bsize;
267
a7f290da
BH		 268/* vDSO has arch_setup_additional_pages */
269#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
1da177e4 270struct linux_binprm;
a7f290da 271extern int arch_setup_additional_pages(struct linux_binprm *bprm,
fc5243d9 272 int uses_interp);
a99eb2ef 273#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
1da177e4 274
2dadb987
AB		 275/* 1GB for 64bit, 8MB for 32bit */
276#define STACK_RND_MASK (is_32bit_task() ? \
277 (0x7ff >> (PAGE_SHIFT - 12)) : \
278 (0x3ffff >> (PAGE_SHIFT - 12)))
279
912f9ee2
AB		 280extern unsigned long arch_randomize_brk(struct mm_struct *mm);
281#define arch_randomize_brk arch_randomize_brk
282
178f8d78
AB		 283#endif /* __KERNEL__ */
284
1da177e4
LT		 285/*
286 * The requirements here are:
287 * - keep the final alignment of sp (sp & 0xf)
288 * - make sure the 32-bit value at the first 16 byte aligned position of
289 * AUXV is greater than 16 for glibc compatibility.
290 * AT_IGNOREPPC is used for that.
291 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
292 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
4f9a58d7 293 * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
1da177e4
LT		 294 */
295#define ARCH_DLINFO \
296do { \
297 /* Handle glibc compatibility. */ \
298 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
299 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
300 /* Cache size items */ \
301 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
302 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
303 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
a5bba930 304 VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base) \
a99eb2ef 305} while (0)
1da177e4
LT		 306
307/* PowerPC64 relocations defined by the ABIs */
308#define R_PPC64_NONE R_PPC_NONE
309#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
310#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */
311#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */
312#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */
313#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
314#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */
315#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */
316#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN
317#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
318#define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */
319#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */
320#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
321#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN
322#define R_PPC64_GOT16 R_PPC_GOT16
323#define R_PPC64_GOT16_LO R_PPC_GOT16_LO
324#define R_PPC64_GOT16_HI R_PPC_GOT16_HI
325#define R_PPC64_GOT16_HA R_PPC_GOT16_HA
326
327#define R_PPC64_COPY R_PPC_COPY
328#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT
329#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT
330#define R_PPC64_RELATIVE R_PPC_RELATIVE
331
332#define R_PPC64_UADDR32 R_PPC_UADDR32
333#define R_PPC64_UADDR16 R_PPC_UADDR16
334#define R_PPC64_REL32 R_PPC_REL32
335#define R_PPC64_PLT32 R_PPC_PLT32
336#define R_PPC64_PLTREL32 R_PPC_PLTREL32
337#define R_PPC64_PLT16_LO R_PPC_PLT16_LO
338#define R_PPC64_PLT16_HI R_PPC_PLT16_HI
339#define R_PPC64_PLT16_HA R_PPC_PLT16_HA
340
341#define R_PPC64_SECTOFF R_PPC_SECTOFF
342#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO
343#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI
344#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA
345#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */
346#define R_PPC64_ADDR64 38 /* doubleword64 S + A. */
347#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */
348#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */
349#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */
350#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */
351#define R_PPC64_UADDR64 43 /* doubleword64 S + A. */
352#define R_PPC64_REL64 44 /* doubleword64 S + A - P. */
353#define R_PPC64_PLT64 45 /* doubleword64 L + A. */
354#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */
355#define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */
356#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */
357#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */
358#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */
359#define R_PPC64_TOC 51 /* doubleword64 .TOC. */
360#define R_PPC64_PLTGOT16 52 /* half16* M + A. */
361#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */
362#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */
363#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */
364
365#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */
366#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */
367#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */
368#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */
369#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */
370#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */
371#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */
372#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */
373#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */
374#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */
375#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */
376
377/* PowerPC64 relocations defined for the TLS access ABI. */
378#define R_PPC64_TLS 67 /* none (sym+add)@tls */
379#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */
380#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */
381#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
382#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
383#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
384#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */
385#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */
386#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
387#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
388#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
389#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */
390#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
391#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
392#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
393#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
394#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
395#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
396#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
397#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
398#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */
399#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
400#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
401#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
402#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
403#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
404#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */
405#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
406#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */
407#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */
408#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */
409#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */
410#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */
411#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */
412#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
413#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */
414#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */
415#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */
416#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */
417#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
418
419/* Keep this the last entry. */
420#define R_PPC64_NUM 107
421
2d291e90
JB		 422/* There's actually a third entry here, but it's unused */
423struct ppc64_opd_entry
424{
425 unsigned long funcaddr;
426 unsigned long r2;
427};
428
178f8d78
AB		 429#ifdef __KERNEL__
430
e055595d 431#ifdef CONFIG_SPU_BASE
bf1ab978
DGM		 432/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
433#define NT_SPU 1
434
bf1ab978 435#define ARCH_HAVE_EXTRA_ELF_NOTES
e5501492
ME		 436
437#endif /* CONFIG_SPU_BASE */
bf1ab978 438
178f8d78
AB		 439#endif /* __KERNEL */
440
a99eb2ef 441#endif /* _ASM_POWERPC_ELF_H */
Linux kernel - Deliverables
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