KVM: PPC: Book3S HV: Align physical and virtual CPU thread numbers
[deliverable/linux.git] / arch / powerpc / include / asm / kvm_host.h
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
20#ifndef __POWERPC_KVM_HOST_H__
21#define __POWERPC_KVM_HOST_H__
22
23#include <linux/mutex.h>
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24#include <linux/hrtimer.h>
25#include <linux/interrupt.h>
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26#include <linux/types.h>
27#include <linux/kvm_types.h>
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28#include <linux/threads.h>
29#include <linux/spinlock.h>
96bc451a 30#include <linux/kvm_para.h>
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31#include <linux/list.h>
32#include <linux/atomic.h>
bbf45ba5 33#include <asm/kvm_asm.h>
371fefd6 34#include <asm/processor.h>
342d3db7 35#include <asm/page.h>
249ba1ee 36#include <asm/cacheflush.h>
bbf45ba5 37
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38#define KVM_MAX_VCPUS NR_CPUS
39#define KVM_MAX_VCORES NR_CPUS
bbacc0c1 40#define KVM_USER_MEM_SLOTS 32
0743247f 41#define KVM_MEM_SLOTS_NUM KVM_USER_MEM_SLOTS
bbf45ba5 42
de56a948 43#ifdef CONFIG_KVM_MMIO
588968b6 44#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
de56a948 45#endif
588968b6 46
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47/* These values are internal and can be increased later */
48#define KVM_NR_IRQCHIPS 1
49#define KVM_IRQCHIP_NUM_PINS 256
50
9b0cb3c8 51#if !defined(CONFIG_KVM_440)
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52#include <linux/mmu_notifier.h>
53
54#define KVM_ARCH_WANT_MMU_NOTIFIER
55
56struct kvm;
57extern int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
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58extern int kvm_unmap_hva_range(struct kvm *kvm,
59 unsigned long start, unsigned long end);
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60extern int kvm_age_hva(struct kvm *kvm, unsigned long hva);
61extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
62extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
63
64#endif
65
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66#define HPTEG_CACHE_NUM (1 << 15)
67#define HPTEG_HASH_BITS_PTE 13
2d27fc5e 68#define HPTEG_HASH_BITS_PTE_LONG 12
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69#define HPTEG_HASH_BITS_VPTE 13
70#define HPTEG_HASH_BITS_VPTE_LONG 5
a4a0f252 71#define HPTEG_HASH_BITS_VPTE_64K 11
fef093be 72#define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE)
2d27fc5e 73#define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG)
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74#define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE)
75#define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG)
a4a0f252 76#define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K)
ca95150b 77
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78/* Physical Address Mask - allowed range of real mode RAM access */
79#define KVM_PAM 0x0fffffffffffffffULL
80
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81struct kvm;
82struct kvm_run;
83struct kvm_vcpu;
84
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85struct lppaca;
86struct slb_shadow;
2e25aa5f 87struct dtl_entry;
a8606e20 88
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89struct kvmppc_vcpu_book3s;
90struct kvmppc_book3s_shadow_vcpu;
91
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92struct kvm_vm_stat {
93 u32 remote_tlb_flush;
94};
95
96struct kvm_vcpu_stat {
97 u32 sum_exits;
98 u32 mmio_exits;
99 u32 dcr_exits;
100 u32 signal_exits;
101 u32 light_exits;
102 /* Account for special types of light exits: */
103 u32 itlb_real_miss_exits;
104 u32 itlb_virt_miss_exits;
105 u32 dtlb_real_miss_exits;
106 u32 dtlb_virt_miss_exits;
107 u32 syscall_exits;
108 u32 isi_exits;
109 u32 dsi_exits;
110 u32 emulated_inst_exits;
111 u32 dec_exits;
112 u32 ext_intr_exits;
45c5eb67 113 u32 halt_wakeup;
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114 u32 dbell_exits;
115 u32 gdbell_exits;
00c3a37c 116#ifdef CONFIG_PPC_BOOK3S
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117 u32 pf_storage;
118 u32 pf_instruc;
119 u32 sp_storage;
120 u32 sp_instruc;
121 u32 queue_intr;
122 u32 ld;
123 u32 ld_slow;
124 u32 st;
125 u32 st_slow;
126#endif
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127};
128
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129enum kvm_exit_types {
130 MMIO_EXITS,
131 DCR_EXITS,
132 SIGNAL_EXITS,
133 ITLB_REAL_MISS_EXITS,
134 ITLB_VIRT_MISS_EXITS,
135 DTLB_REAL_MISS_EXITS,
136 DTLB_VIRT_MISS_EXITS,
137 SYSCALL_EXITS,
138 ISI_EXITS,
139 DSI_EXITS,
140 EMULATED_INST_EXITS,
141 EMULATED_MTMSRWE_EXITS,
142 EMULATED_WRTEE_EXITS,
143 EMULATED_MTSPR_EXITS,
144 EMULATED_MFSPR_EXITS,
145 EMULATED_MTMSR_EXITS,
146 EMULATED_MFMSR_EXITS,
147 EMULATED_TLBSX_EXITS,
148 EMULATED_TLBWE_EXITS,
149 EMULATED_RFI_EXITS,
d30f6e48 150 EMULATED_RFCI_EXITS,
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151 DEC_EXITS,
152 EXT_INTR_EXITS,
153 HALT_WAKEUP,
154 USR_PR_INST,
155 FP_UNAVAIL,
156 DEBUG_EXITS,
157 TIMEINGUEST,
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158 DBELL_EXITS,
159 GDBELL_EXITS,
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160 __NUMBER_OF_KVM_EXIT_TYPES
161};
162
73e75b41 163/* allow access to big endian 32bit upper/lower parts and 64bit var */
7b701591 164struct kvmppc_exit_timing {
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165 union {
166 u64 tv64;
167 struct {
168 u32 tbu, tbl;
169 } tv32;
170 };
171};
73e75b41 172
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173struct kvmppc_pginfo {
174 unsigned long pfn;
175 atomic_t refcnt;
176};
177
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178struct kvmppc_spapr_tce_table {
179 struct list_head list;
180 struct kvm *kvm;
181 u64 liobn;
182 u32 window_size;
183 struct page *pages[0];
184};
185
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186struct kvm_rma_info {
187 atomic_t use_count;
188 unsigned long base_pfn;
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189};
190
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191/* XICS components, defined in book3s_xics.c */
192struct kvmppc_xics;
193struct kvmppc_icp;
194
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195/*
196 * The reverse mapping array has one entry for each HPTE,
197 * which stores the guest's view of the second word of the HPTE
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198 * (including the guest physical address of the mapping),
199 * plus forward and backward pointers in a doubly-linked ring
200 * of HPTEs that map the same host page. The pointers in this
201 * ring are 32-bit HPTE indexes, to save space.
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202 */
203struct revmap_entry {
204 unsigned long guest_rpte;
06ce2c63 205 unsigned int forw, back;
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206};
207
06ce2c63 208/*
a66b48c3 209 * We use the top bit of each memslot->arch.rmap entry as a lock bit,
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210 * and bit 32 as a present flag. The bottom 32 bits are the
211 * index in the guest HPT of a HPTE that points to the page.
212 */
213#define KVMPPC_RMAP_LOCK_BIT 63
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214#define KVMPPC_RMAP_RC_SHIFT 32
215#define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
216#define KVMPPC_RMAP_CHANGED (HPTE_R_C << KVMPPC_RMAP_RC_SHIFT)
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217#define KVMPPC_RMAP_PRESENT 0x100000000ul
218#define KVMPPC_RMAP_INDEX 0xfffffffful
219
a66b48c3 220/* Low-order bits in memslot->arch.slot_phys[] */
da9d1d7f 221#define KVMPPC_PAGE_ORDER_MASK 0x1f
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222#define KVMPPC_PAGE_NO_CACHE HPTE_R_I /* 0x20 */
223#define KVMPPC_PAGE_WRITETHRU HPTE_R_W /* 0x40 */
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224#define KVMPPC_GOT_PAGE 0x80
225
db3fe4eb 226struct kvm_arch_memory_slot {
9975f5e3 227#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
d89cc617 228 unsigned long *rmap;
a66b48c3 229 unsigned long *slot_phys;
9975f5e3 230#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
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231};
232
bbf45ba5 233struct kvm_arch {
d30f6e48 234 unsigned int lpid;
9975f5e3 235#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948 236 unsigned long hpt_virt;
8936dda4 237 struct revmap_entry *revmap;
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238 unsigned int host_lpid;
239 unsigned long host_lpcr;
240 unsigned long sdr1;
241 unsigned long host_sdr1;
242 int tlbie_lock;
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243 unsigned long lpcr;
244 unsigned long rmor;
6c45b810 245 struct kvm_rma_info *rma;
697d3899 246 unsigned long vrma_slb_v;
c77162de 247 int rma_setup_done;
342d3db7 248 int using_mmu_notifiers;
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249 u32 hpt_order;
250 atomic_t vcpus_running;
1b400ba0 251 u32 online_vcores;
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252 unsigned long hpt_npte;
253 unsigned long hpt_mask;
44e5f6be 254 atomic_t hpte_mod_interest;
c77162de 255 spinlock_t slot_phys_lock;
1b400ba0 256 cpumask_t need_tlb_flush;
371fefd6 257 struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
fa61a4e3 258 int hpt_cma_alloc;
9975f5e3 259#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
7aa79938 260#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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261 struct mutex hpt_mutex;
262#endif
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263#ifdef CONFIG_PPC_BOOK3S_64
264 struct list_head spapr_tce_tables;
8e591cb7 265 struct list_head rtas_tokens;
f31e65e1 266#endif
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267#ifdef CONFIG_KVM_MPIC
268 struct openpic *mpic;
269#endif
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270#ifdef CONFIG_KVM_XICS
271 struct kvmppc_xics *xics;
272#endif
cbbc58d4 273 struct kvmppc_ops *kvm_ops;
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274};
275
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276/*
277 * Struct for a virtual core.
278 * Note: entry_exit_count combines an entry count in the bottom 8 bits
279 * and an exit count in the next 8 bits. This is so that we can
280 * atomically increment the entry count iff the exit count is 0
281 * without taking the lock.
282 */
283struct kvmppc_vcore {
284 int n_runnable;
19ccb76a 285 int n_busy;
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286 int num_threads;
287 int entry_exit_count;
288 int n_woken;
289 int nap_count;
19ccb76a 290 int napping_threads;
e0b7ec05 291 int first_vcpuid;
371fefd6 292 u16 pcpu;
1b400ba0 293 u16 last_cpu;
19ccb76a 294 u8 vcore_state;
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295 u8 in_guest;
296 struct list_head runnable_threads;
297 spinlock_t lock;
19ccb76a 298 wait_queue_head_t wq;
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299 u64 stolen_tb;
300 u64 preempt_tb;
301 struct kvm_vcpu *runner;
e0b7ec05 302 struct kvm *kvm;
93b0f4dc 303 u64 tb_offset; /* guest timebase - host timebase */
a0144e2a 304 ulong lpcr;
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305 u32 arch_compat;
306 ulong pcr;
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307};
308
309#define VCORE_ENTRY_COUNT(vc) ((vc)->entry_exit_count & 0xff)
310#define VCORE_EXIT_COUNT(vc) ((vc)->entry_exit_count >> 8)
311
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312/* Values for vcore_state */
313#define VCORE_INACTIVE 0
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314#define VCORE_SLEEPING 1
315#define VCORE_STARTING 2
316#define VCORE_RUNNING 3
317#define VCORE_EXITING 4
19ccb76a 318
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319/*
320 * Struct used to manage memory for a virtual processor area
321 * registered by a PAPR guest. There are three types of area
322 * that a guest can register.
323 */
324struct kvmppc_vpa {
c35635ef 325 unsigned long gpa; /* Current guest phys addr */
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326 void *pinned_addr; /* Address in kernel linear mapping */
327 void *pinned_end; /* End of region */
328 unsigned long next_gpa; /* Guest phys addr for update */
329 unsigned long len; /* Number of bytes required */
330 u8 update_pending; /* 1 => update pinned_addr from next_gpa */
c35635ef 331 bool dirty; /* true => area has been modified by kernel */
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332};
333
ca95150b 334struct kvmppc_pte {
af7b4d10 335 ulong eaddr;
ca95150b 336 u64 vpage;
af7b4d10 337 ulong raddr;
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338 bool may_read : 1;
339 bool may_write : 1;
340 bool may_execute : 1;
a4a0f252 341 u8 page_size; /* MMU_PAGE_xxx */
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342};
343
344struct kvmppc_mmu {
345 /* book3s_64 only */
346 void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
347 u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
348 u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
349 void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
350 void (*slbia)(struct kvm_vcpu *vcpu);
351 /* book3s */
352 void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
353 u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
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354 int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
355 struct kvmppc_pte *pte, bool data, bool iswrite);
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356 void (*reset_msr)(struct kvm_vcpu *vcpu);
357 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
af7b4d10 358 int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
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359 u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
360 bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
361};
362
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363struct kvmppc_slb {
364 u64 esid;
365 u64 vsid;
366 u64 orige;
367 u64 origv;
368 bool valid : 1;
369 bool Ks : 1;
370 bool Kp : 1;
371 bool nx : 1;
372 bool large : 1; /* PTEs are 16MB */
373 bool tb : 1; /* 1TB segment */
374 bool class : 1;
a4a0f252 375 u8 base_page_size; /* MMU_PAGE_xxx */
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376};
377
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378# ifdef CONFIG_PPC_FSL_BOOK3E
379#define KVMPPC_BOOKE_IAC_NUM 2
380#define KVMPPC_BOOKE_DAC_NUM 2
381# else
382#define KVMPPC_BOOKE_IAC_NUM 4
383#define KVMPPC_BOOKE_DAC_NUM 2
384# endif
385#define KVMPPC_BOOKE_MAX_IAC 4
386#define KVMPPC_BOOKE_MAX_DAC 2
387
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388/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
389#define KVMPPC_EPR_NONE 0 /* EPR not supported */
390#define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */
391#define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */
392
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393#define KVMPPC_IRQ_DEFAULT 0
394#define KVMPPC_IRQ_MPIC 1
bc5ad3f3 395#define KVMPPC_IRQ_XICS 2
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396
397struct openpic;
398
bbf45ba5 399struct kvm_vcpu_arch {
ca95150b 400 ulong host_stack;
bbf45ba5 401 u32 host_pid;
00c3a37c 402#ifdef CONFIG_PPC_BOOK3S
c4befc58 403 struct kvmppc_slb slb[64];
de56a948 404 int slb_max; /* 1 + index of last valid entry in slb[] */
c4befc58 405 int slb_nr; /* total number of entries in SLB */
ca95150b 406 struct kvmppc_mmu mmu;
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407 struct kvmppc_vcpu_book3s *book3s;
408#endif
409#ifdef CONFIG_PPC_BOOK3S_32
410 struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
ca95150b 411#endif
bbf45ba5 412
5cf8ca22 413 ulong gpr[32];
bbf45ba5 414
efff1912 415 struct thread_fp_state fp;
180a34d2 416
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417#ifdef CONFIG_SPE
418 ulong evr[32];
419 ulong spefscr;
420 ulong host_spefscr;
421 u64 acc;
422#endif
180a34d2 423#ifdef CONFIG_ALTIVEC
efff1912 424 struct thread_vr_state vr;
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425#endif
426
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427#ifdef CONFIG_KVM_BOOKE_HV
428 u32 host_mas4;
429 u32 host_mas6;
430 u32 shadow_epcr;
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431 u32 shadow_msrp;
432 u32 eplc;
433 u32 epsc;
434 u32 oldpir;
435#endif
436
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437#if defined(CONFIG_BOOKE)
438#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
439 u32 epcr;
440#endif
441#endif
442
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443#ifdef CONFIG_PPC_BOOK3S
444 /* For Gekko paired singles */
445 u32 qpr[32];
446#endif
447
5cf8ca22 448 ulong pc;
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449 ulong ctr;
450 ulong lr;
7e57cba0 451
5cf8ca22 452 ulong xer;
7e57cba0 453 u32 cr;
bbf45ba5 454
00c3a37c 455#ifdef CONFIG_PPC_BOOK3S
ca95150b 456 ulong hflags;
180a34d2 457 ulong guest_owned_ext;
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458 ulong purr;
459 ulong spurr;
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460 ulong dscr;
461 ulong amr;
462 ulong uamor;
463 u32 ctrl;
464 ulong dabr;
0acb9111 465 ulong cfar;
4b8473c9 466 ulong ppr;
a2d56020 467 ulong shadow_srr1;
ca95150b 468#endif
eab17672 469 u32 vrsave; /* also USPRG0 */
bbf45ba5 470 u32 mmucr;
5fd8505e 471 /* shadow_msr is unused for BookE HV */
ecee273f 472 ulong shadow_msr;
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473 ulong csrr0;
474 ulong csrr1;
475 ulong dsrr0;
476 ulong dsrr1;
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477 ulong mcsrr0;
478 ulong mcsrr1;
479 ulong mcsr;
bbf45ba5 480 u32 dec;
21bd000a 481#ifdef CONFIG_BOOKE
bbf45ba5 482 u32 decar;
21bd000a 483#endif
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484 u32 tbl;
485 u32 tbu;
486 u32 tcr;
dfd4d47e 487 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
bb3a8a17 488 u32 ivor[64];
5cf8ca22 489 ulong ivpr;
ca95150b 490 u32 pvr;
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491
492 u32 shadow_pid;
dd9ebf1f 493 u32 shadow_pid1;
bbf45ba5 494 u32 pid;
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495 u32 swap_pid;
496
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497 u32 ccr0;
498 u32 ccr1;
f7b200af 499 u32 dbsr;
bbf45ba5 500
de56a948 501 u64 mmcr[3];
9e368f29 502 u32 pmc[8];
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503 u64 siar;
504 u64 sdar;
de56a948 505
73e75b41 506#ifdef CONFIG_KVM_EXIT_TIMING
09000adb 507 struct mutex exit_timing_lock;
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508 struct kvmppc_exit_timing timing_exit;
509 struct kvmppc_exit_timing timing_last_enter;
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510 u32 last_exit_type;
511 u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
512 u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
513 u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
514 u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
515 u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
516 u64 timing_last_exit;
517 struct dentry *debugfs_exit_timing;
518#endif
519
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520#ifdef CONFIG_PPC_BOOK3S
521 ulong fault_dar;
522 u32 fault_dsisr;
523#endif
524
0604675f 525#ifdef CONFIG_BOOKE
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526 ulong fault_dear;
527 ulong fault_esr;
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528 ulong queued_dear;
529 ulong queued_esr;
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530 spinlock_t wdt_lock;
531 struct timer_list wdt_timer;
8fdd21a2 532 u32 tlbcfg[4];
307d9008 533 u32 tlbps[4];
8fdd21a2 534 u32 mmucfg;
9a6061d7 535 u32 eptcfg;
d30f6e48 536 u32 epr;
15b708be 537 u32 crit_save;
ce11e48b 538 /* guest debug registers*/
547465ef 539 struct debug_reg dbg_reg;
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540 /* hardware visible debug registers when in guest state */
541 struct debug_reg shadow_dbg_reg;
0604675f 542#endif
bbf45ba5 543 gpa_t paddr_accessed;
6020c0f6 544 gva_t vaddr_accessed;
08c9a188 545 pgd_t *pgdir;
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546
547 u8 io_gpr; /* GPR used as IO source/target */
548 u8 mmio_is_bigendian;
3587d534 549 u8 mmio_sign_extend;
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550 u8 dcr_needed;
551 u8 dcr_is_write;
ad0a048b
AG
552 u8 osi_needed;
553 u8 osi_enabled;
9432ba60 554 u8 papr_enabled;
f61c94bb 555 u8 watchdog_enabled;
af8f38b3
AG
556 u8 sane;
557 u8 cpu_type;
de56a948 558 u8 hcall_needed;
5df554ad 559 u8 epr_flags; /* KVMPPC_EPR_xxx */
1c810636 560 u8 epr_needed;
bbf45ba5
HB
561
562 u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
563
544c6761
AG
564 struct hrtimer dec_timer;
565 struct tasklet_struct tasklet;
ca95150b 566 u64 dec_jiffies;
de56a948 567 u64 dec_expires;
bbf45ba5 568 unsigned long pending_exceptions;
a8606e20
PM
569 u8 ceded;
570 u8 prodded;
de56a948 571 u32 last_inst;
a8606e20 572
19ccb76a 573 wait_queue_head_t *wqp;
371fefd6
PM
574 struct kvmppc_vcore *vcore;
575 int ret;
de56a948 576 int trap;
371fefd6
PM
577 int state;
578 int ptid;
19ccb76a 579 bool timer_running;
371fefd6
PM
580 wait_queue_head_t cpu_run;
581
96bc451a 582 struct kvm_vcpu_arch_shared *shared;
beb03f14
AG
583 unsigned long magic_page_pa; /* phys addr to map the magic page to */
584 unsigned long magic_page_ea; /* effect. addr to map the magic page to */
de56a948 585
eb1e4f43
SW
586 int irq_type; /* one of KVM_IRQ_* */
587 int irq_cpu_id;
588 struct openpic *mpic; /* KVM_IRQ_MPIC */
bc5ad3f3
BH
589#ifdef CONFIG_KVM_XICS
590 struct kvmppc_icp *icp; /* XICS presentation controller */
591#endif
eb1e4f43 592
9975f5e3 593#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948 594 struct kvm_vcpu_arch_shared shregs;
371fefd6 595
697d3899
PM
596 unsigned long pgfault_addr;
597 long pgfault_index;
598 unsigned long pgfault_hpte[2];
599
371fefd6
PM
600 struct list_head run_list;
601 struct task_struct *run_task;
602 struct kvm_run *kvm_run;
2e25aa5f
PM
603
604 spinlock_t vpa_update_lock;
605 struct kvmppc_vpa vpa;
606 struct kvmppc_vpa dtl;
607 struct dtl_entry *dtl_ptr;
608 unsigned long dtl_index;
0456ec4f 609 u64 stolen_logged;
2e25aa5f 610 struct kvmppc_vpa slb_shadow;
c7b67670
PM
611
612 spinlock_t tbacct_lock;
613 u64 busy_stolen;
614 u64 busy_preempt;
de56a948 615#endif
bbf45ba5
HB
616};
617
efff1912
PM
618#define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
619
19ccb76a 620/* Values for vcpu->arch.state */
8455d79e
PM
621#define KVMPPC_VCPU_NOTREADY 0
622#define KVMPPC_VCPU_RUNNABLE 1
c7b67670 623#define KVMPPC_VCPU_BUSY_IN_HOST 2
371fefd6 624
b3c5d3c2
AG
625/* Values for vcpu->arch.io_gpr */
626#define KVM_MMIO_REG_MASK 0x001f
627#define KVM_MMIO_REG_EXT_MASK 0xffe0
628#define KVM_MMIO_REG_GPR 0x0000
629#define KVM_MMIO_REG_FPR 0x0020
630#define KVM_MMIO_REG_QPR 0x0040
631#define KVM_MMIO_REG_FQPR 0x0060
632
2246f8b5 633#define __KVM_HAVE_ARCH_WQP
5df554ad 634#define __KVM_HAVE_CREATE_DEVICE
b6d33834 635
bbf45ba5 636#endif /* __POWERPC_KVM_HOST_H__ */
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