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f88df14b DG |
1 | #ifndef _ASM_POWERPC_PGTABLE_PPC64_H_ |
2 | #define _ASM_POWERPC_PGTABLE_PPC64_H_ | |
3 | /* | |
4 | * This file contains the functions and defines necessary to modify and use | |
5 | * the ppc64 hashed page table. | |
6 | */ | |
7 | ||
f88df14b | 8 | #ifdef CONFIG_PPC_64K_PAGES |
c605782b | 9 | #include <asm/pgtable-ppc64-64k.h> |
f88df14b | 10 | #else |
c605782b | 11 | #include <asm/pgtable-ppc64-4k.h> |
f88df14b | 12 | #endif |
074c2eae | 13 | #include <asm/barrier.h> |
f88df14b DG |
14 | |
15 | #define FIRST_USER_ADDRESS 0 | |
16 | ||
17 | /* | |
18 | * Size of EA range mapped by our pagetables. | |
19 | */ | |
20 | #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \ | |
21 | PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) | |
3d5134ee | 22 | #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) |
f88df14b | 23 | |
f940f528 AK |
24 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
25 | #define PMD_CACHE_INDEX (PMD_INDEX_SIZE + 1) | |
26 | #else | |
27 | #define PMD_CACHE_INDEX PMD_INDEX_SIZE | |
28 | #endif | |
f88df14b | 29 | /* |
57e2a99f | 30 | * Define the address range of the kernel non-linear virtual area |
f88df14b | 31 | */ |
57e2a99f BH |
32 | |
33 | #ifdef CONFIG_PPC_BOOK3E | |
34 | #define KERN_VIRT_START ASM_CONST(0x8000000000000000) | |
35 | #else | |
36 | #define KERN_VIRT_START ASM_CONST(0xD000000000000000) | |
37 | #endif | |
67550080 | 38 | #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) |
f88df14b DG |
39 | |
40 | /* | |
57e2a99f BH |
41 | * The vmalloc space starts at the beginning of that region, and |
42 | * occupies half of it on hash CPUs and a quarter of it on Book3E | |
32a74949 | 43 | * (we keep a quarter for the virtual memmap) |
57e2a99f BH |
44 | */ |
45 | #define VMALLOC_START KERN_VIRT_START | |
46 | #ifdef CONFIG_PPC_BOOK3E | |
47 | #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2) | |
48 | #else | |
49 | #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) | |
50 | #endif | |
51 | #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) | |
52 | ||
53 | /* | |
54 | * The second half of the kernel virtual space is used for IO mappings, | |
55 | * it's itself carved into the PIO region (ISA and PHB IO space) and | |
56 | * the ioremap space | |
3d5134ee | 57 | * |
57e2a99f | 58 | * ISA_IO_BASE = KERN_IO_START, 64K reserved area |
3d5134ee BH |
59 | * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces |
60 | * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE | |
f88df14b | 61 | */ |
57e2a99f | 62 | #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1)) |
3d5134ee | 63 | #define FULL_IO_SIZE 0x80000000ul |
57e2a99f BH |
64 | #define ISA_IO_BASE (KERN_IO_START) |
65 | #define ISA_IO_END (KERN_IO_START + 0x10000ul) | |
3d5134ee | 66 | #define PHB_IO_BASE (ISA_IO_END) |
57e2a99f | 67 | #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE) |
3d5134ee | 68 | #define IOREMAP_BASE (PHB_IO_END) |
57e2a99f BH |
69 | #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE) |
70 | ||
f88df14b DG |
71 | |
72 | /* | |
73 | * Region IDs | |
74 | */ | |
75 | #define REGION_SHIFT 60UL | |
76 | #define REGION_MASK (0xfUL << REGION_SHIFT) | |
77 | #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) | |
78 | ||
79 | #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START)) | |
80 | #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET)) | |
32a74949 | 81 | #define VMEMMAP_REGION_ID (0xfUL) /* Server only */ |
f88df14b DG |
82 | #define USER_REGION_ID (0UL) |
83 | ||
d29eff7b | 84 | /* |
57e2a99f BH |
85 | * Defines the address of the vmemap area, in its own region on |
86 | * hash table CPUs and after the vmalloc space on Book3E | |
d29eff7b | 87 | */ |
57e2a99f BH |
88 | #ifdef CONFIG_PPC_BOOK3E |
89 | #define VMEMMAP_BASE VMALLOC_END | |
90 | #define VMEMMAP_END KERN_IO_START | |
91 | #else | |
cec08e7a | 92 | #define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT) |
57e2a99f | 93 | #endif |
cec08e7a BH |
94 | #define vmemmap ((struct page *)VMEMMAP_BASE) |
95 | ||
d29eff7b | 96 | |
f88df14b | 97 | /* |
c605782b | 98 | * Include the PTE bits definitions |
f88df14b | 99 | */ |
57e2a99f | 100 | #ifdef CONFIG_PPC_BOOK3S |
c605782b | 101 | #include <asm/pte-hash64.h> |
57e2a99f BH |
102 | #else |
103 | #include <asm/pte-book3e.h> | |
104 | #endif | |
71087002 | 105 | #include <asm/pte-common.h> |
c605782b | 106 | |
94ee815c | 107 | #ifdef CONFIG_PPC_MM_SLICES |
f88df14b DG |
108 | #define HAVE_ARCH_UNMAPPED_AREA |
109 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | |
94ee815c | 110 | #endif /* CONFIG_PPC_MM_SLICES */ |
f88df14b DG |
111 | |
112 | #ifndef __ASSEMBLY__ | |
113 | ||
c605782b BH |
114 | /* |
115 | * This is the default implementation of various PTE accessors, it's | |
116 | * used in all cases except Book3S with 64K pages where we have a | |
117 | * concept of sub-pages | |
118 | */ | |
119 | #ifndef __real_pte | |
120 | ||
121 | #ifdef STRICT_MM_TYPECHECKS | |
122 | #define __real_pte(e,p) ((real_pte_t){(e)}) | |
123 | #define __rpte_to_pte(r) ((r).pte) | |
124 | #else | |
125 | #define __real_pte(e,p) (e) | |
126 | #define __rpte_to_pte(r) (__pte(r)) | |
127 | #endif | |
128 | #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12) | |
129 | ||
130 | #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ | |
131 | do { \ | |
132 | index = 0; \ | |
133 | shift = mmu_psize_defs[psize].shift; \ | |
134 | ||
135 | #define pte_iterate_hashed_end() } while(0) | |
136 | ||
137 | #ifdef CONFIG_PPC_HAS_HASH_64K | |
138 | #define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr) | |
139 | #else | |
140 | #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K | |
141 | #endif | |
142 | ||
143 | #endif /* __real_pte */ | |
144 | ||
145 | ||
f88df14b DG |
146 | /* pte_clear moved to later in this file */ |
147 | ||
f88df14b DG |
148 | #define PMD_BAD_BITS (PTE_TABLE_SIZE-1) |
149 | #define PUD_BAD_BITS (PMD_TABLE_SIZE-1) | |
150 | ||
151 | #define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval)) | |
152 | #define pmd_none(pmd) (!pmd_val(pmd)) | |
153 | #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \ | |
154 | || (pmd_val(pmd) & PMD_BAD_BITS)) | |
06743521 | 155 | #define pmd_present(pmd) (!pmd_none(pmd)) |
f88df14b DG |
156 | #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0) |
157 | #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS) | |
074c2eae | 158 | extern struct page *pmd_page(pmd_t pmd); |
f88df14b DG |
159 | |
160 | #define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval)) | |
161 | #define pud_none(pud) (!pud_val(pud)) | |
162 | #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \ | |
163 | || (pud_val(pud) & PUD_BAD_BITS)) | |
164 | #define pud_present(pud) (pud_val(pud) != 0) | |
165 | #define pud_clear(pudp) (pud_val(*(pudp)) = 0) | |
166 | #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS) | |
f88df14b | 167 | |
06743521 AK |
168 | extern struct page *pud_page(pud_t pud); |
169 | ||
170 | static inline pte_t pud_pte(pud_t pud) | |
171 | { | |
172 | return __pte(pud_val(pud)); | |
173 | } | |
174 | ||
175 | static inline pud_t pte_pud(pte_t pte) | |
176 | { | |
177 | return __pud(pte_val(pte)); | |
178 | } | |
179 | #define pud_write(pud) pte_write(pud_pte(pud)) | |
f88df14b | 180 | #define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);}) |
06743521 | 181 | #define pgd_write(pgd) pte_write(pgd_pte(pgd)) |
f88df14b DG |
182 | |
183 | /* | |
184 | * Find an entry in a page-table-directory. We combine the address region | |
185 | * (the high order N bits) and the pgd portion of the address. | |
186 | */ | |
0e5f35d0 | 187 | #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1)) |
f88df14b DG |
188 | |
189 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) | |
190 | ||
191 | #define pmd_offset(pudp,addr) \ | |
192 | (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) | |
193 | ||
194 | #define pte_offset_kernel(dir,addr) \ | |
195 | (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) | |
196 | ||
197 | #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr)) | |
f88df14b | 198 | #define pte_unmap(pte) do { } while(0) |
f88df14b DG |
199 | |
200 | /* to find an entry in a kernel page-table-directory */ | |
201 | /* This now only contains the vmalloc pages */ | |
202 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | |
78f1dbde AK |
203 | extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr, |
204 | pte_t *ptep, unsigned long pte, int huge); | |
f88df14b DG |
205 | |
206 | /* Atomic PTE updates */ | |
207 | static inline unsigned long pte_update(struct mm_struct *mm, | |
208 | unsigned long addr, | |
209 | pte_t *ptep, unsigned long clr, | |
88247e8d | 210 | unsigned long set, |
f88df14b DG |
211 | int huge) |
212 | { | |
a033a487 | 213 | #ifdef PTE_ATOMIC_UPDATES |
f88df14b DG |
214 | unsigned long old, tmp; |
215 | ||
216 | __asm__ __volatile__( | |
217 | "1: ldarx %0,0,%3 # pte_update\n\ | |
218 | andi. %1,%0,%6\n\ | |
219 | bne- 1b \n\ | |
220 | andc %1,%0,%4 \n\ | |
88247e8d | 221 | or %1,%1,%7\n\ |
f88df14b DG |
222 | stdcx. %1,0,%3 \n\ |
223 | bne- 1b" | |
224 | : "=&r" (old), "=&r" (tmp), "=m" (*ptep) | |
88247e8d | 225 | : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set) |
f88df14b | 226 | : "cc" ); |
a033a487 BH |
227 | #else |
228 | unsigned long old = pte_val(*ptep); | |
88247e8d | 229 | *ptep = __pte((old & ~clr) | set); |
a033a487 | 230 | #endif |
8d30c14c BH |
231 | /* huge pages use the old page table lock */ |
232 | if (!huge) | |
233 | assert_pte_locked(mm, addr); | |
234 | ||
94491685 | 235 | #ifdef CONFIG_PPC_STD_MMU_64 |
f88df14b DG |
236 | if (old & _PAGE_HASHPTE) |
237 | hpte_need_flush(mm, addr, ptep, old, huge); | |
94491685 BH |
238 | #endif |
239 | ||
f88df14b DG |
240 | return old; |
241 | } | |
242 | ||
243 | static inline int __ptep_test_and_clear_young(struct mm_struct *mm, | |
244 | unsigned long addr, pte_t *ptep) | |
245 | { | |
246 | unsigned long old; | |
247 | ||
88247e8d | 248 | if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) |
f88df14b | 249 | return 0; |
88247e8d | 250 | old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0); |
f88df14b DG |
251 | return (old & _PAGE_ACCESSED) != 0; |
252 | } | |
253 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
254 | #define ptep_test_and_clear_young(__vma, __addr, __ptep) \ | |
255 | ({ \ | |
256 | int __r; \ | |
257 | __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \ | |
258 | __r; \ | |
259 | }) | |
260 | ||
f88df14b DG |
261 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT |
262 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, | |
263 | pte_t *ptep) | |
264 | { | |
f88df14b | 265 | |
2a2c29c1 SP |
266 | if ((pte_val(*ptep) & _PAGE_RW) == 0) |
267 | return; | |
268 | ||
88247e8d | 269 | pte_update(mm, addr, ptep, _PAGE_RW, 0, 0); |
f88df14b DG |
270 | } |
271 | ||
016b33c4 AW |
272 | static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, |
273 | unsigned long addr, pte_t *ptep) | |
274 | { | |
86df8642 DG |
275 | if ((pte_val(*ptep) & _PAGE_RW) == 0) |
276 | return; | |
2a2c29c1 | 277 | |
88247e8d | 278 | pte_update(mm, addr, ptep, _PAGE_RW, 0, 1); |
016b33c4 | 279 | } |
f88df14b DG |
280 | |
281 | /* | |
282 | * We currently remove entries from the hashtable regardless of whether | |
283 | * the entry was young or dirty. The generic routines only flush if the | |
284 | * entry was young or dirty which is not good enough. | |
285 | * | |
286 | * We should be more intelligent about this but for the moment we override | |
287 | * these functions and force a tlb flush unconditionally | |
288 | */ | |
289 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
290 | #define ptep_clear_flush_young(__vma, __address, __ptep) \ | |
291 | ({ \ | |
292 | int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \ | |
293 | __ptep); \ | |
294 | __young; \ | |
295 | }) | |
296 | ||
f88df14b DG |
297 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR |
298 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, | |
299 | unsigned long addr, pte_t *ptep) | |
300 | { | |
88247e8d | 301 | unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0); |
f88df14b DG |
302 | return __pte(old); |
303 | } | |
304 | ||
305 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, | |
306 | pte_t * ptep) | |
307 | { | |
88247e8d | 308 | pte_update(mm, addr, ptep, ~0UL, 0, 0); |
f88df14b DG |
309 | } |
310 | ||
f88df14b DG |
311 | |
312 | /* Set the dirty and/or accessed bits atomically in a linux PTE, this | |
313 | * function doesn't need to flush the hash entry | |
314 | */ | |
8d30c14c | 315 | static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry) |
f88df14b DG |
316 | { |
317 | unsigned long bits = pte_val(entry) & | |
ea3cc330 | 318 | (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); |
a033a487 BH |
319 | |
320 | #ifdef PTE_ATOMIC_UPDATES | |
f88df14b DG |
321 | unsigned long old, tmp; |
322 | ||
323 | __asm__ __volatile__( | |
324 | "1: ldarx %0,0,%4\n\ | |
325 | andi. %1,%0,%6\n\ | |
326 | bne- 1b \n\ | |
327 | or %0,%3,%0\n\ | |
328 | stdcx. %0,0,%4\n\ | |
329 | bne- 1b" | |
330 | :"=&r" (old), "=&r" (tmp), "=m" (*ptep) | |
331 | :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY) | |
332 | :"cc"); | |
a033a487 BH |
333 | #else |
334 | unsigned long old = pte_val(*ptep); | |
335 | *ptep = __pte(old | bits); | |
336 | #endif | |
f88df14b | 337 | } |
f88df14b | 338 | |
f88df14b DG |
339 | #define __HAVE_ARCH_PTE_SAME |
340 | #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) | |
341 | ||
342 | #define pte_ERROR(e) \ | |
a7696b36 | 343 | pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) |
f88df14b | 344 | #define pmd_ERROR(e) \ |
a7696b36 | 345 | pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) |
f88df14b | 346 | #define pgd_ERROR(e) \ |
a7696b36 | 347 | pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) |
f88df14b | 348 | |
f88df14b DG |
349 | /* Encode and de-code a swap entry */ |
350 | #define __swp_type(entry) (((entry).val >> 1) & 0x3f) | |
351 | #define __swp_offset(entry) ((entry).val >> 8) | |
352 | #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)}) | |
353 | #define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT}) | |
354 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT }) | |
355 | #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT) | |
356 | #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE}) | |
357 | #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT) | |
358 | ||
a0668cdc | 359 | void pgtable_cache_add(unsigned shift, void (*ctor)(void *)); |
f88df14b | 360 | void pgtable_cache_init(void); |
f88df14b DG |
361 | #endif /* __ASSEMBLY__ */ |
362 | ||
074c2eae AK |
363 | /* |
364 | * THP pages can't be special. So use the _PAGE_SPECIAL | |
365 | */ | |
366 | #define _PAGE_SPLITTING _PAGE_SPECIAL | |
367 | ||
368 | /* | |
369 | * We need to differentiate between explicit huge page and THP huge | |
370 | * page, since THP huge page also need to track real subpage details | |
371 | */ | |
372 | #define _PAGE_THP_HUGE _PAGE_4K_PFN | |
373 | ||
374 | /* | |
375 | * set of bits not changed in pmd_modify. | |
376 | */ | |
377 | #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | \ | |
378 | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPLITTING | \ | |
379 | _PAGE_THP_HUGE) | |
380 | ||
381 | #ifndef __ASSEMBLY__ | |
382 | /* | |
383 | * The linux hugepage PMD now include the pmd entries followed by the address | |
384 | * to the stashed pgtable_t. The stashed pgtable_t contains the hpte bits. | |
385 | * [ 1 bit secondary | 3 bit hidx | 1 bit valid | 000]. We use one byte per | |
386 | * each HPTE entry. With 16MB hugepage and 64K HPTE we need 256 entries and | |
387 | * with 4K HPTE we need 4096 entries. Both will fit in a 4K pgtable_t. | |
388 | * | |
389 | * The last three bits are intentionally left to zero. This memory location | |
390 | * are also used as normal page PTE pointers. So if we have any pointers | |
391 | * left around while we collapse a hugepage, we need to make sure | |
392 | * _PAGE_PRESENT and _PAGE_FILE bits of that are zero when we look at them | |
393 | */ | |
394 | static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index) | |
395 | { | |
396 | return (hpte_slot_array[index] >> 3) & 0x1; | |
397 | } | |
398 | ||
399 | static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array, | |
400 | int index) | |
401 | { | |
402 | return hpte_slot_array[index] >> 4; | |
403 | } | |
404 | ||
405 | static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array, | |
406 | unsigned int index, unsigned int hidx) | |
407 | { | |
408 | hpte_slot_array[index] = hidx << 4 | 0x1 << 3; | |
409 | } | |
410 | ||
8e0861fa AK |
411 | struct page *realmode_pfn_to_page(unsigned long pfn); |
412 | ||
074c2eae AK |
413 | static inline char *get_hpte_slot_array(pmd_t *pmdp) |
414 | { | |
415 | /* | |
416 | * The hpte hindex is stored in the pgtable whose address is in the | |
417 | * second half of the PMD | |
418 | * | |
419 | * Order this load with the test for pmd_trans_huge in the caller | |
420 | */ | |
421 | smp_rmb(); | |
422 | return *(char **)(pmdp + PTRS_PER_PMD); | |
423 | ||
424 | ||
425 | } | |
426 | ||
427 | extern void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr, | |
fc047955 | 428 | pmd_t *pmdp, unsigned long old_pmd); |
074c2eae AK |
429 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
430 | extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot); | |
431 | extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot); | |
432 | extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot); | |
433 | extern void set_pmd_at(struct mm_struct *mm, unsigned long addr, | |
434 | pmd_t *pmdp, pmd_t pmd); | |
435 | extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr, | |
436 | pmd_t *pmd); | |
06743521 AK |
437 | /* |
438 | * | |
439 | * For core kernel code by design pmd_trans_huge is never run on any hugetlbfs | |
440 | * page. The hugetlbfs page table walking and mangling paths are totally | |
441 | * separated form the core VM paths and they're differentiated by | |
442 | * VM_HUGETLB being set on vm_flags well before any pmd_trans_huge could run. | |
443 | * | |
444 | * pmd_trans_huge() is defined as false at build time if | |
445 | * CONFIG_TRANSPARENT_HUGEPAGE=n to optimize away code blocks at build | |
446 | * time in such case. | |
447 | * | |
448 | * For ppc64 we need to differntiate from explicit hugepages from THP, because | |
449 | * for THP we also track the subpage details at the pmd level. We don't do | |
450 | * that for explicit huge pages. | |
451 | * | |
452 | */ | |
074c2eae AK |
453 | static inline int pmd_trans_huge(pmd_t pmd) |
454 | { | |
455 | /* | |
456 | * leaf pte for huge page, bottom two bits != 00 | |
457 | */ | |
458 | return (pmd_val(pmd) & 0x3) && (pmd_val(pmd) & _PAGE_THP_HUGE); | |
459 | } | |
460 | ||
074c2eae AK |
461 | static inline int pmd_trans_splitting(pmd_t pmd) |
462 | { | |
463 | if (pmd_trans_huge(pmd)) | |
464 | return pmd_val(pmd) & _PAGE_SPLITTING; | |
465 | return 0; | |
466 | } | |
467 | ||
437d4964 | 468 | extern int has_transparent_hugepage(void); |
074c2eae AK |
469 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
470 | ||
06743521 AK |
471 | static inline int pmd_large(pmd_t pmd) |
472 | { | |
473 | /* | |
474 | * leaf pte for huge page, bottom two bits != 00 | |
475 | */ | |
476 | return ((pmd_val(pmd) & 0x3) != 0x0); | |
477 | } | |
478 | ||
074c2eae AK |
479 | static inline pte_t pmd_pte(pmd_t pmd) |
480 | { | |
481 | return __pte(pmd_val(pmd)); | |
482 | } | |
483 | ||
484 | static inline pmd_t pte_pmd(pte_t pte) | |
485 | { | |
486 | return __pmd(pte_val(pte)); | |
487 | } | |
488 | ||
489 | static inline pte_t *pmdp_ptep(pmd_t *pmd) | |
490 | { | |
491 | return (pte_t *)pmd; | |
492 | } | |
493 | ||
494 | #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd)) | |
495 | #define pmd_young(pmd) pte_young(pmd_pte(pmd)) | |
496 | #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd))) | |
497 | #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd))) | |
498 | #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd))) | |
499 | #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd))) | |
500 | #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd))) | |
501 | ||
502 | #define __HAVE_ARCH_PMD_WRITE | |
503 | #define pmd_write(pmd) pte_write(pmd_pte(pmd)) | |
504 | ||
505 | static inline pmd_t pmd_mkhuge(pmd_t pmd) | |
506 | { | |
507 | /* Do nothing, mk_pmd() does this part. */ | |
508 | return pmd; | |
509 | } | |
510 | ||
511 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | |
512 | { | |
513 | pmd_val(pmd) &= ~_PAGE_PRESENT; | |
514 | return pmd; | |
515 | } | |
516 | ||
517 | static inline pmd_t pmd_mksplitting(pmd_t pmd) | |
518 | { | |
519 | pmd_val(pmd) |= _PAGE_SPLITTING; | |
520 | return pmd; | |
521 | } | |
522 | ||
523 | #define __HAVE_ARCH_PMD_SAME | |
524 | static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) | |
525 | { | |
526 | return (((pmd_val(pmd_a) ^ pmd_val(pmd_b)) & ~_PAGE_HPTEFLAGS) == 0); | |
527 | } | |
528 | ||
529 | #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
530 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
531 | unsigned long address, pmd_t *pmdp, | |
532 | pmd_t entry, int dirty); | |
533 | ||
534 | extern unsigned long pmd_hugepage_update(struct mm_struct *mm, | |
535 | unsigned long addr, | |
88247e8d AK |
536 | pmd_t *pmdp, |
537 | unsigned long clr, | |
538 | unsigned long set); | |
074c2eae AK |
539 | |
540 | static inline int __pmdp_test_and_clear_young(struct mm_struct *mm, | |
541 | unsigned long addr, pmd_t *pmdp) | |
542 | { | |
543 | unsigned long old; | |
544 | ||
545 | if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) | |
546 | return 0; | |
88247e8d | 547 | old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0); |
074c2eae AK |
548 | return ((old & _PAGE_ACCESSED) != 0); |
549 | } | |
550 | ||
551 | #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
552 | extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
553 | unsigned long address, pmd_t *pmdp); | |
554 | #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
555 | extern int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
556 | unsigned long address, pmd_t *pmdp); | |
557 | ||
558 | #define __HAVE_ARCH_PMDP_GET_AND_CLEAR | |
559 | extern pmd_t pmdp_get_and_clear(struct mm_struct *mm, | |
560 | unsigned long addr, pmd_t *pmdp); | |
561 | ||
562 | #define __HAVE_ARCH_PMDP_CLEAR_FLUSH | |
563 | extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address, | |
564 | pmd_t *pmdp); | |
565 | ||
566 | #define __HAVE_ARCH_PMDP_SET_WRPROTECT | |
567 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr, | |
568 | pmd_t *pmdp) | |
569 | { | |
570 | ||
571 | if ((pmd_val(*pmdp) & _PAGE_RW) == 0) | |
572 | return; | |
573 | ||
88247e8d | 574 | pmd_hugepage_update(mm, addr, pmdp, _PAGE_RW, 0); |
074c2eae AK |
575 | } |
576 | ||
577 | #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH | |
578 | extern void pmdp_splitting_flush(struct vm_area_struct *vma, | |
579 | unsigned long address, pmd_t *pmdp); | |
580 | ||
581 | #define __HAVE_ARCH_PGTABLE_DEPOSIT | |
582 | extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, | |
583 | pgtable_t pgtable); | |
584 | #define __HAVE_ARCH_PGTABLE_WITHDRAW | |
585 | extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); | |
586 | ||
587 | #define __HAVE_ARCH_PMDP_INVALIDATE | |
588 | extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, | |
589 | pmd_t *pmdp); | |
b3084f4d AK |
590 | |
591 | #define pmd_move_must_withdraw pmd_move_must_withdraw | |
fd120dc2 LZ |
592 | struct spinlock; |
593 | static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl, | |
594 | struct spinlock *old_pmd_ptl) | |
b3084f4d AK |
595 | { |
596 | /* | |
597 | * Archs like ppc64 use pgtable to store per pmd | |
598 | * specific information. So when we switch the pmd, | |
599 | * we should also withdraw and deposit the pgtable | |
600 | */ | |
601 | return true; | |
602 | } | |
074c2eae | 603 | #endif /* __ASSEMBLY__ */ |
f88df14b | 604 | #endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */ |