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KVM: PPC: Export MMU variables
[deliverable/linux.git] / arch / powerpc / kernel / asm-offsets.c
CommitLineData
14cf11af
PM		 1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
14cf11af
PM		 16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
14cf11af
PM		 22#include <linux/mman.h>
23#include <linux/mm.h>
543b9fd3 24#include <linux/suspend.h>
ad7f7167 25#include <linux/hrtimer.h>
d1dead5c 26#ifdef CONFIG_PPC64
14cf11af
PM		 27#include <linux/time.h>
28#include <linux/hardirq.h>
d1dead5c 29#endif
d4d298fe 30#include <linux/kbuild.h>
d1dead5c 31
14cf11af
PM		 32#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
14cf11af
PM		 36#include <asm/cputable.h>
37#include <asm/thread_info.h>
033ef338 38#include <asm/rtas.h>
a7f290da 39#include <asm/vdso_datapage.h>
14cf11af
PM		 40#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
14cf11af 43#include <asm/cache.h>
14cf11af 44#include <asm/compat.h>
11a27ad7 45#include <asm/mmu.h>
f04da0bc 46#include <asm/hvcall.h>
14cf11af 47#endif
3eb9cf07
SR		 48#ifdef CONFIG_PPC_ISERIES
49#include <asm/iseries/alpaca.h>
50#endif
db93f574 51#ifdef CONFIG_KVM
366d4b9b 52#include <linux/kvm_host.h>
0604675f
AG		 53#ifndef CONFIG_BOOKE
54#include <asm/kvm_book3s.h>
55#endif
db93f574 56#endif
14cf11af 57
57e2a99f 58#ifdef CONFIG_PPC32
fca622c5
KG		 59#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
60#include "head_booke.h"
61#endif
57e2a99f 62#endif
fca622c5 63
19f5465e
TP		 64#if defined(CONFIG_FSL_BOOKE)
65#include "../mm/mmu_decl.h"
66#endif
67
14cf11af
PM		 68int main(void)
69{
d1dead5c
SR		 70 DEFINE(THREAD, offsetof(struct task_struct, thread));
71 DEFINE(MM, offsetof(struct task_struct, mm));
5e696617 72 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
14cf11af 73#ifdef CONFIG_PPC64
d1dead5c 74 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
9c1e1052
PM		 75 DEFINE(SIGSEGV, SIGSEGV);
76 DEFINE(NMI_MASK, NMI_MASK);
d1dead5c 77#else
f7e4217b 78 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
d1dead5c
SR		 79#endif /* CONFIG_PPC64 */
80
14cf11af 81 DEFINE(KSP, offsetof(struct thread_struct, ksp));
85218827 82 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
14cf11af
PM		 83 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
84 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
85 DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
86 DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
14cf11af
PM		 87#ifdef CONFIG_ALTIVEC
88 DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
89 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
90 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
91 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
92#endif /* CONFIG_ALTIVEC */
c6e6771b
MN		 93#ifdef CONFIG_VSX
94 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
95 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
96#endif /* CONFIG_VSX */
d1dead5c
SR		 97#ifdef CONFIG_PPC64
98 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
99#else /* CONFIG_PPC64 */
100 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
d1dead5c
SR		 101#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
102 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
d1dead5c 103#endif
14cf11af
PM		 104#ifdef CONFIG_SPE
105 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
106 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
107 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
108 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
109#endif /* CONFIG_SPE */
d1dead5c 110#endif /* CONFIG_PPC64 */
97e49255
AG		 111#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
112 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
113#endif
d1dead5c
SR		 114
115 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
f39224a8 116 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
d1dead5c 117 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
d1dead5c 118 DEFINE(TI_TASK, offsetof(struct thread_info, task));
d1dead5c 119 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
d1dead5c
SR		 120
121#ifdef CONFIG_PPC64
122 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
123 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
124 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
125 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
126 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
127 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
d1dead5c
SR		 128 /* paca */
129 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
130 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
131 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
132 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
133 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
134 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
d1dead5c
SR		 135 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
136 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
137 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
1f6a93e4
PM		 138 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
139 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
d04c56f7
PM		 140 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
141 DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
cdd6c482 142 DEFINE(PACAPERFPEND, offsetof(struct paca_struct, perf_event_pending));
d1dead5c 143 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
d0f13e3c
BH		 144#ifdef CONFIG_PPC_MM_SLICES
145 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
146 context.low_slices_psize));
147 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
148 context.high_slices_psize));
149 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
91c60b5b 150#endif /* CONFIG_PPC_MM_SLICES */
dce6670a
BH		 151
152#ifdef CONFIG_PPC_BOOK3E
153 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
154 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
155 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
156 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
157 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
158 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
159 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
160 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
161 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
162 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
163#endif /* CONFIG_PPC_BOOK3E */
164
91c60b5b
BH		 165#ifdef CONFIG_PPC_STD_MMU_64
166 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
167 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
168 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
169 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
170 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
171#ifdef CONFIG_PPC_MM_SLICES
d0f13e3c
BH		 172 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
173#else
174 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
d0f13e3c 175#endif /* CONFIG_PPC_MM_SLICES */
d1dead5c
SR		 176 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
177 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
178 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
3356bb9f 179 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
2f6093c8 180 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
11a27ad7
MN		 181 DEFINE(SLBSHADOW_STACKVSID,
182 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
183 DEFINE(SLBSHADOW_STACKESID,
184 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
d1dead5c
SR		 185 DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
186 DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
187 DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
188 DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
2f6093c8 189 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
91c60b5b
BH		 190#endif /* CONFIG_PPC_STD_MMU_64 */
191 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
192 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
193 DEFINE(PACA_STARTPURR, offsetof(struct paca_struct, startpurr));
194 DEFINE(PACA_STARTSPURR, offsetof(struct paca_struct, startspurr));
195 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
196 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
197 DEFINE(PACA_DATA_OFFSET, offsetof(struct paca_struct, data_offset));
198 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
55c75884 199#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
0604675f
AG		 200 DEFINE(PACA_KVM_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
201 DEFINE(SVCPU_SLB, offsetof(struct kvmppc_book3s_shadow_vcpu, slb));
202 DEFINE(SVCPU_SLB_MAX, offsetof(struct kvmppc_book3s_shadow_vcpu, slb_max));
55c75884 203#endif
033ef338 204#endif /* CONFIG_PPC64 */
d1dead5c
SR		 205
206 /* RTAS */
207 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
208 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
d1dead5c 209
14cf11af
PM		 210 /* Interrupt register frame */
211 DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
91120cc8
KG		 212 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
213#ifdef CONFIG_PPC64
14cf11af 214 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
d1dead5c
SR		 215 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
216 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
217 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
57852a85
MK		 218
219 /* hcall statistics */
220 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
221 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
222 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
223 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
d1dead5c 224#endif /* CONFIG_PPC64 */
14cf11af
PM		 225 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
226 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
227 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
228 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
229 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
230 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
231 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
232 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
233 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
234 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
235 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
236 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
237 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
238 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
d1dead5c 239#ifndef CONFIG_PPC64
14cf11af
PM		 240 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
241 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
242 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
243 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
244 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
245 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
246 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
247 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
248 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
249 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
250 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
251 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
252 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
253 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
254 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
255 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
256 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
257 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
d1dead5c 258#endif /* CONFIG_PPC64 */
14cf11af
PM		 259 /*
260 * Note: these symbols include _ because they overlap with special
261 * register names
262 */
263 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
264 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
265 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
266 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
267 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
14cf11af
PM		 268 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
269 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
270 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c
SR		 271 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
272 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
d73e0c99 273 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
d1dead5c
SR		 274#ifndef CONFIG_PPC64
275 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
276 /*
277 * The PowerPC 400-class & Book-E processors have neither the DAR
278 * nor the DSISR SPRs. Hence, we overload them to hold the similar
279 * DEAR and ESR SPRs for such processors. For critical interrupts
280 * we use them to hold SRR0 and SRR1.
14cf11af
PM		 281 */
282 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
283 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c 284#else /* CONFIG_PPC64 */
d1dead5c
SR		 285 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
286
287 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
288 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
289 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
290#endif /* CONFIG_PPC64 */
291
57e2a99f 292#if defined(CONFIG_PPC32)
fca622c5
KG		 293#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
294 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
295 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
296 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
297 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
298 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
299 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
300 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
301 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
302 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
303 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
304 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
305 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
306 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
307 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
308 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
309 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
310#endif
57e2a99f 311#endif
14cf11af
PM		 312 DEFINE(CLONE_VM, CLONE_VM);
313 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
d1dead5c
SR		 314
315#ifndef CONFIG_PPC64
14cf11af 316 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
d1dead5c 317#endif /* ! CONFIG_PPC64 */
14cf11af
PM		 318
319 /* About the CPU features table */
14cf11af
PM		 320 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
321 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
f39b7a55 322 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
14cf11af 323
d1dead5c
SR		 324 DEFINE(pbe_address, offsetof(struct pbe, address));
325 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
326 DEFINE(pbe_next, offsetof(struct pbe, next));
14cf11af 327
543b9fd3 328#ifndef CONFIG_PPC64
fd582ec8 329 DEFINE(TASK_SIZE, TASK_SIZE);
d1dead5c 330 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
a7f290da 331#endif /* ! CONFIG_PPC64 */
14cf11af 332
a7f290da
BH		 333 /* datapage offsets for use by vdso */
334 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
335 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
336 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
337 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
338 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
339 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
340 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
341 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
342 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
343 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
597bc5c0 344 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
fbe48175
OJ		 345 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
346 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
347 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
348 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
a7f290da
BH		 349#ifdef CONFIG_PPC64
350 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
14cf11af
PM		 351 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
352 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
353 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
354 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
0c37ec2a
BH		 355 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
356 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 357 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
358 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
359#else
360 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
361 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
0c37ec2a
BH		 362 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
363 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 364#endif
365 /* timeval/timezone offsets for use by vdso */
14cf11af
PM		 366 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
367 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
a7f290da
BH		 368
369 /* Other bits used by the vdso */
370 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
371 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
372 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
151db1fc 373 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
a7f290da 374
007d88d0
DW		 375#ifdef CONFIG_BUG
376 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
377#endif
16a15a30
SR		 378
379#ifdef CONFIG_PPC_ISERIES
380 /* the assembler miscalculates the VSID values */
381 DEFINE(PAGE_OFFSET_ESID, GET_ESID(PAGE_OFFSET));
382 DEFINE(PAGE_OFFSET_VSID, KERNEL_VSID(PAGE_OFFSET));
383 DEFINE(VMALLOC_START_ESID, GET_ESID(VMALLOC_START));
384 DEFINE(VMALLOC_START_VSID, KERNEL_VSID(VMALLOC_START));
3eb9cf07
SR		 385
386 /* alpaca */
387 DEFINE(ALPACA_SIZE, sizeof(struct alpaca));
16a15a30 388#endif
ee7a76da 389
ee7a76da 390 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
4ee7084e 391 DEFINE(PTE_SIZE, sizeof(pte_t));
bee86f14 392
bbf45ba5 393#ifdef CONFIG_KVM
bbf45ba5
HB		 394 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
395 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
bbf45ba5 396 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
bbf45ba5
HB		 397 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.msr));
398 DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4));
399 DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5));
400 DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6));
401 DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7));
49dd2c49 402 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
bbf45ba5 403
00c3a37c
AG		 404 /* book3s */
405#ifdef CONFIG_PPC_BOOK3S
62908905 406 DEFINE(VCPU_HOST_RETIP, offsetof(struct kvm_vcpu, arch.host_retip));
62908905
AG		 407 DEFINE(VCPU_HOST_MSR, offsetof(struct kvm_vcpu, arch.host_msr));
408 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
409 DEFINE(VCPU_TRAMPOLINE_LOWMEM, offsetof(struct kvm_vcpu, arch.trampoline_lowmem));
410 DEFINE(VCPU_TRAMPOLINE_ENTER, offsetof(struct kvm_vcpu, arch.trampoline_enter));
411 DEFINE(VCPU_HIGHMEM_HANDLER, offsetof(struct kvm_vcpu, arch.highmem_handler));
021ec9c6 412 DEFINE(VCPU_RMCALL, offsetof(struct kvm_vcpu, arch.rmcall));
62908905 413 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
0604675f
AG		 414 DEFINE(VCPU_SVCPU, offsetof(struct kvmppc_vcpu_book3s, shadow_vcpu) -
415 offsetof(struct kvmppc_vcpu_book3s, vcpu));
416 DEFINE(SVCPU_CR, offsetof(struct kvmppc_book3s_shadow_vcpu, cr));
417 DEFINE(SVCPU_XER, offsetof(struct kvmppc_book3s_shadow_vcpu, xer));
418 DEFINE(SVCPU_CTR, offsetof(struct kvmppc_book3s_shadow_vcpu, ctr));
419 DEFINE(SVCPU_LR, offsetof(struct kvmppc_book3s_shadow_vcpu, lr));
420 DEFINE(SVCPU_PC, offsetof(struct kvmppc_book3s_shadow_vcpu, pc));
421 DEFINE(SVCPU_R0, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[0]));
422 DEFINE(SVCPU_R1, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[1]));
423 DEFINE(SVCPU_R2, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[2]));
424 DEFINE(SVCPU_R3, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[3]));
425 DEFINE(SVCPU_R4, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[4]));
426 DEFINE(SVCPU_R5, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[5]));
427 DEFINE(SVCPU_R6, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[6]));
428 DEFINE(SVCPU_R7, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[7]));
429 DEFINE(SVCPU_R8, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[8]));
430 DEFINE(SVCPU_R9, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[9]));
431 DEFINE(SVCPU_R10, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[10]));
432 DEFINE(SVCPU_R11, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[11]));
433 DEFINE(SVCPU_R12, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[12]));
434 DEFINE(SVCPU_R13, offsetof(struct kvmppc_book3s_shadow_vcpu, gpr[13]));
435 DEFINE(SVCPU_HOST_R1, offsetof(struct kvmppc_book3s_shadow_vcpu, host_r1));
436 DEFINE(SVCPU_HOST_R2, offsetof(struct kvmppc_book3s_shadow_vcpu, host_r2));
437 DEFINE(SVCPU_VMHANDLER, offsetof(struct kvmppc_book3s_shadow_vcpu,
438 vmhandler));
439 DEFINE(SVCPU_SCRATCH0, offsetof(struct kvmppc_book3s_shadow_vcpu,
440 scratch0));
441 DEFINE(SVCPU_SCRATCH1, offsetof(struct kvmppc_book3s_shadow_vcpu,
442 scratch1));
443 DEFINE(SVCPU_IN_GUEST, offsetof(struct kvmppc_book3s_shadow_vcpu,
444 in_guest));
445 DEFINE(SVCPU_FAULT_DSISR, offsetof(struct kvmppc_book3s_shadow_vcpu,
446 fault_dsisr));
447 DEFINE(SVCPU_FAULT_DAR, offsetof(struct kvmppc_book3s_shadow_vcpu,
448 fault_dar));
449 DEFINE(SVCPU_LAST_INST, offsetof(struct kvmppc_book3s_shadow_vcpu,
450 last_inst));
451 DEFINE(SVCPU_SHADOW_SRR1, offsetof(struct kvmppc_book3s_shadow_vcpu,
452 shadow_srr1));
453#ifdef CONFIG_PPC_BOOK3S_32
454 DEFINE(SVCPU_SR, offsetof(struct kvmppc_book3s_shadow_vcpu, sr));
455#endif
7e57cba0
AG		 456#else
457 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
458 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
0604675f
AG		 459 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
460 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
461 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
462 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
463 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
464 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
00c3a37c 465#endif /* CONFIG_PPC_BOOK3S */
bbf45ba5 466#endif
ca9153a3
IY		 467#ifdef CONFIG_44x
468 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
469 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
470#endif
bbf45ba5 471
73e75b41
HB		 472#ifdef CONFIG_KVM_EXIT_TIMING
473 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
474 arch.timing_exit.tv32.tbu));
475 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
476 arch.timing_exit.tv32.tbl));
477 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
478 arch.timing_last_enter.tv32.tbu));
479 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
480 arch.timing_last_enter.tv32.tbl));
481#endif
482
14cf11af
PM		 483 return 0;
484}
Linux kernel - Deliverables
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