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powerpc: Save the TAR register earlier
[deliverable/linux.git] / arch / powerpc / kernel / asm-offsets.c
CommitLineData
14cf11af
PM		 1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
14cf11af
PM		 16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
14cf11af
PM		 22#include <linux/mman.h>
23#include <linux/mm.h>
543b9fd3 24#include <linux/suspend.h>
ad7f7167 25#include <linux/hrtimer.h>
d1dead5c 26#ifdef CONFIG_PPC64
14cf11af
PM		 27#include <linux/time.h>
28#include <linux/hardirq.h>
d1dead5c 29#endif
d4d298fe 30#include <linux/kbuild.h>
d1dead5c 31
14cf11af
PM		 32#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
14cf11af
PM		 36#include <asm/cputable.h>
37#include <asm/thread_info.h>
033ef338 38#include <asm/rtas.h>
a7f290da 39#include <asm/vdso_datapage.h>
14cf11af
PM		 40#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
14cf11af 43#include <asm/cache.h>
14cf11af 44#include <asm/compat.h>
11a27ad7 45#include <asm/mmu.h>
f04da0bc 46#include <asm/hvcall.h>
19ccb76a 47#include <asm/xics.h>
14cf11af 48#endif
ed79ba9e
BH		 49#ifdef CONFIG_PPC_POWERNV
50#include <asm/opal.h>
51#endif
989044ee 52#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
366d4b9b 53#include <linux/kvm_host.h>
0604675f 54#endif
989044ee
AG		 55#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
56#include <asm/kvm_book3s.h>
db93f574 57#endif
14cf11af 58
57e2a99f 59#ifdef CONFIG_PPC32
fca622c5
KG		 60#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
61#include "head_booke.h"
62#endif
57e2a99f 63#endif
fca622c5 64
55fd766b 65#if defined(CONFIG_PPC_FSL_BOOK3E)
19f5465e
TP		 66#include "../mm/mmu_decl.h"
67#endif
68
14cf11af
PM		 69int main(void)
70{
d1dead5c
SR		 71 DEFINE(THREAD, offsetof(struct task_struct, thread));
72 DEFINE(MM, offsetof(struct task_struct, mm));
5e696617 73 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
14cf11af 74#ifdef CONFIG_PPC64
d1dead5c 75 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
9c1e1052
PM		 76 DEFINE(SIGSEGV, SIGSEGV);
77 DEFINE(NMI_MASK, NMI_MASK);
efcac658 78 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
71433285 79 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
92779245 80 DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
d1dead5c 81#else
f7e4217b 82 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
d1dead5c
SR		 83#endif /* CONFIG_PPC64 */
84
14cf11af 85 DEFINE(KSP, offsetof(struct thread_struct, ksp));
85218827 86 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
14cf11af 87 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
1325a684
AK		 88#ifdef CONFIG_BOOKE
89 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
90#endif
14cf11af
PM		 91 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
92 DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
93 DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
14cf11af
PM		 94#ifdef CONFIG_ALTIVEC
95 DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
96 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
97 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
98 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
99#endif /* CONFIG_ALTIVEC */
c6e6771b
MN		 100#ifdef CONFIG_VSX
101 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
102 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
103#endif /* CONFIG_VSX */
d1dead5c
SR		 104#ifdef CONFIG_PPC64
105 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
106#else /* CONFIG_PPC64 */
107 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
14cf11af
PM		 108#ifdef CONFIG_SPE
109 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
110 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
111 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
112 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
113#endif /* CONFIG_SPE */
d1dead5c 114#endif /* CONFIG_PPC64 */
13d543cd
BB		 115#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
116 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
117#endif
97e49255
AG		 118#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
119 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
120#endif
ffe129ec 121#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
d30f6e48
SW		 122 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
123#endif
d1dead5c 124
2468dcf6
IM		 125#ifdef CONFIG_PPC_BOOK3S_64
126 DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar));
9353374b
ME		 127 DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));
128 DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));
129 DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));
59affcd3
ME		 130 DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar));
131 DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar));
132 DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
133 DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
134 DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
2468dcf6 135#endif
8b3c34cf 136#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
afc07701 137 DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
8b3c34cf
MN		 138 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
139 DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
140 DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
141 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
142 DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct,
143 transact_vr[0]));
144 DEFINE(THREAD_TRANSACT_VSCR, offsetof(struct thread_struct,
145 transact_vscr));
146 DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct,
147 transact_vrsave));
148 DEFINE(THREAD_TRANSACT_FPR0, offsetof(struct thread_struct,
149 transact_fpr[0]));
150 DEFINE(THREAD_TRANSACT_FPSCR, offsetof(struct thread_struct,
151 transact_fpscr));
152#ifdef CONFIG_VSX
153 DEFINE(THREAD_TRANSACT_VSR0, offsetof(struct thread_struct,
154 transact_fpr[0]));
155#endif
156 /* Local pt_regs on stack for Transactional Memory funcs. */
157 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
158 sizeof(struct pt_regs) + 16);
159#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
2468dcf6 160
d1dead5c 161 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
f39224a8 162 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
d1dead5c 163 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
d1dead5c 164 DEFINE(TI_TASK, offsetof(struct thread_info, task));
d1dead5c 165 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
d1dead5c
SR		 166
167#ifdef CONFIG_PPC64
168 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
169 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
170 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
171 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
172 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
173 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
d1dead5c
SR		 174 /* paca */
175 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
9e368f29 176 DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
d1dead5c
SR		 177 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
178 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
179 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
180 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
181 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
d1dead5c
SR		 182 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
183 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
184 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
1f6a93e4
PM		 185 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
186 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
d04c56f7 187 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
7230c564 188 DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
d1dead5c 189 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
d0f13e3c
BH		 190#ifdef CONFIG_PPC_MM_SLICES
191 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
192 context.low_slices_psize));
193 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
194 context.high_slices_psize));
195 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
91c60b5b 196#endif /* CONFIG_PPC_MM_SLICES */
dce6670a
BH		 197
198#ifdef CONFIG_PPC_BOOK3E
199 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
200 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
201 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
202 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
203 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
204 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
205 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
206 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
207 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
208 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
209#endif /* CONFIG_PPC_BOOK3E */
210
91c60b5b
BH		 211#ifdef CONFIG_PPC_STD_MMU_64
212 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
213 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
214 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
215 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
216 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
217#ifdef CONFIG_PPC_MM_SLICES
d0f13e3c
BH		 218 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
219#else
220 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
d0f13e3c 221#endif /* CONFIG_PPC_MM_SLICES */
d1dead5c
SR		 222 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
223 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
224 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
3356bb9f 225 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
2f6093c8 226 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
11a27ad7
MN		 227 DEFINE(SLBSHADOW_STACKVSID,
228 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
229 DEFINE(SLBSHADOW_STACKESID,
230 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
cf9efce0 231 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
de56a948 232 DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
cf9efce0 233 DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
a8606e20 234 DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
cf9efce0 235 DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
91c60b5b
BH		 236#endif /* CONFIG_PPC_STD_MMU_64 */
237 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
238 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
1fc711f7 239 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
cf9efce0
PM		 240 DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
241 DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
91c60b5b
BH		 242 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
243 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
91c60b5b 244 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
2fde6d20 245 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
0127262c 246 DEFINE(PACA_SPRG3, offsetof(struct paca_struct, sprg3));
033ef338 247#endif /* CONFIG_PPC64 */
d1dead5c
SR		 248
249 /* RTAS */
250 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
251 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
d1dead5c 252
14cf11af 253 /* Interrupt register frame */
91120cc8 254 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
14cf11af 255 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
218d169c 256#ifdef CONFIG_PPC64
d1dead5c
SR		 257 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
258 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
259 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
57852a85
MK		 260
261 /* hcall statistics */
262 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
263 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
264 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
265 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
d1dead5c 266#endif /* CONFIG_PPC64 */
14cf11af
PM		 267 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
268 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
269 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
270 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
271 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
272 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
273 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
274 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
275 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
276 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
277 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
278 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
279 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
280 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
d1dead5c 281#ifndef CONFIG_PPC64
14cf11af
PM		 282 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
283 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
284 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
285 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
286 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
287 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
288 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
289 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
290 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
291 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
292 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
293 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
294 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
295 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
296 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
297 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
298 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
299 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
d1dead5c 300#endif /* CONFIG_PPC64 */
14cf11af
PM		 301 /*
302 * Note: these symbols include _ because they overlap with special
303 * register names
304 */
305 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
306 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
307 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
308 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
309 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
14cf11af
PM		 310 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
311 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
312 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c
SR		 313 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
314 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
d73e0c99 315 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
d1dead5c
SR		 316#ifndef CONFIG_PPC64
317 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
318 /*
319 * The PowerPC 400-class & Book-E processors have neither the DAR
320 * nor the DSISR SPRs. Hence, we overload them to hold the similar
321 * DEAR and ESR SPRs for such processors. For critical interrupts
322 * we use them to hold SRR0 and SRR1.
14cf11af
PM		 323 */
324 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
325 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c 326#else /* CONFIG_PPC64 */
d1dead5c
SR		 327 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
328
329 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
330 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
331 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
332#endif /* CONFIG_PPC64 */
333
57e2a99f 334#if defined(CONFIG_PPC32)
fca622c5
KG		 335#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
336 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
337 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
338 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
339 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
340 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
341 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
342 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
343 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
344 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
345 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
346 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
347 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
348 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
349 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
350 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
351 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
352#endif
57e2a99f 353#endif
14cf11af
PM		 354 DEFINE(CLONE_VM, CLONE_VM);
355 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
d1dead5c
SR		 356
357#ifndef CONFIG_PPC64
14cf11af 358 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
d1dead5c 359#endif /* ! CONFIG_PPC64 */
14cf11af
PM		 360
361 /* About the CPU features table */
14cf11af
PM		 362 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
363 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
f39b7a55 364 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
14cf11af 365
d1dead5c
SR		 366 DEFINE(pbe_address, offsetof(struct pbe, address));
367 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
368 DEFINE(pbe_next, offsetof(struct pbe, next));
14cf11af 369
543b9fd3 370#ifndef CONFIG_PPC64
fd582ec8 371 DEFINE(TASK_SIZE, TASK_SIZE);
d1dead5c 372 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
a7f290da 373#endif /* ! CONFIG_PPC64 */
14cf11af 374
a7f290da
BH		 375 /* datapage offsets for use by vdso */
376 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
377 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
378 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
379 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
380 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
381 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
382 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
383 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
384 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
385 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
597bc5c0 386 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
8fd63a9e 387 DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
fbe48175
OJ		 388 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
389 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
390 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
391 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
a7f290da
BH		 392#ifdef CONFIG_PPC64
393 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
14cf11af
PM		 394 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
395 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
396 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
397 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
0c37ec2a
BH		 398 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
399 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 400 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
401 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
402#else
403 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
404 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
0c37ec2a
BH		 405 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
406 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 407#endif
408 /* timeval/timezone offsets for use by vdso */
14cf11af
PM		 409 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
410 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
a7f290da
BH		 411
412 /* Other bits used by the vdso */
413 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
414 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
415 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
151db1fc 416 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
a7f290da 417
007d88d0
DW		 418#ifdef CONFIG_BUG
419 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
420#endif
16a15a30 421
ee7a76da 422 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
4ee7084e 423 DEFINE(PTE_SIZE, sizeof(pte_t));
bee86f14 424
bbf45ba5 425#ifdef CONFIG_KVM
bbf45ba5
HB		 426 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
427 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
d30f6e48 428 DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));
bbf45ba5 429 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
eab17672 430 DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
de56a948
PM		 431 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fpr));
432 DEFINE(VCPU_FPSCR, offsetof(struct kvm_vcpu, arch.fpscr));
433#ifdef CONFIG_ALTIVEC
434 DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr));
435 DEFINE(VCPU_VSCR, offsetof(struct kvm_vcpu, arch.vscr));
436#endif
437#ifdef CONFIG_VSX
438 DEFINE(VCPU_VSRS, offsetof(struct kvm_vcpu, arch.vsr));
439#endif
440 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
441 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
442 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
443 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
444 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
445#ifdef CONFIG_KVM_BOOK3S_64_HV
446 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
447 DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
448 DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
449 DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
450 DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
451 DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
452 DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
453#endif
b5904972
SW		 454 DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));
455 DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));
456 DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));
457 DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));
49dd2c49 458 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
dd9ebf1f 459 DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
96bc451a 460 DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
666e7252 461 DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
ecee273f 462 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
bbf45ba5 463
b5904972
SW		 464 DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));
465 DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));
466 DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));
467 DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));
468 DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));
469 DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));
470
d30f6e48
SW		 471 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
472 DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
473
00c3a37c 474 /* book3s */
de56a948 475#ifdef CONFIG_KVM_BOOK3S_64_HV
de56a948
PM		 476 DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
477 DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
478 DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
479 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
480 DEFINE(KVM_TLBIE_LOCK, offsetof(struct kvm, arch.tlbie_lock));
1b400ba0 481 DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits));
aa04b4cc
PM		 482 DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
483 DEFINE(KVM_RMOR, offsetof(struct kvm, arch.rmor));
697d3899 484 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
de56a948
PM		 485 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
486 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
7657f408 487 DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
c35635ef 488 DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
de56a948 489#endif
00c3a37c 490#ifdef CONFIG_PPC_BOOK3S
de56a948 491 DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
de56a948
PM		 492 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
493 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
494 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
495 DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
496 DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
497 DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
498 DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
62908905 499 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
de56a948
PM		 500 DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
501 DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
aa04b4cc 502 DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
19ccb76a
PM		 503 DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));
504 DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
de56a948
PM		 505 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
506 DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
507 DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
508 DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
509 DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
de56a948
PM		 510 DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
511 DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
512 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
513 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
371fefd6 514 DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid));
0acb9111 515 DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
371fefd6
PM		 516 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
517 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
518 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
19ccb76a 519 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
de56a948
PM		 520 DEFINE(VCPU_SVCPU, offsetof(struct kvmppc_vcpu_book3s, shadow_vcpu) -
521 offsetof(struct kvmppc_vcpu_book3s, vcpu));
522 DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
523 DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
524 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
3c42bf8a
PM		 525
526#ifdef CONFIG_PPC_BOOK3S_64
de56a948 527#ifdef CONFIG_KVM_BOOK3S_PR
3c42bf8a 528# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
de56a948
PM		 529#else
530# define SVCPU_FIELD(x, f)
531#endif
3c42bf8a
PM		 532# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
533#else /* 32-bit */
534# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
535# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
536#endif
537
538 SVCPU_FIELD(SVCPU_CR, cr);
539 SVCPU_FIELD(SVCPU_XER, xer);
540 SVCPU_FIELD(SVCPU_CTR, ctr);
541 SVCPU_FIELD(SVCPU_LR, lr);
542 SVCPU_FIELD(SVCPU_PC, pc);
543 SVCPU_FIELD(SVCPU_R0, gpr[0]);
544 SVCPU_FIELD(SVCPU_R1, gpr[1]);
545 SVCPU_FIELD(SVCPU_R2, gpr[2]);
546 SVCPU_FIELD(SVCPU_R3, gpr[3]);
547 SVCPU_FIELD(SVCPU_R4, gpr[4]);
548 SVCPU_FIELD(SVCPU_R5, gpr[5]);
549 SVCPU_FIELD(SVCPU_R6, gpr[6]);
550 SVCPU_FIELD(SVCPU_R7, gpr[7]);
551 SVCPU_FIELD(SVCPU_R8, gpr[8]);
552 SVCPU_FIELD(SVCPU_R9, gpr[9]);
553 SVCPU_FIELD(SVCPU_R10, gpr[10]);
554 SVCPU_FIELD(SVCPU_R11, gpr[11]);
555 SVCPU_FIELD(SVCPU_R12, gpr[12]);
556 SVCPU_FIELD(SVCPU_R13, gpr[13]);
557 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
558 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
559 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
560 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
0604675f 561#ifdef CONFIG_PPC_BOOK3S_32
3c42bf8a 562 SVCPU_FIELD(SVCPU_SR, sr);
0604675f 563#endif
3c42bf8a
PM		 564#ifdef CONFIG_PPC64
565 SVCPU_FIELD(SVCPU_SLB, slb);
566 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
567#endif
568
569 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
570 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
de56a948 571 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
3c42bf8a
PM		 572 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
573 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
574 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
575 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
02143947 576 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
19ccb76a 577 HSTATE_FIELD(HSTATE_NAPPING, napping);
3c42bf8a 578
de56a948 579#ifdef CONFIG_KVM_BOOK3S_64_HV
7657f408
PM		 580 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
581 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
de56a948 582 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
371fefd6
PM		 583 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
584 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
54695c30
BH		 585 HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
586 HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
de56a948
PM		 587 HSTATE_FIELD(HSTATE_MMCR, host_mmcr);
588 HSTATE_FIELD(HSTATE_PMC, host_pmc);
589 HSTATE_FIELD(HSTATE_PURR, host_purr);
590 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
591 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
592 HSTATE_FIELD(HSTATE_DABR, dabr);
593 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
19ccb76a 594 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
de56a948
PM		 595#endif /* CONFIG_KVM_BOOK3S_64_HV */
596
0acb9111
PM		 597#ifdef CONFIG_PPC_BOOK3S_64
598 HSTATE_FIELD(HSTATE_CFAR, cfar);
599#endif /* CONFIG_PPC_BOOK3S_64 */
600
3c42bf8a 601#else /* CONFIG_PPC_BOOK3S */
7e57cba0
AG		 602 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
603 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
0604675f
AG		 604 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
605 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
606 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
607 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
608 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
609 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
15b708be 610 DEFINE(VCPU_CRIT_SAVE, offsetof(struct kvm_vcpu, arch.crit_save));
00c3a37c 611#endif /* CONFIG_PPC_BOOK3S */
3c42bf8a 612#endif /* CONFIG_KVM */
d17051cb
AG		 613
614#ifdef CONFIG_KVM_GUEST
615 DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
616 scratch1));
617 DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
618 scratch2));
619 DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
620 scratch3));
621 DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
622 int_pending));
623 DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
624 DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
625 critical));
cbe487fa 626 DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
d17051cb
AG		 627#endif
628
ca9153a3
IY		 629#ifdef CONFIG_44x
630 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
631 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
632#endif
55fd766b 633#ifdef CONFIG_PPC_FSL_BOOK3E
78f62237
KG		 634 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
635 DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
636 DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
637 DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
638 DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
639 DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
640#endif
bbf45ba5 641
4cd35f67
SW		 642#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
643 DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
644 DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
645 DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
646 DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
647#endif
648
d30f6e48
SW		 649#ifdef CONFIG_KVM_BOOKE_HV
650 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
651 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
652 DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
653#endif
654
73e75b41
HB		 655#ifdef CONFIG_KVM_EXIT_TIMING
656 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
657 arch.timing_exit.tv32.tbu));
658 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
659 arch.timing_exit.tv32.tbl));
660 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
661 arch.timing_last_enter.tv32.tbu));
662 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
663 arch.timing_last_enter.tv32.tbl));
664#endif
665
ed79ba9e
BH		 666#ifdef CONFIG_PPC_POWERNV
667 DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
668 DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
669 DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
670 DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
671#endif
672
14cf11af
PM		 673 return 0;
674}
Linux kernel - Deliverables
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