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Merge branch 'next/gpio-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / powerpc / kernel / asm-offsets.c
CommitLineData
14cf11af
PM		 1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
14cf11af
PM		 16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
14cf11af
PM		 22#include <linux/mman.h>
23#include <linux/mm.h>
543b9fd3 24#include <linux/suspend.h>
ad7f7167 25#include <linux/hrtimer.h>
d1dead5c 26#ifdef CONFIG_PPC64
14cf11af
PM		 27#include <linux/time.h>
28#include <linux/hardirq.h>
d1dead5c 29#endif
d4d298fe 30#include <linux/kbuild.h>
d1dead5c 31
14cf11af
PM		 32#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
14cf11af
PM		 36#include <asm/cputable.h>
37#include <asm/thread_info.h>
033ef338 38#include <asm/rtas.h>
a7f290da 39#include <asm/vdso_datapage.h>
14cf11af
PM		 40#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
14cf11af 43#include <asm/cache.h>
14cf11af 44#include <asm/compat.h>
11a27ad7 45#include <asm/mmu.h>
f04da0bc 46#include <asm/hvcall.h>
19ccb76a 47#include <asm/xics.h>
14cf11af 48#endif
ed79ba9e
BH		 49#ifdef CONFIG_PPC_POWERNV
50#include <asm/opal.h>
51#endif
989044ee 52#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
366d4b9b 53#include <linux/kvm_host.h>
0604675f 54#endif
989044ee
AG		 55#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
56#include <asm/kvm_book3s.h>
db93f574 57#endif
14cf11af 58
57e2a99f 59#ifdef CONFIG_PPC32
fca622c5
KG		 60#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
61#include "head_booke.h"
62#endif
57e2a99f 63#endif
fca622c5 64
55fd766b 65#if defined(CONFIG_PPC_FSL_BOOK3E)
19f5465e
TP		 66#include "../mm/mmu_decl.h"
67#endif
68
14cf11af
PM		 69int main(void)
70{
d1dead5c
SR		 71 DEFINE(THREAD, offsetof(struct task_struct, thread));
72 DEFINE(MM, offsetof(struct task_struct, mm));
5e696617 73 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
14cf11af 74#ifdef CONFIG_PPC64
d1dead5c 75 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
9c1e1052
PM		 76 DEFINE(SIGSEGV, SIGSEGV);
77 DEFINE(NMI_MASK, NMI_MASK);
efcac658 78 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
71433285 79 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
d1dead5c 80#else
f7e4217b 81 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
d1dead5c
SR		 82#endif /* CONFIG_PPC64 */
83
14cf11af 84 DEFINE(KSP, offsetof(struct thread_struct, ksp));
85218827 85 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
14cf11af 86 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
1325a684
AK		 87#ifdef CONFIG_BOOKE
88 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
89#endif
14cf11af
PM		 90 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
91 DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
92 DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
14cf11af
PM		 93#ifdef CONFIG_ALTIVEC
94 DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
95 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
96 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
97 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
98#endif /* CONFIG_ALTIVEC */
c6e6771b
MN		 99#ifdef CONFIG_VSX
100 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
101 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
102#endif /* CONFIG_VSX */
d1dead5c
SR		 103#ifdef CONFIG_PPC64
104 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
105#else /* CONFIG_PPC64 */
106 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
d1dead5c
SR		 107#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
108 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
d1dead5c 109#endif
14cf11af
PM		 110#ifdef CONFIG_SPE
111 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
112 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
113 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
114 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
115#endif /* CONFIG_SPE */
d1dead5c 116#endif /* CONFIG_PPC64 */
97e49255
AG		 117#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
118 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
119#endif
d30f6e48
SW		 120#ifdef CONFIG_KVM_BOOKE_HV
121 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
122#endif
d1dead5c
SR		 123
124 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
f39224a8 125 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
d1dead5c 126 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
d1dead5c 127 DEFINE(TI_TASK, offsetof(struct thread_info, task));
d1dead5c 128 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
d1dead5c
SR		 129
130#ifdef CONFIG_PPC64
131 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
132 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
133 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
134 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
135 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
136 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
d1dead5c
SR		 137 /* paca */
138 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
9e368f29 139 DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
d1dead5c
SR		 140 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
141 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
142 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
143 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
144 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
d1dead5c
SR		 145 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
146 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
147 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
1f6a93e4
PM		 148 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
149 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
d04c56f7 150 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
7230c564 151 DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
d1dead5c 152 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
d0f13e3c
BH		 153#ifdef CONFIG_PPC_MM_SLICES
154 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
155 context.low_slices_psize));
156 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
157 context.high_slices_psize));
158 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
91c60b5b 159#endif /* CONFIG_PPC_MM_SLICES */
dce6670a
BH		 160
161#ifdef CONFIG_PPC_BOOK3E
162 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
163 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
164 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
165 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
166 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
167 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
168 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
169 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
170 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
171 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
172#endif /* CONFIG_PPC_BOOK3E */
173
91c60b5b
BH		 174#ifdef CONFIG_PPC_STD_MMU_64
175 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
176 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
177 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
178 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
179 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
180#ifdef CONFIG_PPC_MM_SLICES
d0f13e3c
BH		 181 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
182#else
183 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
d0f13e3c 184#endif /* CONFIG_PPC_MM_SLICES */
d1dead5c
SR		 185 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
186 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
187 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
3356bb9f 188 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
2f6093c8 189 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
11a27ad7
MN		 190 DEFINE(SLBSHADOW_STACKVSID,
191 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
192 DEFINE(SLBSHADOW_STACKESID,
193 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
cf9efce0 194 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
de56a948 195 DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
cf9efce0 196 DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
a8606e20 197 DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
cf9efce0 198 DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
91c60b5b
BH		 199#endif /* CONFIG_PPC_STD_MMU_64 */
200 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
201 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
1fc711f7 202 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
cf9efce0
PM		 203 DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
204 DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
91c60b5b
BH		 205 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
206 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
91c60b5b 207 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
2fde6d20 208 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
033ef338 209#endif /* CONFIG_PPC64 */
d1dead5c
SR		 210
211 /* RTAS */
212 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
213 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
d1dead5c 214
14cf11af 215 /* Interrupt register frame */
91120cc8 216 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
14cf11af 217 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
218d169c 218#ifdef CONFIG_PPC64
d1dead5c
SR		 219 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
220 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
221 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
57852a85
MK		 222
223 /* hcall statistics */
224 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
225 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
226 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
227 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
d1dead5c 228#endif /* CONFIG_PPC64 */
14cf11af
PM		 229 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
230 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
231 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
232 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
233 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
234 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
235 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
236 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
237 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
238 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
239 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
240 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
241 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
242 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
d1dead5c 243#ifndef CONFIG_PPC64
14cf11af
PM		 244 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
245 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
246 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
247 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
248 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
249 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
250 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
251 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
252 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
253 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
254 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
255 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
256 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
257 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
258 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
259 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
260 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
261 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
d1dead5c 262#endif /* CONFIG_PPC64 */
14cf11af
PM		 263 /*
264 * Note: these symbols include _ because they overlap with special
265 * register names
266 */
267 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
268 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
269 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
270 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
271 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
14cf11af
PM		 272 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
273 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
274 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c
SR		 275 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
276 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
d73e0c99 277 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
d1dead5c
SR		 278#ifndef CONFIG_PPC64
279 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
280 /*
281 * The PowerPC 400-class & Book-E processors have neither the DAR
282 * nor the DSISR SPRs. Hence, we overload them to hold the similar
283 * DEAR and ESR SPRs for such processors. For critical interrupts
284 * we use them to hold SRR0 and SRR1.
14cf11af
PM		 285 */
286 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
287 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c 288#else /* CONFIG_PPC64 */
d1dead5c
SR		 289 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
290
291 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
292 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
293 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
294#endif /* CONFIG_PPC64 */
295
57e2a99f 296#if defined(CONFIG_PPC32)
fca622c5
KG		 297#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
298 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
299 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
300 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
301 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
302 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
303 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
304 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
305 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
306 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
307 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
308 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
309 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
310 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
311 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
312 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
313 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
314#endif
57e2a99f 315#endif
14cf11af
PM		 316 DEFINE(CLONE_VM, CLONE_VM);
317 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
d1dead5c
SR		 318
319#ifndef CONFIG_PPC64
14cf11af 320 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
d1dead5c 321#endif /* ! CONFIG_PPC64 */
14cf11af
PM		 322
323 /* About the CPU features table */
14cf11af
PM		 324 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
325 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
f39b7a55 326 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
14cf11af 327
d1dead5c
SR		 328 DEFINE(pbe_address, offsetof(struct pbe, address));
329 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
330 DEFINE(pbe_next, offsetof(struct pbe, next));
14cf11af 331
543b9fd3 332#ifndef CONFIG_PPC64
fd582ec8 333 DEFINE(TASK_SIZE, TASK_SIZE);
d1dead5c 334 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
a7f290da 335#endif /* ! CONFIG_PPC64 */
14cf11af 336
a7f290da
BH		 337 /* datapage offsets for use by vdso */
338 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
339 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
340 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
341 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
342 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
343 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
344 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
345 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
346 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
347 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
597bc5c0 348 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
8fd63a9e 349 DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
fbe48175
OJ		 350 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
351 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
352 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
353 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
a7f290da
BH		 354#ifdef CONFIG_PPC64
355 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
14cf11af
PM		 356 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
357 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
358 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
359 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
0c37ec2a
BH		 360 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
361 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 362 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
363 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
364#else
365 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
366 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
0c37ec2a
BH		 367 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
368 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 369#endif
370 /* timeval/timezone offsets for use by vdso */
14cf11af
PM		 371 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
372 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
a7f290da
BH		 373
374 /* Other bits used by the vdso */
375 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
376 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
377 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
151db1fc 378 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
a7f290da 379
007d88d0
DW		 380#ifdef CONFIG_BUG
381 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
382#endif
16a15a30 383
ee7a76da 384 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
4ee7084e 385 DEFINE(PTE_SIZE, sizeof(pte_t));
bee86f14 386
bbf45ba5 387#ifdef CONFIG_KVM
bbf45ba5
HB		 388 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
389 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
d30f6e48 390 DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));
bbf45ba5 391 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
eab17672 392 DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
de56a948
PM		 393 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fpr));
394 DEFINE(VCPU_FPSCR, offsetof(struct kvm_vcpu, arch.fpscr));
395#ifdef CONFIG_ALTIVEC
396 DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr));
397 DEFINE(VCPU_VSCR, offsetof(struct kvm_vcpu, arch.vscr));
398#endif
399#ifdef CONFIG_VSX
400 DEFINE(VCPU_VSRS, offsetof(struct kvm_vcpu, arch.vsr));
401#endif
402 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
403 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
404 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
405 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
406 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
407#ifdef CONFIG_KVM_BOOK3S_64_HV
408 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
409 DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
410 DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
411 DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
412 DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
413 DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
414 DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
415#endif
b5904972
SW		 416 DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));
417 DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));
418 DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));
419 DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));
49dd2c49 420 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
dd9ebf1f 421 DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
96bc451a 422 DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
666e7252 423 DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
ecee273f 424 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
bbf45ba5 425
b5904972
SW		 426 DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));
427 DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));
428 DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));
429 DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));
430 DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));
431 DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));
432
d30f6e48
SW		 433 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
434 DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
435
00c3a37c 436 /* book3s */
de56a948 437#ifdef CONFIG_KVM_BOOK3S_64_HV
de56a948
PM		 438 DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
439 DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
440 DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
441 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
442 DEFINE(KVM_TLBIE_LOCK, offsetof(struct kvm, arch.tlbie_lock));
443 DEFINE(KVM_ONLINE_CPUS, offsetof(struct kvm, online_vcpus.counter));
444 DEFINE(KVM_LAST_VCPU, offsetof(struct kvm, arch.last_vcpu));
aa04b4cc
PM		 445 DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
446 DEFINE(KVM_RMOR, offsetof(struct kvm, arch.rmor));
697d3899 447 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
de56a948
PM		 448 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
449 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
7657f408 450 DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
de56a948 451#endif
00c3a37c 452#ifdef CONFIG_PPC_BOOK3S
de56a948 453 DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
de56a948
PM		 454 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
455 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
456 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
457 DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
458 DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
459 DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
460 DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
62908905 461 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
de56a948
PM		 462 DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
463 DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
aa04b4cc 464 DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
19ccb76a
PM		 465 DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));
466 DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
de56a948
PM		 467 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
468 DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
469 DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
470 DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
471 DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
472 DEFINE(VCPU_LAST_CPU, offsetof(struct kvm_vcpu, arch.last_cpu));
473 DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
474 DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
475 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
476 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
371fefd6
PM		 477 DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid));
478 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
479 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
480 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
19ccb76a 481 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
de56a948
PM		 482 DEFINE(VCPU_SVCPU, offsetof(struct kvmppc_vcpu_book3s, shadow_vcpu) -
483 offsetof(struct kvmppc_vcpu_book3s, vcpu));
484 DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
485 DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
486 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
3c42bf8a
PM		 487
488#ifdef CONFIG_PPC_BOOK3S_64
de56a948 489#ifdef CONFIG_KVM_BOOK3S_PR
3c42bf8a 490# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
de56a948
PM		 491#else
492# define SVCPU_FIELD(x, f)
493#endif
3c42bf8a
PM		 494# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
495#else /* 32-bit */
496# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
497# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
498#endif
499
500 SVCPU_FIELD(SVCPU_CR, cr);
501 SVCPU_FIELD(SVCPU_XER, xer);
502 SVCPU_FIELD(SVCPU_CTR, ctr);
503 SVCPU_FIELD(SVCPU_LR, lr);
504 SVCPU_FIELD(SVCPU_PC, pc);
505 SVCPU_FIELD(SVCPU_R0, gpr[0]);
506 SVCPU_FIELD(SVCPU_R1, gpr[1]);
507 SVCPU_FIELD(SVCPU_R2, gpr[2]);
508 SVCPU_FIELD(SVCPU_R3, gpr[3]);
509 SVCPU_FIELD(SVCPU_R4, gpr[4]);
510 SVCPU_FIELD(SVCPU_R5, gpr[5]);
511 SVCPU_FIELD(SVCPU_R6, gpr[6]);
512 SVCPU_FIELD(SVCPU_R7, gpr[7]);
513 SVCPU_FIELD(SVCPU_R8, gpr[8]);
514 SVCPU_FIELD(SVCPU_R9, gpr[9]);
515 SVCPU_FIELD(SVCPU_R10, gpr[10]);
516 SVCPU_FIELD(SVCPU_R11, gpr[11]);
517 SVCPU_FIELD(SVCPU_R12, gpr[12]);
518 SVCPU_FIELD(SVCPU_R13, gpr[13]);
519 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
520 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
521 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
522 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
0604675f 523#ifdef CONFIG_PPC_BOOK3S_32
3c42bf8a 524 SVCPU_FIELD(SVCPU_SR, sr);
0604675f 525#endif
3c42bf8a
PM		 526#ifdef CONFIG_PPC64
527 SVCPU_FIELD(SVCPU_SLB, slb);
528 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
529#endif
530
531 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
532 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
de56a948 533 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
3c42bf8a
PM		 534 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
535 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
536 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
18ad51dd 537 HSTATE_FIELD(HSTATE_SPRG3, sprg3);
3c42bf8a 538 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
02143947 539 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
19ccb76a 540 HSTATE_FIELD(HSTATE_NAPPING, napping);
3c42bf8a 541
de56a948 542#ifdef CONFIG_KVM_BOOK3S_64_HV
7657f408
PM		 543 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
544 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
de56a948 545 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
371fefd6
PM		 546 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
547 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
de56a948
PM		 548 HSTATE_FIELD(HSTATE_MMCR, host_mmcr);
549 HSTATE_FIELD(HSTATE_PMC, host_pmc);
550 HSTATE_FIELD(HSTATE_PURR, host_purr);
551 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
552 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
553 HSTATE_FIELD(HSTATE_DABR, dabr);
554 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
19ccb76a 555 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
de56a948
PM		 556#endif /* CONFIG_KVM_BOOK3S_64_HV */
557
3c42bf8a 558#else /* CONFIG_PPC_BOOK3S */
7e57cba0
AG		 559 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
560 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
0604675f
AG		 561 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
562 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
563 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
564 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
565 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
566 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
00c3a37c 567#endif /* CONFIG_PPC_BOOK3S */
3c42bf8a 568#endif /* CONFIG_KVM */
d17051cb
AG		 569
570#ifdef CONFIG_KVM_GUEST
571 DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
572 scratch1));
573 DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
574 scratch2));
575 DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
576 scratch3));
577 DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
578 int_pending));
579 DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
580 DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
581 critical));
cbe487fa 582 DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
d17051cb
AG		 583#endif
584
ca9153a3
IY		 585#ifdef CONFIG_44x
586 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
587 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
588#endif
55fd766b 589#ifdef CONFIG_PPC_FSL_BOOK3E
78f62237
KG		 590 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
591 DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
592 DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
593 DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
594 DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
595 DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
596#endif
bbf45ba5 597
4cd35f67
SW		 598#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
599 DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
600 DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
601 DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
602 DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
603#endif
604
d30f6e48
SW		 605#ifdef CONFIG_KVM_BOOKE_HV
606 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
607 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
608 DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
609#endif
610
73e75b41
HB		 611#ifdef CONFIG_KVM_EXIT_TIMING
612 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
613 arch.timing_exit.tv32.tbu));
614 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
615 arch.timing_exit.tv32.tbl));
616 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
617 arch.timing_last_enter.tv32.tbu));
618 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
619 arch.timing_last_enter.tv32.tbl));
620#endif
621
ed79ba9e
BH		 622#ifdef CONFIG_PPC_POWERNV
623 DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
624 DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
625 DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
626 DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
627#endif
628
14cf11af
PM		 629 return 0;
630}
Linux kernel - Deliverables
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