Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
e3873444 GL |
56 | #include <linux/of.h> |
57 | #include <linux/of_irq.h> | |
1da177e4 LT |
58 | |
59 | #include <asm/uaccess.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/io.h> | |
62 | #include <asm/pgtable.h> | |
63 | #include <asm/irq.h> | |
64 | #include <asm/cache.h> | |
65 | #include <asm/prom.h> | |
66 | #include <asm/ptrace.h> | |
1da177e4 | 67 | #include <asm/machdep.h> |
0ebfff14 | 68 | #include <asm/udbg.h> |
89c81797 | 69 | #include <asm/dbell.h> |
3e7f45ad | 70 | #include <asm/smp.h> |
89c81797 | 71 | |
d04c56f7 | 72 | #ifdef CONFIG_PPC64 |
1da177e4 | 73 | #include <asm/paca.h> |
d04c56f7 | 74 | #include <asm/firmware.h> |
0874dd40 | 75 | #include <asm/lv1call.h> |
756e7104 | 76 | #endif |
1bf4af16 AB |
77 | #define CREATE_TRACE_POINTS |
78 | #include <asm/trace.h> | |
1da177e4 | 79 | |
8c007bfd AB |
80 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
81 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
82 | ||
868accb7 | 83 | int __irq_offset_value; |
756e7104 | 84 | |
756e7104 | 85 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
86 | EXPORT_SYMBOL(__irq_offset_value); |
87 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 88 | |
756e7104 SR |
89 | #ifdef CONFIG_TAU_INT |
90 | extern int tau_initialized; | |
91 | extern int tau_interrupts(int); | |
92 | #endif | |
b9e5b4e6 | 93 | #endif /* CONFIG_PPC32 */ |
756e7104 | 94 | |
756e7104 | 95 | #ifdef CONFIG_PPC64 |
cd015707 ME |
96 | |
97 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 98 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 99 | #endif |
1da177e4 LT |
100 | |
101 | int distribute_irqs = 1; | |
d04c56f7 | 102 | |
4e491d14 | 103 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
104 | { |
105 | unsigned long enabled; | |
106 | ||
107 | __asm__ __volatile__("lbz %0,%1(13)" | |
108 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
109 | ||
110 | return enabled; | |
111 | } | |
112 | ||
4e491d14 | 113 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
114 | { |
115 | __asm__ __volatile__("stb %0,%1(13)" | |
116 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
117 | } | |
118 | ||
df9ee292 | 119 | notrace void arch_local_irq_restore(unsigned long en) |
d04c56f7 | 120 | { |
ef2b343e HD |
121 | /* |
122 | * get_paca()->soft_enabled = en; | |
123 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
124 | * That was allowed before, and in such a case we do need to take care | |
125 | * that gcc will set soft_enabled directly via r13, not choose to use | |
126 | * an intermediate register, lest we're preempted to a different cpu. | |
127 | */ | |
128 | set_soft_enabled(en); | |
d04c56f7 PM |
129 | if (!en) |
130 | return; | |
131 | ||
94491685 | 132 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 133 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
134 | /* |
135 | * Do we need to disable preemption here? Not really: in the | |
136 | * unlikely event that we're preempted to a different cpu in | |
137 | * between getting r13, loading its lppaca_ptr, and loading | |
138 | * its any_int, we might call iseries_handle_interrupts without | |
139 | * an interrupt pending on the new cpu, but that's no disaster, | |
140 | * is it? And the business of preempting us off the old cpu | |
141 | * would itself involve a local_irq_restore which handles the | |
142 | * interrupt to that cpu. | |
143 | * | |
144 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
145 | * to avoid any preemption checking added into get_paca(). | |
146 | */ | |
147 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 148 | iseries_handle_interrupts(); |
d04c56f7 | 149 | } |
94491685 | 150 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 151 | |
ef2b343e HD |
152 | /* |
153 | * if (get_paca()->hard_enabled) return; | |
154 | * But again we need to take care that gcc gets hard_enabled directly | |
155 | * via r13, not choose to use an intermediate register, lest we're | |
156 | * preempted to a different cpu in between the two instructions. | |
157 | */ | |
158 | if (get_hard_enabled()) | |
d04c56f7 | 159 | return; |
ef2b343e | 160 | |
89c81797 | 161 | #if defined(CONFIG_BOOKE) && defined(CONFIG_SMP) |
850f22d5 ME |
162 | /* Check for pending doorbell interrupts and resend to ourself */ |
163 | doorbell_check_self(); | |
89c81797 BH |
164 | #endif |
165 | ||
ef2b343e HD |
166 | /* |
167 | * Need to hard-enable interrupts here. Since currently disabled, | |
168 | * no need to take further asm precautions against preemption; but | |
169 | * use local_paca instead of get_paca() to avoid preemption checking. | |
170 | */ | |
171 | local_paca->hard_enabled = en; | |
e8775d4a BH |
172 | |
173 | #ifndef CONFIG_BOOKE | |
174 | /* On server, re-trigger the decrementer if it went negative since | |
175 | * some processors only trigger on edge transitions of the sign bit. | |
176 | * | |
177 | * BookE has a level sensitive decrementer (latches in TSR) so we | |
178 | * don't need that | |
179 | */ | |
d04c56f7 PM |
180 | if ((int)mfspr(SPRN_DEC) < 0) |
181 | mtspr(SPRN_DEC, 1); | |
e8775d4a | 182 | #endif /* CONFIG_BOOKE */ |
0874dd40 TS |
183 | |
184 | /* | |
185 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
186 | * Any HV call will have this side effect. | |
187 | */ | |
188 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
189 | u64 tmp; | |
190 | lv1_get_version_info(&tmp); | |
191 | } | |
192 | ||
e1fa2e13 | 193 | __hard_irq_enable(); |
d04c56f7 | 194 | } |
df9ee292 | 195 | EXPORT_SYMBOL(arch_local_irq_restore); |
756e7104 | 196 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 197 | |
c86845ed AB |
198 | static int show_other_interrupts(struct seq_file *p, int prec) |
199 | { | |
200 | int j; | |
201 | ||
202 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) | |
203 | if (tau_initialized) { | |
204 | seq_printf(p, "%*s: ", prec, "TAU"); | |
205 | for_each_online_cpu(j) | |
206 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
207 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
208 | } | |
209 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */ | |
210 | ||
89713ed1 AB |
211 | seq_printf(p, "%*s: ", prec, "LOC"); |
212 | for_each_online_cpu(j) | |
213 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs); | |
214 | seq_printf(p, " Local timer interrupts\n"); | |
215 | ||
17081102 AB |
216 | seq_printf(p, "%*s: ", prec, "SPU"); |
217 | for_each_online_cpu(j) | |
218 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); | |
219 | seq_printf(p, " Spurious interrupts\n"); | |
220 | ||
89713ed1 AB |
221 | seq_printf(p, "%*s: ", prec, "CNT"); |
222 | for_each_online_cpu(j) | |
223 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); | |
224 | seq_printf(p, " Performance monitoring interrupts\n"); | |
225 | ||
226 | seq_printf(p, "%*s: ", prec, "MCE"); | |
227 | for_each_online_cpu(j) | |
228 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions); | |
229 | seq_printf(p, " Machine check exceptions\n"); | |
230 | ||
c86845ed AB |
231 | return 0; |
232 | } | |
233 | ||
1da177e4 LT |
234 | int show_interrupts(struct seq_file *p, void *v) |
235 | { | |
c86845ed AB |
236 | unsigned long flags, any_count = 0; |
237 | int i = *(loff_t *) v, j, prec; | |
756e7104 | 238 | struct irqaction *action; |
97f7d6bc | 239 | struct irq_desc *desc; |
e1180287 | 240 | struct irq_chip *chip; |
1da177e4 | 241 | |
c86845ed AB |
242 | if (i > nr_irqs) |
243 | return 0; | |
244 | ||
245 | for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec) | |
246 | j *= 10; | |
247 | ||
248 | if (i == nr_irqs) | |
249 | return show_other_interrupts(p, prec); | |
250 | ||
251 | /* print header */ | |
1da177e4 | 252 | if (i == 0) { |
c86845ed | 253 | seq_printf(p, "%*s", prec + 8, ""); |
756e7104 | 254 | for_each_online_cpu(j) |
c86845ed | 255 | seq_printf(p, "CPU%-8d", j); |
1da177e4 | 256 | seq_putc(p, '\n'); |
756e7104 | 257 | } |
750ab112 ME |
258 | |
259 | desc = irq_to_desc(i); | |
260 | if (!desc) | |
261 | return 0; | |
262 | ||
239007b8 | 263 | raw_spin_lock_irqsave(&desc->lock, flags); |
c86845ed AB |
264 | for_each_online_cpu(j) |
265 | any_count |= kstat_irqs_cpu(i, j); | |
750ab112 | 266 | action = desc->action; |
c86845ed AB |
267 | if (!action && !any_count) |
268 | goto out; | |
750ab112 | 269 | |
c86845ed | 270 | seq_printf(p, "%*d: ", prec, i); |
750ab112 ME |
271 | for_each_online_cpu(j) |
272 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
750ab112 | 273 | |
e1180287 LB |
274 | chip = get_irq_desc_chip(desc); |
275 | if (chip) | |
276 | seq_printf(p, " %-16s", chip->name); | |
750ab112 | 277 | else |
c86845ed AB |
278 | seq_printf(p, " %-16s", "None"); |
279 | seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge"); | |
750ab112 | 280 | |
c86845ed AB |
281 | if (action) { |
282 | seq_printf(p, " %s", action->name); | |
283 | while ((action = action->next) != NULL) | |
284 | seq_printf(p, ", %s", action->name); | |
285 | } | |
750ab112 | 286 | |
750ab112 | 287 | seq_putc(p, '\n'); |
c86845ed | 288 | out: |
239007b8 | 289 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
290 | return 0; |
291 | } | |
292 | ||
89713ed1 AB |
293 | /* |
294 | * /proc/stat helpers | |
295 | */ | |
296 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
297 | { | |
298 | u64 sum = per_cpu(irq_stat, cpu).timer_irqs; | |
299 | ||
300 | sum += per_cpu(irq_stat, cpu).pmu_irqs; | |
301 | sum += per_cpu(irq_stat, cpu).mce_exceptions; | |
17081102 | 302 | sum += per_cpu(irq_stat, cpu).spurious_irqs; |
89713ed1 AB |
303 | |
304 | return sum; | |
305 | } | |
306 | ||
1da177e4 | 307 | #ifdef CONFIG_HOTPLUG_CPU |
b6decb70 | 308 | void fixup_irqs(const struct cpumask *map) |
1da177e4 | 309 | { |
6cff46f4 | 310 | struct irq_desc *desc; |
1da177e4 LT |
311 | unsigned int irq; |
312 | static int warned; | |
b6decb70 | 313 | cpumask_var_t mask; |
1da177e4 | 314 | |
b6decb70 | 315 | alloc_cpumask_var(&mask, GFP_KERNEL); |
1da177e4 | 316 | |
b6decb70 | 317 | for_each_irq(irq) { |
e1180287 LB |
318 | struct irq_chip *chip; |
319 | ||
6cff46f4 | 320 | desc = irq_to_desc(irq); |
3cd85192 JB |
321 | if (!desc) |
322 | continue; | |
323 | ||
324 | if (desc->status & IRQ_PER_CPU) | |
1da177e4 LT |
325 | continue; |
326 | ||
e1180287 LB |
327 | chip = get_irq_desc_chip(desc); |
328 | ||
329 | cpumask_and(mask, desc->irq_data.affinity, map); | |
b6decb70 | 330 | if (cpumask_any(mask) >= nr_cpu_ids) { |
1da177e4 | 331 | printk("Breaking affinity for irq %i\n", irq); |
b6decb70 | 332 | cpumask_copy(mask, map); |
1da177e4 | 333 | } |
e1180287 LB |
334 | if (chip->irq_set_affinity) |
335 | chip->irq_set_affinity(&desc->irq_data, mask, true); | |
6cff46f4 | 336 | else if (desc->action && !(warned++)) |
1da177e4 LT |
337 | printk("Cannot set affinity for irq %i\n", irq); |
338 | } | |
339 | ||
b6decb70 AB |
340 | free_cpumask_var(mask); |
341 | ||
1da177e4 LT |
342 | local_irq_enable(); |
343 | mdelay(1); | |
344 | local_irq_disable(); | |
345 | } | |
346 | #endif | |
347 | ||
f2694ba5 ME |
348 | static inline void handle_one_irq(unsigned int irq) |
349 | { | |
350 | struct thread_info *curtp, *irqtp; | |
351 | unsigned long saved_sp_limit; | |
352 | struct irq_desc *desc; | |
f2694ba5 ME |
353 | |
354 | /* Switch to the irq stack to handle this */ | |
355 | curtp = current_thread_info(); | |
356 | irqtp = hardirq_ctx[smp_processor_id()]; | |
357 | ||
358 | if (curtp == irqtp) { | |
359 | /* We're already on the irq stack, just handle it */ | |
360 | generic_handle_irq(irq); | |
361 | return; | |
362 | } | |
363 | ||
6cff46f4 | 364 | desc = irq_to_desc(irq); |
f2694ba5 ME |
365 | saved_sp_limit = current->thread.ksp_limit; |
366 | ||
f2694ba5 ME |
367 | irqtp->task = curtp->task; |
368 | irqtp->flags = 0; | |
369 | ||
370 | /* Copy the softirq bits in preempt_count so that the | |
371 | * softirq checks work in the hardirq context. */ | |
372 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
373 | (curtp->preempt_count & SOFTIRQ_MASK); | |
374 | ||
375 | current->thread.ksp_limit = (unsigned long)irqtp + | |
376 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
377 | ||
835363e6 | 378 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
379 | current->thread.ksp_limit = saved_sp_limit; |
380 | irqtp->task = NULL; | |
381 | ||
382 | /* Set any flag that may have been set on the | |
383 | * alternate stack | |
384 | */ | |
385 | if (irqtp->flags) | |
386 | set_bits(irqtp->flags, &curtp->flags); | |
387 | } | |
f2694ba5 | 388 | |
d7cb10d6 ME |
389 | static inline void check_stack_overflow(void) |
390 | { | |
391 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
392 | long sp; | |
393 | ||
394 | sp = __get_SP() & (THREAD_SIZE-1); | |
395 | ||
396 | /* check for stack overflow: is there less than 2KB free? */ | |
397 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
398 | printk("do_IRQ: stack overflow: %ld\n", | |
399 | sp - sizeof(struct thread_info)); | |
400 | dump_stack(); | |
401 | } | |
402 | #endif | |
403 | } | |
404 | ||
1da177e4 LT |
405 | void do_IRQ(struct pt_regs *regs) |
406 | { | |
7d12e780 | 407 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 408 | unsigned int irq; |
1da177e4 | 409 | |
1bf4af16 AB |
410 | trace_irq_entry(regs); |
411 | ||
4b218e9b | 412 | irq_enter(); |
1da177e4 | 413 | |
d7cb10d6 | 414 | check_stack_overflow(); |
1da177e4 | 415 | |
35a84c2f | 416 | irq = ppc_md.get_irq(); |
1da177e4 | 417 | |
f2694ba5 ME |
418 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
419 | handle_one_irq(irq); | |
420 | else if (irq != NO_IRQ_IGNORE) | |
17081102 | 421 | __get_cpu_var(irq_stat).spurious_irqs++; |
e199500c | 422 | |
4b218e9b | 423 | irq_exit(); |
7d12e780 | 424 | set_irq_regs(old_regs); |
756e7104 | 425 | |
e199500c | 426 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
427 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
428 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
429 | get_lppaca()->int_dword.fields.decr_int = 0; |
430 | /* Signal a fake decrementer interrupt */ | |
431 | timer_interrupt(regs); | |
e199500c SR |
432 | } |
433 | #endif | |
1bf4af16 AB |
434 | |
435 | trace_irq_exit(regs); | |
e199500c | 436 | } |
1da177e4 LT |
437 | |
438 | void __init init_IRQ(void) | |
439 | { | |
70584578 SR |
440 | if (ppc_md.init_IRQ) |
441 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
442 | |
443 | exc_lvl_ctx_init(); | |
444 | ||
1da177e4 LT |
445 | irq_ctx_init(); |
446 | } | |
447 | ||
bcf0b088 KG |
448 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
449 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
450 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
451 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
452 | ||
453 | void exc_lvl_ctx_init(void) | |
454 | { | |
455 | struct thread_info *tp; | |
3e7f45ad | 456 | int i, hw_cpu; |
bcf0b088 KG |
457 | |
458 | for_each_possible_cpu(i) { | |
3e7f45ad DK |
459 | hw_cpu = get_hard_smp_processor_id(i); |
460 | memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE); | |
461 | tp = critirq_ctx[hw_cpu]; | |
bcf0b088 KG |
462 | tp->cpu = i; |
463 | tp->preempt_count = 0; | |
464 | ||
465 | #ifdef CONFIG_BOOKE | |
3e7f45ad DK |
466 | memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE); |
467 | tp = dbgirq_ctx[hw_cpu]; | |
bcf0b088 KG |
468 | tp->cpu = i; |
469 | tp->preempt_count = 0; | |
470 | ||
3e7f45ad DK |
471 | memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE); |
472 | tp = mcheckirq_ctx[hw_cpu]; | |
bcf0b088 KG |
473 | tp->cpu = i; |
474 | tp->preempt_count = HARDIRQ_OFFSET; | |
475 | #endif | |
476 | } | |
477 | } | |
478 | #endif | |
1da177e4 | 479 | |
22722051 AM |
480 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
481 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
482 | |
483 | void irq_ctx_init(void) | |
484 | { | |
485 | struct thread_info *tp; | |
486 | int i; | |
487 | ||
0e551954 | 488 | for_each_possible_cpu(i) { |
1da177e4 LT |
489 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
490 | tp = softirq_ctx[i]; | |
491 | tp->cpu = i; | |
e6768a4f | 492 | tp->preempt_count = 0; |
1da177e4 LT |
493 | |
494 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
495 | tp = hardirq_ctx[i]; | |
496 | tp->cpu = i; | |
497 | tp->preempt_count = HARDIRQ_OFFSET; | |
498 | } | |
499 | } | |
500 | ||
c6622f63 PM |
501 | static inline void do_softirq_onstack(void) |
502 | { | |
503 | struct thread_info *curtp, *irqtp; | |
85218827 | 504 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
505 | |
506 | curtp = current_thread_info(); | |
507 | irqtp = softirq_ctx[smp_processor_id()]; | |
508 | irqtp->task = curtp->task; | |
85218827 KG |
509 | current->thread.ksp_limit = (unsigned long)irqtp + |
510 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 511 | call_do_softirq(irqtp); |
85218827 | 512 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
513 | irqtp->task = NULL; |
514 | } | |
1da177e4 | 515 | |
1da177e4 LT |
516 | void do_softirq(void) |
517 | { | |
518 | unsigned long flags; | |
1da177e4 LT |
519 | |
520 | if (in_interrupt()) | |
1da177e4 LT |
521 | return; |
522 | ||
1da177e4 | 523 | local_irq_save(flags); |
1da177e4 | 524 | |
912b2539 | 525 | if (local_softirq_pending()) |
c6622f63 | 526 | do_softirq_onstack(); |
1da177e4 LT |
527 | |
528 | local_irq_restore(flags); | |
1da177e4 | 529 | } |
1da177e4 | 530 | |
1da177e4 | 531 | |
1da177e4 | 532 | /* |
0ebfff14 | 533 | * IRQ controller and virtual interrupts |
1da177e4 LT |
534 | */ |
535 | ||
0ebfff14 | 536 | static LIST_HEAD(irq_hosts); |
f95e085b | 537 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
967e012e | 538 | static unsigned int revmap_trees_allocated; |
150c6c8f | 539 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
540 | struct irq_map_entry irq_map[NR_IRQS]; |
541 | static unsigned int irq_virq_count = NR_IRQS; | |
542 | static struct irq_host *irq_default_host; | |
1da177e4 | 543 | |
35923f12 OJ |
544 | irq_hw_number_t virq_to_hw(unsigned int virq) |
545 | { | |
546 | return irq_map[virq].hwirq; | |
547 | } | |
548 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
549 | ||
68158006 ME |
550 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
551 | { | |
552 | return h->of_node != NULL && h->of_node == np; | |
553 | } | |
554 | ||
5669c3cf | 555 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
556 | unsigned int revmap_type, |
557 | unsigned int revmap_arg, | |
558 | struct irq_host_ops *ops, | |
559 | irq_hw_number_t inval_irq) | |
1da177e4 | 560 | { |
0ebfff14 BH |
561 | struct irq_host *host; |
562 | unsigned int size = sizeof(struct irq_host); | |
563 | unsigned int i; | |
564 | unsigned int *rmap; | |
565 | unsigned long flags; | |
566 | ||
567 | /* Allocate structure and revmap table if using linear mapping */ | |
568 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
569 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 570 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
571 | if (host == NULL) |
572 | return NULL; | |
7d01c880 | 573 | |
0ebfff14 BH |
574 | /* Fill structure */ |
575 | host->revmap_type = revmap_type; | |
576 | host->inval_irq = inval_irq; | |
577 | host->ops = ops; | |
19fc65b5 | 578 | host->of_node = of_node_get(of_node); |
7d01c880 | 579 | |
68158006 ME |
580 | if (host->ops->match == NULL) |
581 | host->ops->match = default_irq_host_match; | |
7d01c880 | 582 | |
f95e085b | 583 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
584 | |
585 | /* If it's a legacy controller, check for duplicates and | |
586 | * mark it as allocated (we use irq 0 host pointer for that | |
587 | */ | |
588 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
589 | if (irq_map[0].host != NULL) { | |
f95e085b | 590 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
591 | /* If we are early boot, we can't free the structure, |
592 | * too bad... | |
593 | * this will be fixed once slab is made available early | |
594 | * instead of the current cruft | |
595 | */ | |
a655237f JL |
596 | if (mem_init_done) { |
597 | of_node_put(host->of_node); | |
0ebfff14 | 598 | kfree(host); |
a655237f | 599 | } |
0ebfff14 BH |
600 | return NULL; |
601 | } | |
602 | irq_map[0].host = host; | |
603 | } | |
604 | ||
605 | list_add(&host->link, &irq_hosts); | |
f95e085b | 606 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
607 | |
608 | /* Additional setups per revmap type */ | |
609 | switch(revmap_type) { | |
610 | case IRQ_HOST_MAP_LEGACY: | |
611 | /* 0 is always the invalid number for legacy */ | |
612 | host->inval_irq = 0; | |
613 | /* setup us as the host for all legacy interrupts */ | |
614 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 615 | irq_map[i].hwirq = i; |
0ebfff14 BH |
616 | smp_wmb(); |
617 | irq_map[i].host = host; | |
618 | smp_wmb(); | |
619 | ||
6e99e458 | 620 | /* Clear norequest flags */ |
6cff46f4 | 621 | irq_to_desc(i)->status &= ~IRQ_NOREQUEST; |
0ebfff14 BH |
622 | |
623 | /* Legacy flags are left to default at this point, | |
624 | * one can then use irq_create_mapping() to | |
c03983ac | 625 | * explicitly change them |
0ebfff14 | 626 | */ |
6e99e458 | 627 | ops->map(host, i, i); |
0ebfff14 BH |
628 | } |
629 | break; | |
630 | case IRQ_HOST_MAP_LINEAR: | |
631 | rmap = (unsigned int *)(host + 1); | |
632 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 633 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
634 | host->revmap_data.linear.size = revmap_arg; |
635 | smp_wmb(); | |
636 | host->revmap_data.linear.revmap = rmap; | |
637 | break; | |
638 | default: | |
639 | break; | |
640 | } | |
641 | ||
642 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
643 | ||
644 | return host; | |
1da177e4 LT |
645 | } |
646 | ||
0ebfff14 | 647 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 648 | { |
0ebfff14 BH |
649 | struct irq_host *h, *found = NULL; |
650 | unsigned long flags; | |
651 | ||
652 | /* We might want to match the legacy controller last since | |
653 | * it might potentially be set to match all interrupts in | |
654 | * the absence of a device node. This isn't a problem so far | |
655 | * yet though... | |
656 | */ | |
f95e085b | 657 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 | 658 | list_for_each_entry(h, &irq_hosts, link) |
68158006 | 659 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
660 | found = h; |
661 | break; | |
662 | } | |
f95e085b | 663 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
664 | return found; |
665 | } | |
666 | EXPORT_SYMBOL_GPL(irq_find_host); | |
667 | ||
668 | void irq_set_default_host(struct irq_host *host) | |
669 | { | |
670 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 671 | |
0ebfff14 BH |
672 | irq_default_host = host; |
673 | } | |
1da177e4 | 674 | |
0ebfff14 BH |
675 | void irq_set_virq_count(unsigned int count) |
676 | { | |
677 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 678 | |
0ebfff14 BH |
679 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
680 | if (count < NR_IRQS) | |
681 | irq_virq_count = count; | |
682 | } | |
683 | ||
6fde40f3 ME |
684 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
685 | irq_hw_number_t hwirq) | |
686 | { | |
a9d8946b | 687 | int res; |
cd015707 | 688 | |
a9d8946b TG |
689 | res = irq_alloc_desc_at(virq, 0); |
690 | if (res != virq) { | |
cd015707 ME |
691 | pr_debug("irq: -> allocating desc failed\n"); |
692 | goto error; | |
693 | } | |
694 | ||
a9d8946b | 695 | irq_clear_status_flags(virq, IRQ_NOREQUEST); |
6fde40f3 ME |
696 | |
697 | /* map it */ | |
698 | smp_wmb(); | |
699 | irq_map[virq].hwirq = hwirq; | |
700 | smp_mb(); | |
701 | ||
702 | if (host->ops->map(host, virq, hwirq)) { | |
703 | pr_debug("irq: -> mapping failed, freeing\n"); | |
a9d8946b | 704 | goto errdesc; |
6fde40f3 ME |
705 | } |
706 | ||
707 | return 0; | |
cd015707 | 708 | |
a9d8946b TG |
709 | errdesc: |
710 | irq_free_descs(virq, 1); | |
cd015707 ME |
711 | error: |
712 | irq_free_virt(virq, 1); | |
713 | return -1; | |
6fde40f3 | 714 | } |
8ec8f2e8 | 715 | |
ee51de56 ME |
716 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
717 | { | |
718 | unsigned int virq; | |
719 | ||
720 | if (host == NULL) | |
721 | host = irq_default_host; | |
722 | ||
723 | BUG_ON(host == NULL); | |
724 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
725 | ||
726 | virq = irq_alloc_virt(host, 1, 0); | |
727 | if (virq == NO_IRQ) { | |
728 | pr_debug("irq: create_direct virq allocation failed\n"); | |
729 | return NO_IRQ; | |
730 | } | |
731 | ||
732 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
733 | ||
734 | if (irq_setup_virq(host, virq, virq)) | |
735 | return NO_IRQ; | |
736 | ||
737 | return virq; | |
738 | } | |
739 | ||
0ebfff14 | 740 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 741 | irq_hw_number_t hwirq) |
0ebfff14 BH |
742 | { |
743 | unsigned int virq, hint; | |
744 | ||
6e99e458 | 745 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
746 | |
747 | /* Look for default host if nececssary */ | |
748 | if (host == NULL) | |
749 | host = irq_default_host; | |
750 | if (host == NULL) { | |
751 | printk(KERN_WARNING "irq_create_mapping called for" | |
752 | " NULL host, hwirq=%lx\n", hwirq); | |
753 | WARN_ON(1); | |
754 | return NO_IRQ; | |
1da177e4 | 755 | } |
0ebfff14 | 756 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 757 | |
0ebfff14 BH |
758 | /* Check if mapping already exist, if it does, call |
759 | * host->ops->map() to update the flags | |
760 | */ | |
761 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 762 | if (virq != NO_IRQ) { |
acc900ef IK |
763 | if (host->ops->remap) |
764 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 765 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 766 | return virq; |
1da177e4 LT |
767 | } |
768 | ||
0ebfff14 BH |
769 | /* Get a virtual interrupt number */ |
770 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
771 | /* Handle legacy */ | |
772 | virq = (unsigned int)hwirq; | |
773 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
774 | return NO_IRQ; | |
775 | return virq; | |
776 | } else { | |
777 | /* Allocate a virtual interrupt number */ | |
778 | hint = hwirq % irq_virq_count; | |
779 | virq = irq_alloc_virt(host, 1, hint); | |
780 | if (virq == NO_IRQ) { | |
781 | pr_debug("irq: -> virq allocation failed\n"); | |
782 | return NO_IRQ; | |
783 | } | |
784 | } | |
0ebfff14 | 785 | |
6fde40f3 | 786 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 787 | return NO_IRQ; |
6fde40f3 | 788 | |
c7d07fdd ME |
789 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
790 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
791 | ||
1da177e4 | 792 | return virq; |
0ebfff14 BH |
793 | } |
794 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
795 | ||
f3d2ab41 | 796 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 797 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
798 | { |
799 | struct irq_host *host; | |
800 | irq_hw_number_t hwirq; | |
6e99e458 BH |
801 | unsigned int type = IRQ_TYPE_NONE; |
802 | unsigned int virq; | |
1da177e4 | 803 | |
0ebfff14 BH |
804 | if (controller == NULL) |
805 | host = irq_default_host; | |
806 | else | |
807 | host = irq_find_host(controller); | |
6e99e458 BH |
808 | if (host == NULL) { |
809 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
810 | controller->full_name); | |
0ebfff14 | 811 | return NO_IRQ; |
6e99e458 | 812 | } |
0ebfff14 BH |
813 | |
814 | /* If host has no translation, then we assume interrupt line */ | |
815 | if (host->ops->xlate == NULL) | |
816 | hwirq = intspec[0]; | |
817 | else { | |
818 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 819 | &hwirq, &type)) |
0ebfff14 | 820 | return NO_IRQ; |
1da177e4 | 821 | } |
0ebfff14 | 822 | |
6e99e458 BH |
823 | /* Create mapping */ |
824 | virq = irq_create_mapping(host, hwirq); | |
825 | if (virq == NO_IRQ) | |
826 | return virq; | |
827 | ||
828 | /* Set type if specified and different than the current one */ | |
829 | if (type != IRQ_TYPE_NONE && | |
6cff46f4 | 830 | type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) |
6e99e458 BH |
831 | set_irq_type(virq, type); |
832 | return virq; | |
1da177e4 | 833 | } |
0ebfff14 | 834 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 835 | |
0ebfff14 BH |
836 | void irq_dispose_mapping(unsigned int virq) |
837 | { | |
5414c6be | 838 | struct irq_host *host; |
0ebfff14 | 839 | irq_hw_number_t hwirq; |
1da177e4 | 840 | |
5414c6be ME |
841 | if (virq == NO_IRQ) |
842 | return; | |
843 | ||
844 | host = irq_map[virq].host; | |
0ebfff14 BH |
845 | WARN_ON (host == NULL); |
846 | if (host == NULL) | |
847 | return; | |
1da177e4 | 848 | |
0ebfff14 BH |
849 | /* Never unmap legacy interrupts */ |
850 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
851 | return; | |
1da177e4 | 852 | |
0ebfff14 BH |
853 | /* remove chip and handler */ |
854 | set_irq_chip_and_handler(virq, NULL, NULL); | |
855 | ||
856 | /* Make sure it's completed */ | |
857 | synchronize_irq(virq); | |
858 | ||
859 | /* Tell the PIC about it */ | |
860 | if (host->ops->unmap) | |
861 | host->ops->unmap(host, virq); | |
862 | smp_mb(); | |
863 | ||
864 | /* Clear reverse map */ | |
865 | hwirq = irq_map[virq].hwirq; | |
866 | switch(host->revmap_type) { | |
867 | case IRQ_HOST_MAP_LINEAR: | |
868 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 869 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
870 | break; |
871 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
872 | /* |
873 | * Check if radix tree allocated yet, if not then nothing to | |
874 | * remove. | |
875 | */ | |
876 | smp_rmb(); | |
877 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 878 | break; |
150c6c8f | 879 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 880 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 881 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
882 | break; |
883 | } | |
1da177e4 | 884 | |
0ebfff14 BH |
885 | /* Destroy map */ |
886 | smp_mb(); | |
887 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 888 | |
a9d8946b | 889 | irq_set_status_flags(virq, IRQ_NOREQUEST); |
1da177e4 | 890 | |
a9d8946b | 891 | irq_free_descs(virq, 1); |
0ebfff14 BH |
892 | /* Free it */ |
893 | irq_free_virt(virq, 1); | |
1da177e4 | 894 | } |
0ebfff14 | 895 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 896 | |
0ebfff14 BH |
897 | unsigned int irq_find_mapping(struct irq_host *host, |
898 | irq_hw_number_t hwirq) | |
899 | { | |
900 | unsigned int i; | |
901 | unsigned int hint = hwirq % irq_virq_count; | |
902 | ||
903 | /* Look for default host if nececssary */ | |
904 | if (host == NULL) | |
905 | host = irq_default_host; | |
906 | if (host == NULL) | |
907 | return NO_IRQ; | |
908 | ||
909 | /* legacy -> bail early */ | |
910 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
911 | return hwirq; | |
912 | ||
913 | /* Slow path does a linear search of the map */ | |
914 | if (hint < NUM_ISA_INTERRUPTS) | |
915 | hint = NUM_ISA_INTERRUPTS; | |
916 | i = hint; | |
917 | do { | |
918 | if (irq_map[i].host == host && | |
919 | irq_map[i].hwirq == hwirq) | |
920 | return i; | |
921 | i++; | |
922 | if (i >= irq_virq_count) | |
923 | i = NUM_ISA_INTERRUPTS; | |
924 | } while(i != hint); | |
925 | return NO_IRQ; | |
926 | } | |
927 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 928 | |
0ebfff14 | 929 | |
967e012e SD |
930 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
931 | irq_hw_number_t hwirq) | |
1da177e4 | 932 | { |
0ebfff14 BH |
933 | struct irq_map_entry *ptr; |
934 | unsigned int virq; | |
1da177e4 | 935 | |
0ebfff14 | 936 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 937 | |
967e012e SD |
938 | /* |
939 | * Check if the radix tree exists and has bee initialized. | |
940 | * If not, we fallback to slow mode | |
0ebfff14 | 941 | */ |
967e012e | 942 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
943 | return irq_find_mapping(host, hwirq); |
944 | ||
0ebfff14 | 945 | /* Now try to resolve */ |
150c6c8f SD |
946 | /* |
947 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
948 | * as it's referencing an entry in the static irq_map table. | |
949 | */ | |
967e012e | 950 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 951 | |
967e012e SD |
952 | /* |
953 | * If found in radix tree, then fine. | |
954 | * Else fallback to linear lookup - this should not happen in practice | |
955 | * as it means that we failed to insert the node in the radix tree. | |
956 | */ | |
957 | if (ptr) | |
0ebfff14 | 958 | virq = ptr - irq_map; |
967e012e SD |
959 | else |
960 | virq = irq_find_mapping(host, hwirq); | |
961 | ||
962 | return virq; | |
963 | } | |
964 | ||
965 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
966 | irq_hw_number_t hwirq) | |
967 | { | |
967e012e SD |
968 | |
969 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
970 | ||
971 | /* | |
972 | * Check if the radix tree exists yet. | |
973 | * If not, then the irq will be inserted into the tree when it gets | |
974 | * initialized. | |
975 | */ | |
976 | smp_rmb(); | |
977 | if (revmap_trees_allocated < 1) | |
978 | return; | |
0ebfff14 | 979 | |
8ec8f2e8 | 980 | if (virq != NO_IRQ) { |
150c6c8f | 981 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
982 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
983 | &irq_map[virq]); | |
150c6c8f | 984 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 985 | } |
1da177e4 LT |
986 | } |
987 | ||
0ebfff14 BH |
988 | unsigned int irq_linear_revmap(struct irq_host *host, |
989 | irq_hw_number_t hwirq) | |
c6622f63 | 990 | { |
0ebfff14 | 991 | unsigned int *revmap; |
c6622f63 | 992 | |
0ebfff14 BH |
993 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
994 | ||
995 | /* Check revmap bounds */ | |
996 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
997 | return irq_find_mapping(host, hwirq); | |
998 | ||
999 | /* Check if revmap was allocated */ | |
1000 | revmap = host->revmap_data.linear.revmap; | |
1001 | if (unlikely(revmap == NULL)) | |
1002 | return irq_find_mapping(host, hwirq); | |
1003 | ||
1004 | /* Fill up revmap with slow path if no mapping found */ | |
1005 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
1006 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
1007 | ||
1008 | return revmap[hwirq]; | |
c6622f63 PM |
1009 | } |
1010 | ||
0ebfff14 BH |
1011 | unsigned int irq_alloc_virt(struct irq_host *host, |
1012 | unsigned int count, | |
1013 | unsigned int hint) | |
1014 | { | |
1015 | unsigned long flags; | |
1016 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 1017 | |
0ebfff14 BH |
1018 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
1019 | return NO_IRQ; | |
1020 | ||
f95e085b | 1021 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1022 | |
1023 | /* Use hint for 1 interrupt if any */ | |
1024 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
1025 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
1026 | found = hint; | |
1027 | goto hint_found; | |
1028 | } | |
1029 | ||
1030 | /* Look for count consecutive numbers in the allocatable | |
1031 | * (non-legacy) space | |
1032 | */ | |
e1251465 ME |
1033 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
1034 | if (irq_map[i].host != NULL) | |
1035 | j = 0; | |
1036 | else | |
1037 | j++; | |
1038 | ||
1039 | if (j == count) { | |
1040 | found = i - count + 1; | |
1041 | break; | |
1042 | } | |
0ebfff14 BH |
1043 | } |
1044 | if (found == NO_IRQ) { | |
f95e085b | 1045 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1046 | return NO_IRQ; |
1047 | } | |
1048 | hint_found: | |
1049 | for (i = found; i < (found + count); i++) { | |
1050 | irq_map[i].hwirq = host->inval_irq; | |
1051 | smp_wmb(); | |
1052 | irq_map[i].host = host; | |
1053 | } | |
f95e085b | 1054 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1055 | return found; |
1056 | } | |
1057 | ||
1058 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1059 | { |
1060 | unsigned long flags; | |
0ebfff14 | 1061 | unsigned int i; |
1da177e4 | 1062 | |
0ebfff14 BH |
1063 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1064 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1065 | |
f95e085b | 1066 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1067 | for (i = virq; i < (virq + count); i++) { |
1068 | struct irq_host *host; | |
1da177e4 | 1069 | |
0ebfff14 BH |
1070 | if (i < NUM_ISA_INTERRUPTS || |
1071 | (virq + count) > irq_virq_count) | |
1072 | continue; | |
1da177e4 | 1073 | |
0ebfff14 BH |
1074 | host = irq_map[i].host; |
1075 | irq_map[i].hwirq = host->inval_irq; | |
1076 | smp_wmb(); | |
1077 | irq_map[i].host = NULL; | |
1078 | } | |
f95e085b | 1079 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
1da177e4 | 1080 | } |
0ebfff14 | 1081 | |
cd015707 | 1082 | int arch_early_irq_init(void) |
0ebfff14 | 1083 | { |
cd015707 | 1084 | return 0; |
0ebfff14 BH |
1085 | } |
1086 | ||
1087 | /* We need to create the radix trees late */ | |
1088 | static int irq_late_init(void) | |
1089 | { | |
1090 | struct irq_host *h; | |
967e012e | 1091 | unsigned int i; |
0ebfff14 | 1092 | |
967e012e SD |
1093 | /* |
1094 | * No mutual exclusion with respect to accessors of the tree is needed | |
1095 | * here as the synchronization is done via the state variable | |
1096 | * revmap_trees_allocated. | |
1097 | */ | |
0ebfff14 BH |
1098 | list_for_each_entry(h, &irq_hosts, link) { |
1099 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1100 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1101 | } | |
1102 | ||
1103 | /* | |
1104 | * Make sure the radix trees inits are visible before setting | |
1105 | * the flag | |
1106 | */ | |
1107 | smp_wmb(); | |
1108 | revmap_trees_allocated = 1; | |
1109 | ||
1110 | /* | |
1111 | * Insert the reverse mapping for those interrupts already present | |
1112 | * in irq_map[]. | |
1113 | */ | |
150c6c8f | 1114 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1115 | for (i = 0; i < irq_virq_count; i++) { |
1116 | if (irq_map[i].host && | |
1117 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1118 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1119 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1120 | } |
150c6c8f | 1121 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1122 | |
967e012e SD |
1123 | /* |
1124 | * Make sure the radix trees insertions are visible before setting | |
1125 | * the flag | |
1126 | */ | |
1127 | smp_wmb(); | |
1128 | revmap_trees_allocated = 2; | |
1129 | ||
0ebfff14 BH |
1130 | return 0; |
1131 | } | |
1132 | arch_initcall(irq_late_init); | |
1133 | ||
60b332e7 ME |
1134 | #ifdef CONFIG_VIRQ_DEBUG |
1135 | static int virq_debug_show(struct seq_file *m, void *private) | |
1136 | { | |
1137 | unsigned long flags; | |
97f7d6bc | 1138 | struct irq_desc *desc; |
60b332e7 | 1139 | const char *p; |
4e74fd7d | 1140 | static const char none[] = "none"; |
60b332e7 ME |
1141 | int i; |
1142 | ||
1143 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1144 | "chip name", "host name"); | |
1145 | ||
76f1d94f | 1146 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1147 | desc = irq_to_desc(i); |
76f1d94f ME |
1148 | if (!desc) |
1149 | continue; | |
1150 | ||
239007b8 | 1151 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1152 | |
1153 | if (desc->action && desc->action->handler) { | |
e1180287 LB |
1154 | struct irq_chip *chip; |
1155 | ||
60b332e7 ME |
1156 | seq_printf(m, "%5d ", i); |
1157 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1158 | ||
e1180287 LB |
1159 | chip = get_irq_desc_chip(desc); |
1160 | if (chip && chip->name) | |
1161 | p = chip->name; | |
60b332e7 ME |
1162 | else |
1163 | p = none; | |
1164 | seq_printf(m, "%-15s ", p); | |
1165 | ||
1166 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1167 | p = irq_map[i].host->of_node->full_name; | |
1168 | else | |
1169 | p = none; | |
1170 | seq_printf(m, "%s\n", p); | |
1171 | } | |
1172 | ||
239007b8 | 1173 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1174 | } |
1175 | ||
1176 | return 0; | |
1177 | } | |
1178 | ||
1179 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1180 | { | |
1181 | return single_open(file, virq_debug_show, inode->i_private); | |
1182 | } | |
1183 | ||
1184 | static const struct file_operations virq_debug_fops = { | |
1185 | .open = virq_debug_open, | |
1186 | .read = seq_read, | |
1187 | .llseek = seq_lseek, | |
1188 | .release = single_release, | |
1189 | }; | |
1190 | ||
1191 | static int __init irq_debugfs_init(void) | |
1192 | { | |
1193 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1194 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1195 | return -ENOMEM; |
1196 | ||
1197 | return 0; | |
1198 | } | |
1199 | __initcall(irq_debugfs_init); | |
1200 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1201 | ||
c6622f63 | 1202 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1203 | static int __init setup_noirqdistrib(char *str) |
1204 | { | |
1205 | distribute_irqs = 0; | |
1206 | return 1; | |
1207 | } | |
1208 | ||
1209 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1210 | #endif /* CONFIG_PPC64 */ |