Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
e3873444 GL |
56 | #include <linux/of.h> |
57 | #include <linux/of_irq.h> | |
1da177e4 LT |
58 | |
59 | #include <asm/uaccess.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/io.h> | |
62 | #include <asm/pgtable.h> | |
63 | #include <asm/irq.h> | |
64 | #include <asm/cache.h> | |
65 | #include <asm/prom.h> | |
66 | #include <asm/ptrace.h> | |
1da177e4 | 67 | #include <asm/machdep.h> |
0ebfff14 | 68 | #include <asm/udbg.h> |
89c81797 | 69 | #include <asm/dbell.h> |
3e7f45ad | 70 | #include <asm/smp.h> |
89c81797 | 71 | |
d04c56f7 | 72 | #ifdef CONFIG_PPC64 |
1da177e4 | 73 | #include <asm/paca.h> |
d04c56f7 | 74 | #include <asm/firmware.h> |
0874dd40 | 75 | #include <asm/lv1call.h> |
756e7104 | 76 | #endif |
1bf4af16 AB |
77 | #define CREATE_TRACE_POINTS |
78 | #include <asm/trace.h> | |
1da177e4 | 79 | |
8c007bfd AB |
80 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
81 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
82 | ||
868accb7 | 83 | int __irq_offset_value; |
756e7104 | 84 | |
756e7104 | 85 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
86 | EXPORT_SYMBOL(__irq_offset_value); |
87 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 88 | |
756e7104 SR |
89 | #ifdef CONFIG_TAU_INT |
90 | extern int tau_initialized; | |
91 | extern int tau_interrupts(int); | |
92 | #endif | |
b9e5b4e6 | 93 | #endif /* CONFIG_PPC32 */ |
756e7104 | 94 | |
756e7104 | 95 | #ifdef CONFIG_PPC64 |
cd015707 ME |
96 | |
97 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 98 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 99 | #endif |
1da177e4 LT |
100 | |
101 | int distribute_irqs = 1; | |
d04c56f7 | 102 | |
4e491d14 | 103 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
104 | { |
105 | unsigned long enabled; | |
106 | ||
107 | __asm__ __volatile__("lbz %0,%1(13)" | |
108 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
109 | ||
110 | return enabled; | |
111 | } | |
112 | ||
4e491d14 | 113 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
114 | { |
115 | __asm__ __volatile__("stb %0,%1(13)" | |
116 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
117 | } | |
118 | ||
df9ee292 | 119 | notrace void arch_local_irq_restore(unsigned long en) |
d04c56f7 | 120 | { |
ef2b343e HD |
121 | /* |
122 | * get_paca()->soft_enabled = en; | |
123 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
124 | * That was allowed before, and in such a case we do need to take care | |
125 | * that gcc will set soft_enabled directly via r13, not choose to use | |
126 | * an intermediate register, lest we're preempted to a different cpu. | |
127 | */ | |
128 | set_soft_enabled(en); | |
d04c56f7 PM |
129 | if (!en) |
130 | return; | |
131 | ||
94491685 | 132 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 133 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
134 | /* |
135 | * Do we need to disable preemption here? Not really: in the | |
136 | * unlikely event that we're preempted to a different cpu in | |
137 | * between getting r13, loading its lppaca_ptr, and loading | |
138 | * its any_int, we might call iseries_handle_interrupts without | |
139 | * an interrupt pending on the new cpu, but that's no disaster, | |
140 | * is it? And the business of preempting us off the old cpu | |
141 | * would itself involve a local_irq_restore which handles the | |
142 | * interrupt to that cpu. | |
143 | * | |
144 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
145 | * to avoid any preemption checking added into get_paca(). | |
146 | */ | |
147 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 148 | iseries_handle_interrupts(); |
d04c56f7 | 149 | } |
94491685 | 150 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 151 | |
ef2b343e HD |
152 | /* |
153 | * if (get_paca()->hard_enabled) return; | |
154 | * But again we need to take care that gcc gets hard_enabled directly | |
155 | * via r13, not choose to use an intermediate register, lest we're | |
156 | * preempted to a different cpu in between the two instructions. | |
157 | */ | |
158 | if (get_hard_enabled()) | |
d04c56f7 | 159 | return; |
ef2b343e | 160 | |
89c81797 | 161 | #if defined(CONFIG_BOOKE) && defined(CONFIG_SMP) |
850f22d5 ME |
162 | /* Check for pending doorbell interrupts and resend to ourself */ |
163 | doorbell_check_self(); | |
89c81797 BH |
164 | #endif |
165 | ||
ef2b343e HD |
166 | /* |
167 | * Need to hard-enable interrupts here. Since currently disabled, | |
168 | * no need to take further asm precautions against preemption; but | |
169 | * use local_paca instead of get_paca() to avoid preemption checking. | |
170 | */ | |
171 | local_paca->hard_enabled = en; | |
e8775d4a BH |
172 | |
173 | #ifndef CONFIG_BOOKE | |
174 | /* On server, re-trigger the decrementer if it went negative since | |
175 | * some processors only trigger on edge transitions of the sign bit. | |
176 | * | |
177 | * BookE has a level sensitive decrementer (latches in TSR) so we | |
178 | * don't need that | |
179 | */ | |
d04c56f7 PM |
180 | if ((int)mfspr(SPRN_DEC) < 0) |
181 | mtspr(SPRN_DEC, 1); | |
e8775d4a | 182 | #endif /* CONFIG_BOOKE */ |
0874dd40 TS |
183 | |
184 | /* | |
185 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
186 | * Any HV call will have this side effect. | |
187 | */ | |
188 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
189 | u64 tmp; | |
190 | lv1_get_version_info(&tmp); | |
191 | } | |
192 | ||
e1fa2e13 | 193 | __hard_irq_enable(); |
d04c56f7 | 194 | } |
df9ee292 | 195 | EXPORT_SYMBOL(arch_local_irq_restore); |
756e7104 | 196 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 197 | |
c86845ed AB |
198 | static int show_other_interrupts(struct seq_file *p, int prec) |
199 | { | |
200 | int j; | |
201 | ||
202 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) | |
203 | if (tau_initialized) { | |
204 | seq_printf(p, "%*s: ", prec, "TAU"); | |
205 | for_each_online_cpu(j) | |
206 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
207 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
208 | } | |
209 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */ | |
210 | ||
89713ed1 AB |
211 | seq_printf(p, "%*s: ", prec, "LOC"); |
212 | for_each_online_cpu(j) | |
213 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs); | |
214 | seq_printf(p, " Local timer interrupts\n"); | |
215 | ||
17081102 AB |
216 | seq_printf(p, "%*s: ", prec, "SPU"); |
217 | for_each_online_cpu(j) | |
218 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); | |
219 | seq_printf(p, " Spurious interrupts\n"); | |
220 | ||
89713ed1 AB |
221 | seq_printf(p, "%*s: ", prec, "CNT"); |
222 | for_each_online_cpu(j) | |
223 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); | |
224 | seq_printf(p, " Performance monitoring interrupts\n"); | |
225 | ||
226 | seq_printf(p, "%*s: ", prec, "MCE"); | |
227 | for_each_online_cpu(j) | |
228 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions); | |
229 | seq_printf(p, " Machine check exceptions\n"); | |
230 | ||
c86845ed AB |
231 | return 0; |
232 | } | |
233 | ||
1da177e4 LT |
234 | int show_interrupts(struct seq_file *p, void *v) |
235 | { | |
c86845ed AB |
236 | unsigned long flags, any_count = 0; |
237 | int i = *(loff_t *) v, j, prec; | |
756e7104 | 238 | struct irqaction *action; |
97f7d6bc | 239 | struct irq_desc *desc; |
1da177e4 | 240 | |
c86845ed AB |
241 | if (i > nr_irqs) |
242 | return 0; | |
243 | ||
244 | for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec) | |
245 | j *= 10; | |
246 | ||
247 | if (i == nr_irqs) | |
248 | return show_other_interrupts(p, prec); | |
249 | ||
250 | /* print header */ | |
1da177e4 | 251 | if (i == 0) { |
c86845ed | 252 | seq_printf(p, "%*s", prec + 8, ""); |
756e7104 | 253 | for_each_online_cpu(j) |
c86845ed | 254 | seq_printf(p, "CPU%-8d", j); |
1da177e4 | 255 | seq_putc(p, '\n'); |
756e7104 | 256 | } |
750ab112 ME |
257 | |
258 | desc = irq_to_desc(i); | |
259 | if (!desc) | |
260 | return 0; | |
261 | ||
239007b8 | 262 | raw_spin_lock_irqsave(&desc->lock, flags); |
c86845ed AB |
263 | for_each_online_cpu(j) |
264 | any_count |= kstat_irqs_cpu(i, j); | |
750ab112 | 265 | action = desc->action; |
c86845ed AB |
266 | if (!action && !any_count) |
267 | goto out; | |
750ab112 | 268 | |
c86845ed | 269 | seq_printf(p, "%*d: ", prec, i); |
750ab112 ME |
270 | for_each_online_cpu(j) |
271 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
750ab112 ME |
272 | |
273 | if (desc->chip) | |
c86845ed | 274 | seq_printf(p, " %-16s", desc->chip->name); |
750ab112 | 275 | else |
c86845ed AB |
276 | seq_printf(p, " %-16s", "None"); |
277 | seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge"); | |
750ab112 | 278 | |
c86845ed AB |
279 | if (action) { |
280 | seq_printf(p, " %s", action->name); | |
281 | while ((action = action->next) != NULL) | |
282 | seq_printf(p, ", %s", action->name); | |
283 | } | |
750ab112 | 284 | |
750ab112 | 285 | seq_putc(p, '\n'); |
c86845ed | 286 | out: |
239007b8 | 287 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
288 | return 0; |
289 | } | |
290 | ||
89713ed1 AB |
291 | /* |
292 | * /proc/stat helpers | |
293 | */ | |
294 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
295 | { | |
296 | u64 sum = per_cpu(irq_stat, cpu).timer_irqs; | |
297 | ||
298 | sum += per_cpu(irq_stat, cpu).pmu_irqs; | |
299 | sum += per_cpu(irq_stat, cpu).mce_exceptions; | |
17081102 | 300 | sum += per_cpu(irq_stat, cpu).spurious_irqs; |
89713ed1 AB |
301 | |
302 | return sum; | |
303 | } | |
304 | ||
1da177e4 | 305 | #ifdef CONFIG_HOTPLUG_CPU |
b6decb70 | 306 | void fixup_irqs(const struct cpumask *map) |
1da177e4 | 307 | { |
6cff46f4 | 308 | struct irq_desc *desc; |
1da177e4 LT |
309 | unsigned int irq; |
310 | static int warned; | |
b6decb70 | 311 | cpumask_var_t mask; |
1da177e4 | 312 | |
b6decb70 | 313 | alloc_cpumask_var(&mask, GFP_KERNEL); |
1da177e4 | 314 | |
b6decb70 | 315 | for_each_irq(irq) { |
6cff46f4 | 316 | desc = irq_to_desc(irq); |
3cd85192 JB |
317 | if (!desc) |
318 | continue; | |
319 | ||
320 | if (desc->status & IRQ_PER_CPU) | |
1da177e4 LT |
321 | continue; |
322 | ||
b6decb70 AB |
323 | cpumask_and(mask, desc->affinity, map); |
324 | if (cpumask_any(mask) >= nr_cpu_ids) { | |
1da177e4 | 325 | printk("Breaking affinity for irq %i\n", irq); |
b6decb70 | 326 | cpumask_copy(mask, map); |
1da177e4 | 327 | } |
6cff46f4 | 328 | if (desc->chip->set_affinity) |
b6decb70 | 329 | desc->chip->set_affinity(irq, mask); |
6cff46f4 | 330 | else if (desc->action && !(warned++)) |
1da177e4 LT |
331 | printk("Cannot set affinity for irq %i\n", irq); |
332 | } | |
333 | ||
b6decb70 AB |
334 | free_cpumask_var(mask); |
335 | ||
1da177e4 LT |
336 | local_irq_enable(); |
337 | mdelay(1); | |
338 | local_irq_disable(); | |
339 | } | |
340 | #endif | |
341 | ||
f2694ba5 ME |
342 | static inline void handle_one_irq(unsigned int irq) |
343 | { | |
344 | struct thread_info *curtp, *irqtp; | |
345 | unsigned long saved_sp_limit; | |
346 | struct irq_desc *desc; | |
f2694ba5 ME |
347 | |
348 | /* Switch to the irq stack to handle this */ | |
349 | curtp = current_thread_info(); | |
350 | irqtp = hardirq_ctx[smp_processor_id()]; | |
351 | ||
352 | if (curtp == irqtp) { | |
353 | /* We're already on the irq stack, just handle it */ | |
354 | generic_handle_irq(irq); | |
355 | return; | |
356 | } | |
357 | ||
6cff46f4 | 358 | desc = irq_to_desc(irq); |
f2694ba5 ME |
359 | saved_sp_limit = current->thread.ksp_limit; |
360 | ||
f2694ba5 ME |
361 | irqtp->task = curtp->task; |
362 | irqtp->flags = 0; | |
363 | ||
364 | /* Copy the softirq bits in preempt_count so that the | |
365 | * softirq checks work in the hardirq context. */ | |
366 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
367 | (curtp->preempt_count & SOFTIRQ_MASK); | |
368 | ||
369 | current->thread.ksp_limit = (unsigned long)irqtp + | |
370 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
371 | ||
835363e6 | 372 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
373 | current->thread.ksp_limit = saved_sp_limit; |
374 | irqtp->task = NULL; | |
375 | ||
376 | /* Set any flag that may have been set on the | |
377 | * alternate stack | |
378 | */ | |
379 | if (irqtp->flags) | |
380 | set_bits(irqtp->flags, &curtp->flags); | |
381 | } | |
f2694ba5 | 382 | |
d7cb10d6 ME |
383 | static inline void check_stack_overflow(void) |
384 | { | |
385 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
386 | long sp; | |
387 | ||
388 | sp = __get_SP() & (THREAD_SIZE-1); | |
389 | ||
390 | /* check for stack overflow: is there less than 2KB free? */ | |
391 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
392 | printk("do_IRQ: stack overflow: %ld\n", | |
393 | sp - sizeof(struct thread_info)); | |
394 | dump_stack(); | |
395 | } | |
396 | #endif | |
397 | } | |
398 | ||
1da177e4 LT |
399 | void do_IRQ(struct pt_regs *regs) |
400 | { | |
7d12e780 | 401 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 402 | unsigned int irq; |
1da177e4 | 403 | |
1bf4af16 AB |
404 | trace_irq_entry(regs); |
405 | ||
4b218e9b | 406 | irq_enter(); |
1da177e4 | 407 | |
d7cb10d6 | 408 | check_stack_overflow(); |
1da177e4 | 409 | |
35a84c2f | 410 | irq = ppc_md.get_irq(); |
1da177e4 | 411 | |
f2694ba5 ME |
412 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
413 | handle_one_irq(irq); | |
414 | else if (irq != NO_IRQ_IGNORE) | |
17081102 | 415 | __get_cpu_var(irq_stat).spurious_irqs++; |
e199500c | 416 | |
4b218e9b | 417 | irq_exit(); |
7d12e780 | 418 | set_irq_regs(old_regs); |
756e7104 | 419 | |
e199500c | 420 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
421 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
422 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
423 | get_lppaca()->int_dword.fields.decr_int = 0; |
424 | /* Signal a fake decrementer interrupt */ | |
425 | timer_interrupt(regs); | |
e199500c SR |
426 | } |
427 | #endif | |
1bf4af16 AB |
428 | |
429 | trace_irq_exit(regs); | |
e199500c | 430 | } |
1da177e4 LT |
431 | |
432 | void __init init_IRQ(void) | |
433 | { | |
70584578 SR |
434 | if (ppc_md.init_IRQ) |
435 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
436 | |
437 | exc_lvl_ctx_init(); | |
438 | ||
1da177e4 LT |
439 | irq_ctx_init(); |
440 | } | |
441 | ||
bcf0b088 KG |
442 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
443 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
444 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
445 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
446 | ||
447 | void exc_lvl_ctx_init(void) | |
448 | { | |
449 | struct thread_info *tp; | |
3e7f45ad | 450 | int i, hw_cpu; |
bcf0b088 KG |
451 | |
452 | for_each_possible_cpu(i) { | |
3e7f45ad DK |
453 | hw_cpu = get_hard_smp_processor_id(i); |
454 | memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE); | |
455 | tp = critirq_ctx[hw_cpu]; | |
bcf0b088 KG |
456 | tp->cpu = i; |
457 | tp->preempt_count = 0; | |
458 | ||
459 | #ifdef CONFIG_BOOKE | |
3e7f45ad DK |
460 | memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE); |
461 | tp = dbgirq_ctx[hw_cpu]; | |
bcf0b088 KG |
462 | tp->cpu = i; |
463 | tp->preempt_count = 0; | |
464 | ||
3e7f45ad DK |
465 | memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE); |
466 | tp = mcheckirq_ctx[hw_cpu]; | |
bcf0b088 KG |
467 | tp->cpu = i; |
468 | tp->preempt_count = HARDIRQ_OFFSET; | |
469 | #endif | |
470 | } | |
471 | } | |
472 | #endif | |
1da177e4 | 473 | |
22722051 AM |
474 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
475 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
476 | |
477 | void irq_ctx_init(void) | |
478 | { | |
479 | struct thread_info *tp; | |
480 | int i; | |
481 | ||
0e551954 | 482 | for_each_possible_cpu(i) { |
1da177e4 LT |
483 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
484 | tp = softirq_ctx[i]; | |
485 | tp->cpu = i; | |
e6768a4f | 486 | tp->preempt_count = 0; |
1da177e4 LT |
487 | |
488 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
489 | tp = hardirq_ctx[i]; | |
490 | tp->cpu = i; | |
491 | tp->preempt_count = HARDIRQ_OFFSET; | |
492 | } | |
493 | } | |
494 | ||
c6622f63 PM |
495 | static inline void do_softirq_onstack(void) |
496 | { | |
497 | struct thread_info *curtp, *irqtp; | |
85218827 | 498 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
499 | |
500 | curtp = current_thread_info(); | |
501 | irqtp = softirq_ctx[smp_processor_id()]; | |
502 | irqtp->task = curtp->task; | |
85218827 KG |
503 | current->thread.ksp_limit = (unsigned long)irqtp + |
504 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 505 | call_do_softirq(irqtp); |
85218827 | 506 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
507 | irqtp->task = NULL; |
508 | } | |
1da177e4 | 509 | |
1da177e4 LT |
510 | void do_softirq(void) |
511 | { | |
512 | unsigned long flags; | |
1da177e4 LT |
513 | |
514 | if (in_interrupt()) | |
1da177e4 LT |
515 | return; |
516 | ||
1da177e4 | 517 | local_irq_save(flags); |
1da177e4 | 518 | |
912b2539 | 519 | if (local_softirq_pending()) |
c6622f63 | 520 | do_softirq_onstack(); |
1da177e4 LT |
521 | |
522 | local_irq_restore(flags); | |
1da177e4 | 523 | } |
1da177e4 | 524 | |
1da177e4 | 525 | |
1da177e4 | 526 | /* |
0ebfff14 | 527 | * IRQ controller and virtual interrupts |
1da177e4 LT |
528 | */ |
529 | ||
0ebfff14 | 530 | static LIST_HEAD(irq_hosts); |
f95e085b | 531 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
967e012e | 532 | static unsigned int revmap_trees_allocated; |
150c6c8f | 533 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
534 | struct irq_map_entry irq_map[NR_IRQS]; |
535 | static unsigned int irq_virq_count = NR_IRQS; | |
536 | static struct irq_host *irq_default_host; | |
1da177e4 | 537 | |
35923f12 OJ |
538 | irq_hw_number_t virq_to_hw(unsigned int virq) |
539 | { | |
540 | return irq_map[virq].hwirq; | |
541 | } | |
542 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
543 | ||
68158006 ME |
544 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
545 | { | |
546 | return h->of_node != NULL && h->of_node == np; | |
547 | } | |
548 | ||
5669c3cf | 549 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
550 | unsigned int revmap_type, |
551 | unsigned int revmap_arg, | |
552 | struct irq_host_ops *ops, | |
553 | irq_hw_number_t inval_irq) | |
1da177e4 | 554 | { |
0ebfff14 BH |
555 | struct irq_host *host; |
556 | unsigned int size = sizeof(struct irq_host); | |
557 | unsigned int i; | |
558 | unsigned int *rmap; | |
559 | unsigned long flags; | |
560 | ||
561 | /* Allocate structure and revmap table if using linear mapping */ | |
562 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
563 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 564 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
565 | if (host == NULL) |
566 | return NULL; | |
7d01c880 | 567 | |
0ebfff14 BH |
568 | /* Fill structure */ |
569 | host->revmap_type = revmap_type; | |
570 | host->inval_irq = inval_irq; | |
571 | host->ops = ops; | |
19fc65b5 | 572 | host->of_node = of_node_get(of_node); |
7d01c880 | 573 | |
68158006 ME |
574 | if (host->ops->match == NULL) |
575 | host->ops->match = default_irq_host_match; | |
7d01c880 | 576 | |
f95e085b | 577 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
578 | |
579 | /* If it's a legacy controller, check for duplicates and | |
580 | * mark it as allocated (we use irq 0 host pointer for that | |
581 | */ | |
582 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
583 | if (irq_map[0].host != NULL) { | |
f95e085b | 584 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
585 | /* If we are early boot, we can't free the structure, |
586 | * too bad... | |
587 | * this will be fixed once slab is made available early | |
588 | * instead of the current cruft | |
589 | */ | |
a655237f JL |
590 | if (mem_init_done) { |
591 | of_node_put(host->of_node); | |
0ebfff14 | 592 | kfree(host); |
a655237f | 593 | } |
0ebfff14 BH |
594 | return NULL; |
595 | } | |
596 | irq_map[0].host = host; | |
597 | } | |
598 | ||
599 | list_add(&host->link, &irq_hosts); | |
f95e085b | 600 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
601 | |
602 | /* Additional setups per revmap type */ | |
603 | switch(revmap_type) { | |
604 | case IRQ_HOST_MAP_LEGACY: | |
605 | /* 0 is always the invalid number for legacy */ | |
606 | host->inval_irq = 0; | |
607 | /* setup us as the host for all legacy interrupts */ | |
608 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 609 | irq_map[i].hwirq = i; |
0ebfff14 BH |
610 | smp_wmb(); |
611 | irq_map[i].host = host; | |
612 | smp_wmb(); | |
613 | ||
6e99e458 | 614 | /* Clear norequest flags */ |
6cff46f4 | 615 | irq_to_desc(i)->status &= ~IRQ_NOREQUEST; |
0ebfff14 BH |
616 | |
617 | /* Legacy flags are left to default at this point, | |
618 | * one can then use irq_create_mapping() to | |
c03983ac | 619 | * explicitly change them |
0ebfff14 | 620 | */ |
6e99e458 | 621 | ops->map(host, i, i); |
0ebfff14 BH |
622 | } |
623 | break; | |
624 | case IRQ_HOST_MAP_LINEAR: | |
625 | rmap = (unsigned int *)(host + 1); | |
626 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 627 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
628 | host->revmap_data.linear.size = revmap_arg; |
629 | smp_wmb(); | |
630 | host->revmap_data.linear.revmap = rmap; | |
631 | break; | |
632 | default: | |
633 | break; | |
634 | } | |
635 | ||
636 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
637 | ||
638 | return host; | |
1da177e4 LT |
639 | } |
640 | ||
0ebfff14 | 641 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 642 | { |
0ebfff14 BH |
643 | struct irq_host *h, *found = NULL; |
644 | unsigned long flags; | |
645 | ||
646 | /* We might want to match the legacy controller last since | |
647 | * it might potentially be set to match all interrupts in | |
648 | * the absence of a device node. This isn't a problem so far | |
649 | * yet though... | |
650 | */ | |
f95e085b | 651 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 | 652 | list_for_each_entry(h, &irq_hosts, link) |
68158006 | 653 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
654 | found = h; |
655 | break; | |
656 | } | |
f95e085b | 657 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
658 | return found; |
659 | } | |
660 | EXPORT_SYMBOL_GPL(irq_find_host); | |
661 | ||
662 | void irq_set_default_host(struct irq_host *host) | |
663 | { | |
664 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 665 | |
0ebfff14 BH |
666 | irq_default_host = host; |
667 | } | |
1da177e4 | 668 | |
0ebfff14 BH |
669 | void irq_set_virq_count(unsigned int count) |
670 | { | |
671 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 672 | |
0ebfff14 BH |
673 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
674 | if (count < NR_IRQS) | |
675 | irq_virq_count = count; | |
676 | } | |
677 | ||
6fde40f3 ME |
678 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
679 | irq_hw_number_t hwirq) | |
680 | { | |
cd015707 ME |
681 | struct irq_desc *desc; |
682 | ||
683 | desc = irq_to_desc_alloc_node(virq, 0); | |
684 | if (!desc) { | |
685 | pr_debug("irq: -> allocating desc failed\n"); | |
686 | goto error; | |
687 | } | |
688 | ||
6fde40f3 | 689 | /* Clear IRQ_NOREQUEST flag */ |
cd015707 | 690 | desc->status &= ~IRQ_NOREQUEST; |
6fde40f3 ME |
691 | |
692 | /* map it */ | |
693 | smp_wmb(); | |
694 | irq_map[virq].hwirq = hwirq; | |
695 | smp_mb(); | |
696 | ||
697 | if (host->ops->map(host, virq, hwirq)) { | |
698 | pr_debug("irq: -> mapping failed, freeing\n"); | |
cd015707 | 699 | goto error; |
6fde40f3 ME |
700 | } |
701 | ||
702 | return 0; | |
cd015707 ME |
703 | |
704 | error: | |
705 | irq_free_virt(virq, 1); | |
706 | return -1; | |
6fde40f3 | 707 | } |
8ec8f2e8 | 708 | |
ee51de56 ME |
709 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
710 | { | |
711 | unsigned int virq; | |
712 | ||
713 | if (host == NULL) | |
714 | host = irq_default_host; | |
715 | ||
716 | BUG_ON(host == NULL); | |
717 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
718 | ||
719 | virq = irq_alloc_virt(host, 1, 0); | |
720 | if (virq == NO_IRQ) { | |
721 | pr_debug("irq: create_direct virq allocation failed\n"); | |
722 | return NO_IRQ; | |
723 | } | |
724 | ||
725 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
726 | ||
727 | if (irq_setup_virq(host, virq, virq)) | |
728 | return NO_IRQ; | |
729 | ||
730 | return virq; | |
731 | } | |
732 | ||
0ebfff14 | 733 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 734 | irq_hw_number_t hwirq) |
0ebfff14 BH |
735 | { |
736 | unsigned int virq, hint; | |
737 | ||
6e99e458 | 738 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
739 | |
740 | /* Look for default host if nececssary */ | |
741 | if (host == NULL) | |
742 | host = irq_default_host; | |
743 | if (host == NULL) { | |
744 | printk(KERN_WARNING "irq_create_mapping called for" | |
745 | " NULL host, hwirq=%lx\n", hwirq); | |
746 | WARN_ON(1); | |
747 | return NO_IRQ; | |
1da177e4 | 748 | } |
0ebfff14 | 749 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 750 | |
0ebfff14 BH |
751 | /* Check if mapping already exist, if it does, call |
752 | * host->ops->map() to update the flags | |
753 | */ | |
754 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 755 | if (virq != NO_IRQ) { |
acc900ef IK |
756 | if (host->ops->remap) |
757 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 758 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 759 | return virq; |
1da177e4 LT |
760 | } |
761 | ||
0ebfff14 BH |
762 | /* Get a virtual interrupt number */ |
763 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
764 | /* Handle legacy */ | |
765 | virq = (unsigned int)hwirq; | |
766 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
767 | return NO_IRQ; | |
768 | return virq; | |
769 | } else { | |
770 | /* Allocate a virtual interrupt number */ | |
771 | hint = hwirq % irq_virq_count; | |
772 | virq = irq_alloc_virt(host, 1, hint); | |
773 | if (virq == NO_IRQ) { | |
774 | pr_debug("irq: -> virq allocation failed\n"); | |
775 | return NO_IRQ; | |
776 | } | |
777 | } | |
0ebfff14 | 778 | |
6fde40f3 | 779 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 780 | return NO_IRQ; |
6fde40f3 | 781 | |
c7d07fdd ME |
782 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
783 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
784 | ||
1da177e4 | 785 | return virq; |
0ebfff14 BH |
786 | } |
787 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
788 | ||
f3d2ab41 | 789 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 790 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
791 | { |
792 | struct irq_host *host; | |
793 | irq_hw_number_t hwirq; | |
6e99e458 BH |
794 | unsigned int type = IRQ_TYPE_NONE; |
795 | unsigned int virq; | |
1da177e4 | 796 | |
0ebfff14 BH |
797 | if (controller == NULL) |
798 | host = irq_default_host; | |
799 | else | |
800 | host = irq_find_host(controller); | |
6e99e458 BH |
801 | if (host == NULL) { |
802 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
803 | controller->full_name); | |
0ebfff14 | 804 | return NO_IRQ; |
6e99e458 | 805 | } |
0ebfff14 BH |
806 | |
807 | /* If host has no translation, then we assume interrupt line */ | |
808 | if (host->ops->xlate == NULL) | |
809 | hwirq = intspec[0]; | |
810 | else { | |
811 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 812 | &hwirq, &type)) |
0ebfff14 | 813 | return NO_IRQ; |
1da177e4 | 814 | } |
0ebfff14 | 815 | |
6e99e458 BH |
816 | /* Create mapping */ |
817 | virq = irq_create_mapping(host, hwirq); | |
818 | if (virq == NO_IRQ) | |
819 | return virq; | |
820 | ||
821 | /* Set type if specified and different than the current one */ | |
822 | if (type != IRQ_TYPE_NONE && | |
6cff46f4 | 823 | type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) |
6e99e458 BH |
824 | set_irq_type(virq, type); |
825 | return virq; | |
1da177e4 | 826 | } |
0ebfff14 | 827 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 828 | |
0ebfff14 BH |
829 | void irq_dispose_mapping(unsigned int virq) |
830 | { | |
5414c6be | 831 | struct irq_host *host; |
0ebfff14 | 832 | irq_hw_number_t hwirq; |
1da177e4 | 833 | |
5414c6be ME |
834 | if (virq == NO_IRQ) |
835 | return; | |
836 | ||
837 | host = irq_map[virq].host; | |
0ebfff14 BH |
838 | WARN_ON (host == NULL); |
839 | if (host == NULL) | |
840 | return; | |
1da177e4 | 841 | |
0ebfff14 BH |
842 | /* Never unmap legacy interrupts */ |
843 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
844 | return; | |
1da177e4 | 845 | |
0ebfff14 BH |
846 | /* remove chip and handler */ |
847 | set_irq_chip_and_handler(virq, NULL, NULL); | |
848 | ||
849 | /* Make sure it's completed */ | |
850 | synchronize_irq(virq); | |
851 | ||
852 | /* Tell the PIC about it */ | |
853 | if (host->ops->unmap) | |
854 | host->ops->unmap(host, virq); | |
855 | smp_mb(); | |
856 | ||
857 | /* Clear reverse map */ | |
858 | hwirq = irq_map[virq].hwirq; | |
859 | switch(host->revmap_type) { | |
860 | case IRQ_HOST_MAP_LINEAR: | |
861 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 862 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
863 | break; |
864 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
865 | /* |
866 | * Check if radix tree allocated yet, if not then nothing to | |
867 | * remove. | |
868 | */ | |
869 | smp_rmb(); | |
870 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 871 | break; |
150c6c8f | 872 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 873 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 874 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
875 | break; |
876 | } | |
1da177e4 | 877 | |
0ebfff14 BH |
878 | /* Destroy map */ |
879 | smp_mb(); | |
880 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 881 | |
0ebfff14 | 882 | /* Set some flags */ |
6cff46f4 | 883 | irq_to_desc(virq)->status |= IRQ_NOREQUEST; |
1da177e4 | 884 | |
0ebfff14 BH |
885 | /* Free it */ |
886 | irq_free_virt(virq, 1); | |
1da177e4 | 887 | } |
0ebfff14 | 888 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 889 | |
0ebfff14 BH |
890 | unsigned int irq_find_mapping(struct irq_host *host, |
891 | irq_hw_number_t hwirq) | |
892 | { | |
893 | unsigned int i; | |
894 | unsigned int hint = hwirq % irq_virq_count; | |
895 | ||
896 | /* Look for default host if nececssary */ | |
897 | if (host == NULL) | |
898 | host = irq_default_host; | |
899 | if (host == NULL) | |
900 | return NO_IRQ; | |
901 | ||
902 | /* legacy -> bail early */ | |
903 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
904 | return hwirq; | |
905 | ||
906 | /* Slow path does a linear search of the map */ | |
907 | if (hint < NUM_ISA_INTERRUPTS) | |
908 | hint = NUM_ISA_INTERRUPTS; | |
909 | i = hint; | |
910 | do { | |
911 | if (irq_map[i].host == host && | |
912 | irq_map[i].hwirq == hwirq) | |
913 | return i; | |
914 | i++; | |
915 | if (i >= irq_virq_count) | |
916 | i = NUM_ISA_INTERRUPTS; | |
917 | } while(i != hint); | |
918 | return NO_IRQ; | |
919 | } | |
920 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 921 | |
0ebfff14 | 922 | |
967e012e SD |
923 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
924 | irq_hw_number_t hwirq) | |
1da177e4 | 925 | { |
0ebfff14 BH |
926 | struct irq_map_entry *ptr; |
927 | unsigned int virq; | |
1da177e4 | 928 | |
0ebfff14 | 929 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 930 | |
967e012e SD |
931 | /* |
932 | * Check if the radix tree exists and has bee initialized. | |
933 | * If not, we fallback to slow mode | |
0ebfff14 | 934 | */ |
967e012e | 935 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
936 | return irq_find_mapping(host, hwirq); |
937 | ||
0ebfff14 | 938 | /* Now try to resolve */ |
150c6c8f SD |
939 | /* |
940 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
941 | * as it's referencing an entry in the static irq_map table. | |
942 | */ | |
967e012e | 943 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 944 | |
967e012e SD |
945 | /* |
946 | * If found in radix tree, then fine. | |
947 | * Else fallback to linear lookup - this should not happen in practice | |
948 | * as it means that we failed to insert the node in the radix tree. | |
949 | */ | |
950 | if (ptr) | |
0ebfff14 | 951 | virq = ptr - irq_map; |
967e012e SD |
952 | else |
953 | virq = irq_find_mapping(host, hwirq); | |
954 | ||
955 | return virq; | |
956 | } | |
957 | ||
958 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
959 | irq_hw_number_t hwirq) | |
960 | { | |
967e012e SD |
961 | |
962 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
963 | ||
964 | /* | |
965 | * Check if the radix tree exists yet. | |
966 | * If not, then the irq will be inserted into the tree when it gets | |
967 | * initialized. | |
968 | */ | |
969 | smp_rmb(); | |
970 | if (revmap_trees_allocated < 1) | |
971 | return; | |
0ebfff14 | 972 | |
8ec8f2e8 | 973 | if (virq != NO_IRQ) { |
150c6c8f | 974 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
975 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
976 | &irq_map[virq]); | |
150c6c8f | 977 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 978 | } |
1da177e4 LT |
979 | } |
980 | ||
0ebfff14 BH |
981 | unsigned int irq_linear_revmap(struct irq_host *host, |
982 | irq_hw_number_t hwirq) | |
c6622f63 | 983 | { |
0ebfff14 | 984 | unsigned int *revmap; |
c6622f63 | 985 | |
0ebfff14 BH |
986 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
987 | ||
988 | /* Check revmap bounds */ | |
989 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
990 | return irq_find_mapping(host, hwirq); | |
991 | ||
992 | /* Check if revmap was allocated */ | |
993 | revmap = host->revmap_data.linear.revmap; | |
994 | if (unlikely(revmap == NULL)) | |
995 | return irq_find_mapping(host, hwirq); | |
996 | ||
997 | /* Fill up revmap with slow path if no mapping found */ | |
998 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
999 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
1000 | ||
1001 | return revmap[hwirq]; | |
c6622f63 PM |
1002 | } |
1003 | ||
0ebfff14 BH |
1004 | unsigned int irq_alloc_virt(struct irq_host *host, |
1005 | unsigned int count, | |
1006 | unsigned int hint) | |
1007 | { | |
1008 | unsigned long flags; | |
1009 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 1010 | |
0ebfff14 BH |
1011 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
1012 | return NO_IRQ; | |
1013 | ||
f95e085b | 1014 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1015 | |
1016 | /* Use hint for 1 interrupt if any */ | |
1017 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
1018 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
1019 | found = hint; | |
1020 | goto hint_found; | |
1021 | } | |
1022 | ||
1023 | /* Look for count consecutive numbers in the allocatable | |
1024 | * (non-legacy) space | |
1025 | */ | |
e1251465 ME |
1026 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
1027 | if (irq_map[i].host != NULL) | |
1028 | j = 0; | |
1029 | else | |
1030 | j++; | |
1031 | ||
1032 | if (j == count) { | |
1033 | found = i - count + 1; | |
1034 | break; | |
1035 | } | |
0ebfff14 BH |
1036 | } |
1037 | if (found == NO_IRQ) { | |
f95e085b | 1038 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1039 | return NO_IRQ; |
1040 | } | |
1041 | hint_found: | |
1042 | for (i = found; i < (found + count); i++) { | |
1043 | irq_map[i].hwirq = host->inval_irq; | |
1044 | smp_wmb(); | |
1045 | irq_map[i].host = host; | |
1046 | } | |
f95e085b | 1047 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1048 | return found; |
1049 | } | |
1050 | ||
1051 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1052 | { |
1053 | unsigned long flags; | |
0ebfff14 | 1054 | unsigned int i; |
1da177e4 | 1055 | |
0ebfff14 BH |
1056 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1057 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1058 | |
f95e085b | 1059 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1060 | for (i = virq; i < (virq + count); i++) { |
1061 | struct irq_host *host; | |
1da177e4 | 1062 | |
0ebfff14 BH |
1063 | if (i < NUM_ISA_INTERRUPTS || |
1064 | (virq + count) > irq_virq_count) | |
1065 | continue; | |
1da177e4 | 1066 | |
0ebfff14 BH |
1067 | host = irq_map[i].host; |
1068 | irq_map[i].hwirq = host->inval_irq; | |
1069 | smp_wmb(); | |
1070 | irq_map[i].host = NULL; | |
1071 | } | |
f95e085b | 1072 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
1da177e4 | 1073 | } |
0ebfff14 | 1074 | |
cd015707 | 1075 | int arch_early_irq_init(void) |
0ebfff14 | 1076 | { |
cd015707 ME |
1077 | struct irq_desc *desc; |
1078 | int i; | |
0ebfff14 | 1079 | |
cd015707 ME |
1080 | for (i = 0; i < NR_IRQS; i++) { |
1081 | desc = irq_to_desc(i); | |
1082 | if (desc) | |
1083 | desc->status |= IRQ_NOREQUEST; | |
1084 | } | |
1085 | ||
1086 | return 0; | |
1087 | } | |
1088 | ||
1089 | int arch_init_chip_data(struct irq_desc *desc, int node) | |
1090 | { | |
1091 | desc->status |= IRQ_NOREQUEST; | |
1092 | return 0; | |
0ebfff14 BH |
1093 | } |
1094 | ||
1095 | /* We need to create the radix trees late */ | |
1096 | static int irq_late_init(void) | |
1097 | { | |
1098 | struct irq_host *h; | |
967e012e | 1099 | unsigned int i; |
0ebfff14 | 1100 | |
967e012e SD |
1101 | /* |
1102 | * No mutual exclusion with respect to accessors of the tree is needed | |
1103 | * here as the synchronization is done via the state variable | |
1104 | * revmap_trees_allocated. | |
1105 | */ | |
0ebfff14 BH |
1106 | list_for_each_entry(h, &irq_hosts, link) { |
1107 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1108 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1109 | } | |
1110 | ||
1111 | /* | |
1112 | * Make sure the radix trees inits are visible before setting | |
1113 | * the flag | |
1114 | */ | |
1115 | smp_wmb(); | |
1116 | revmap_trees_allocated = 1; | |
1117 | ||
1118 | /* | |
1119 | * Insert the reverse mapping for those interrupts already present | |
1120 | * in irq_map[]. | |
1121 | */ | |
150c6c8f | 1122 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1123 | for (i = 0; i < irq_virq_count; i++) { |
1124 | if (irq_map[i].host && | |
1125 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1126 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1127 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1128 | } |
150c6c8f | 1129 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1130 | |
967e012e SD |
1131 | /* |
1132 | * Make sure the radix trees insertions are visible before setting | |
1133 | * the flag | |
1134 | */ | |
1135 | smp_wmb(); | |
1136 | revmap_trees_allocated = 2; | |
1137 | ||
0ebfff14 BH |
1138 | return 0; |
1139 | } | |
1140 | arch_initcall(irq_late_init); | |
1141 | ||
60b332e7 ME |
1142 | #ifdef CONFIG_VIRQ_DEBUG |
1143 | static int virq_debug_show(struct seq_file *m, void *private) | |
1144 | { | |
1145 | unsigned long flags; | |
97f7d6bc | 1146 | struct irq_desc *desc; |
60b332e7 | 1147 | const char *p; |
4e74fd7d | 1148 | static const char none[] = "none"; |
60b332e7 ME |
1149 | int i; |
1150 | ||
1151 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1152 | "chip name", "host name"); | |
1153 | ||
76f1d94f | 1154 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1155 | desc = irq_to_desc(i); |
76f1d94f ME |
1156 | if (!desc) |
1157 | continue; | |
1158 | ||
239007b8 | 1159 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1160 | |
1161 | if (desc->action && desc->action->handler) { | |
1162 | seq_printf(m, "%5d ", i); | |
1163 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1164 | ||
b27df672 TG |
1165 | if (desc->chip && desc->chip->name) |
1166 | p = desc->chip->name; | |
60b332e7 ME |
1167 | else |
1168 | p = none; | |
1169 | seq_printf(m, "%-15s ", p); | |
1170 | ||
1171 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1172 | p = irq_map[i].host->of_node->full_name; | |
1173 | else | |
1174 | p = none; | |
1175 | seq_printf(m, "%s\n", p); | |
1176 | } | |
1177 | ||
239007b8 | 1178 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1179 | } |
1180 | ||
1181 | return 0; | |
1182 | } | |
1183 | ||
1184 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1185 | { | |
1186 | return single_open(file, virq_debug_show, inode->i_private); | |
1187 | } | |
1188 | ||
1189 | static const struct file_operations virq_debug_fops = { | |
1190 | .open = virq_debug_open, | |
1191 | .read = seq_read, | |
1192 | .llseek = seq_lseek, | |
1193 | .release = single_release, | |
1194 | }; | |
1195 | ||
1196 | static int __init irq_debugfs_init(void) | |
1197 | { | |
1198 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1199 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1200 | return -ENOMEM; |
1201 | ||
1202 | return 0; | |
1203 | } | |
1204 | __initcall(irq_debugfs_init); | |
1205 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1206 | ||
c6622f63 | 1207 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1208 | static int __init setup_noirqdistrib(char *str) |
1209 | { | |
1210 | distribute_irqs = 0; | |
1211 | return 1; | |
1212 | } | |
1213 | ||
1214 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1215 | #endif /* CONFIG_PPC64 */ |