Commit | Line | Data |
---|---|---|
e05b3b4a PM |
1 | /* |
2 | * Common pmac/prep/chrp pci routines. -- Cort | |
3 | */ | |
4 | ||
e05b3b4a PM |
5 | #include <linux/kernel.h> |
6 | #include <linux/pci.h> | |
7 | #include <linux/delay.h> | |
8 | #include <linux/string.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/capability.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/bootmem.h> | |
6e99e458 | 14 | #include <linux/irq.h> |
f90bb153 | 15 | #include <linux/list.h> |
66524b22 | 16 | #include <linux/of.h> |
5a0e3ad6 | 17 | #include <linux/slab.h> |
93087948 | 18 | #include <linux/export.h> |
e05b3b4a PM |
19 | |
20 | #include <asm/processor.h> | |
21 | #include <asm/io.h> | |
22 | #include <asm/prom.h> | |
23 | #include <asm/sections.h> | |
24 | #include <asm/pci-bridge.h> | |
c3bd517d | 25 | #include <asm/ppc-pci.h> |
e05b3b4a | 26 | #include <asm/byteorder.h> |
e05b3b4a PM |
27 | #include <asm/uaccess.h> |
28 | #include <asm/machdep.h> | |
29 | ||
30 | #undef DEBUG | |
31 | ||
e05b3b4a | 32 | unsigned long isa_io_base = 0; |
e05b3b4a PM |
33 | unsigned long pci_dram_offset = 0; |
34 | int pcibios_assign_bus_offset = 1; | |
35 | ||
36 | void pcibios_make_OF_bus_map(void); | |
37 | ||
e05b3b4a | 38 | static void fixup_cpc710_pci64(struct pci_dev* dev); |
e05b3b4a | 39 | static u8* pci_to_OF_bus_map; |
e05b3b4a PM |
40 | |
41 | /* By default, we don't re-assign bus numbers. We do this only on | |
42 | * some pmacs | |
43 | */ | |
fc3fb71c | 44 | static int pci_assign_all_buses; |
e05b3b4a | 45 | |
e05b3b4a PM |
46 | static int pci_bus_count; |
47 | ||
7b6b574c BH |
48 | /* This will remain NULL for now, until isa-bridge.c is made common |
49 | * to both 32-bit and 64-bit. | |
50 | */ | |
51 | struct pci_dev *isa_bridge_pcidev; | |
52 | EXPORT_SYMBOL_GPL(isa_bridge_pcidev); | |
53 | ||
e05b3b4a PM |
54 | static void |
55 | fixup_cpc710_pci64(struct pci_dev* dev) | |
56 | { | |
57 | /* Hide the PCI64 BARs from the kernel as their content doesn't | |
58 | * fit well in the resource management | |
59 | */ | |
60 | dev->resource[0].start = dev->resource[0].end = 0; | |
61 | dev->resource[0].flags = 0; | |
62 | dev->resource[1].start = dev->resource[1].end = 0; | |
63 | dev->resource[1].flags = 0; | |
64 | } | |
65 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); | |
66 | ||
e05b3b4a PM |
67 | /* |
68 | * Functions below are used on OpenFirmware machines. | |
69 | */ | |
70 | static void | |
71 | make_one_node_map(struct device_node* node, u8 pci_bus) | |
72 | { | |
a7f67bdf | 73 | const int *bus_range; |
e05b3b4a PM |
74 | int len; |
75 | ||
76 | if (pci_bus >= pci_bus_count) | |
77 | return; | |
e2eb6392 | 78 | bus_range = of_get_property(node, "bus-range", &len); |
e05b3b4a PM |
79 | if (bus_range == NULL || len < 2 * sizeof(int)) { |
80 | printk(KERN_WARNING "Can't get bus-range for %s, " | |
81 | "assuming it starts at 0\n", node->full_name); | |
82 | pci_to_OF_bus_map[pci_bus] = 0; | |
83 | } else | |
84 | pci_to_OF_bus_map[pci_bus] = bus_range[0]; | |
85 | ||
66524b22 | 86 | for_each_child_of_node(node, node) { |
e05b3b4a | 87 | struct pci_dev* dev; |
a7f67bdf | 88 | const unsigned int *class_code, *reg; |
e05b3b4a | 89 | |
e2eb6392 | 90 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
91 | if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
92 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) | |
93 | continue; | |
e2eb6392 | 94 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
95 | if (!reg) |
96 | continue; | |
ab462768 AC |
97 | dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff)); |
98 | if (!dev || !dev->subordinate) { | |
99 | pci_dev_put(dev); | |
e05b3b4a | 100 | continue; |
ab462768 | 101 | } |
e05b3b4a | 102 | make_one_node_map(node, dev->subordinate->number); |
ab462768 | 103 | pci_dev_put(dev); |
e05b3b4a PM |
104 | } |
105 | } | |
106 | ||
107 | void | |
108 | pcibios_make_OF_bus_map(void) | |
109 | { | |
110 | int i; | |
a4c9e328 | 111 | struct pci_controller *hose, *tmp; |
a7f67bdf | 112 | struct property *map_prop; |
8c8dc322 | 113 | struct device_node *dn; |
e05b3b4a | 114 | |
5cbded58 | 115 | pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL); |
e05b3b4a PM |
116 | if (!pci_to_OF_bus_map) { |
117 | printk(KERN_ERR "Can't allocate OF bus map !\n"); | |
118 | return; | |
119 | } | |
120 | ||
121 | /* We fill the bus map with invalid values, that helps | |
122 | * debugging. | |
123 | */ | |
124 | for (i=0; i<pci_bus_count; i++) | |
125 | pci_to_OF_bus_map[i] = 0xff; | |
126 | ||
127 | /* For each hose, we begin searching bridges */ | |
a4c9e328 | 128 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
44ef3390 SR |
129 | struct device_node* node = hose->dn; |
130 | ||
e05b3b4a PM |
131 | if (!node) |
132 | continue; | |
133 | make_one_node_map(node, hose->first_busno); | |
134 | } | |
8c8dc322 SR |
135 | dn = of_find_node_by_path("/"); |
136 | map_prop = of_find_property(dn, "pci-OF-bus-map", NULL); | |
a7f67bdf JK |
137 | if (map_prop) { |
138 | BUG_ON(pci_bus_count > map_prop->length); | |
139 | memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count); | |
140 | } | |
8c8dc322 | 141 | of_node_put(dn); |
e05b3b4a PM |
142 | #ifdef DEBUG |
143 | printk("PCI->OF bus map:\n"); | |
144 | for (i=0; i<pci_bus_count; i++) { | |
145 | if (pci_to_OF_bus_map[i] == 0xff) | |
146 | continue; | |
147 | printk("%d -> %d\n", i, pci_to_OF_bus_map[i]); | |
148 | } | |
149 | #endif | |
150 | } | |
151 | ||
e05b3b4a PM |
152 | |
153 | /* | |
154 | * Returns the PCI device matching a given OF node | |
155 | */ | |
98d9f30c | 156 | int pci_device_from_OF_node(struct device_node *node, u8 *bus, u8 *devfn) |
e05b3b4a | 157 | { |
98d9f30c BH |
158 | struct pci_dev *dev = NULL; |
159 | const __be32 *reg; | |
160 | int size; | |
161 | ||
162 | /* Check if it might have a chance to be a PCI device */ | |
163 | if (!pci_find_hose_for_OF_device(node)) | |
e05b3b4a | 164 | return -ENODEV; |
98d9f30c BH |
165 | |
166 | reg = of_get_property(node, "reg", &size); | |
167 | if (!reg || size < 5 * sizeof(u32)) | |
e05b3b4a | 168 | return -ENODEV; |
98d9f30c BH |
169 | |
170 | *bus = (be32_to_cpup(®[0]) >> 16) & 0xff; | |
171 | *devfn = (be32_to_cpup(®[0]) >> 8) & 0xff; | |
e05b3b4a PM |
172 | |
173 | /* Ok, here we need some tweak. If we have already renumbered | |
174 | * all busses, we can't rely on the OF bus number any more. | |
175 | * the pci_to_OF_bus_map is not enough as several PCI busses | |
176 | * may match the same OF bus number. | |
177 | */ | |
178 | if (!pci_to_OF_bus_map) | |
179 | return 0; | |
180 | ||
181 | for_each_pci_dev(dev) | |
182 | if (pci_to_OF_bus_map[dev->bus->number] == *bus && | |
183 | dev->devfn == *devfn) { | |
184 | *bus = dev->bus->number; | |
185 | pci_dev_put(dev); | |
186 | return 0; | |
187 | } | |
188 | ||
189 | return -ENODEV; | |
190 | } | |
191 | EXPORT_SYMBOL(pci_device_from_OF_node); | |
192 | ||
e05b3b4a PM |
193 | /* We create the "pci-OF-bus-map" property now so it appears in the |
194 | * /proc device tree | |
195 | */ | |
196 | void __init | |
197 | pci_create_OF_bus_map(void) | |
198 | { | |
199 | struct property* of_prop; | |
8c8dc322 SR |
200 | struct device_node *dn; |
201 | ||
e39f223f | 202 | of_prop = memblock_virt_alloc(sizeof(struct property) + 256, 0); |
8c8dc322 SR |
203 | dn = of_find_node_by_path("/"); |
204 | if (dn) { | |
e05b3b4a PM |
205 | memset(of_prop, -1, sizeof(struct property) + 256); |
206 | of_prop->name = "pci-OF-bus-map"; | |
207 | of_prop->length = 256; | |
1a38147e | 208 | of_prop->value = &of_prop[1]; |
79d1c712 | 209 | of_add_property(dn, of_prop); |
8c8dc322 | 210 | of_node_put(dn); |
e05b3b4a PM |
211 | } |
212 | } | |
213 | ||
cad5cef6 | 214 | void pcibios_setup_phb_io_space(struct pci_controller *hose) |
53280323 | 215 | { |
53280323 BH |
216 | unsigned long io_offset; |
217 | struct resource *res = &hose->io_resource; | |
218 | ||
53280323 | 219 | /* Fixup IO space offset */ |
38973ba7 BH |
220 | io_offset = pcibios_io_space_offset(hose); |
221 | res->start += io_offset; | |
222 | res->end += io_offset; | |
53280323 BH |
223 | } |
224 | ||
3fd94c6b | 225 | static int __init pcibios_init(void) |
e05b3b4a | 226 | { |
a4c9e328 | 227 | struct pci_controller *hose, *tmp; |
a4c9e328 | 228 | int next_busno = 0; |
e05b3b4a PM |
229 | |
230 | printk(KERN_INFO "PCI: Probing PCI hardware\n"); | |
231 | ||
0e47ff1c | 232 | if (pci_has_flag(PCI_REASSIGN_ALL_BUS)) |
fc3fb71c BH |
233 | pci_assign_all_buses = 1; |
234 | ||
e05b3b4a | 235 | /* Scan all of the recorded PCI controllers. */ |
a4c9e328 | 236 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
e05b3b4a PM |
237 | if (pci_assign_all_buses) |
238 | hose->first_busno = next_busno; | |
239 | hose->last_busno = 0xff; | |
b5d937de | 240 | pcibios_scan_phb(hose); |
53280323 | 241 | pci_bus_add_devices(hose->bus); |
e05b3b4a PM |
242 | if (pci_assign_all_buses || next_busno <= hose->last_busno) |
243 | next_busno = hose->last_busno + pcibios_assign_bus_offset; | |
244 | } | |
245 | pci_bus_count = next_busno; | |
246 | ||
247 | /* OpenFirmware based machines need a map of OF bus | |
248 | * numbers vs. kernel bus numbers since we may have to | |
249 | * remap them. | |
250 | */ | |
6b82b3e4 | 251 | if (pci_assign_all_buses) |
e05b3b4a PM |
252 | pcibios_make_OF_bus_map(); |
253 | ||
3fd94c6b BH |
254 | /* Call common code to handle resource allocation */ |
255 | pcibios_resource_survey(); | |
e05b3b4a PM |
256 | |
257 | /* Call machine dependent post-init code */ | |
258 | if (ppc_md.pcibios_after_init) | |
259 | ppc_md.pcibios_after_init(); | |
260 | ||
261 | return 0; | |
262 | } | |
263 | ||
264 | subsys_initcall(pcibios_init); | |
265 | ||
0b1d40c4 | 266 | static struct pci_controller* |
e05b3b4a PM |
267 | pci_bus_to_hose(int bus) |
268 | { | |
a4c9e328 | 269 | struct pci_controller *hose, *tmp; |
e05b3b4a | 270 | |
a4c9e328 | 271 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) |
e05b3b4a PM |
272 | if (bus >= hose->first_busno && bus <= hose->last_busno) |
273 | return hose; | |
274 | return NULL; | |
275 | } | |
276 | ||
e05b3b4a PM |
277 | /* Provide information on locations of various I/O regions in physical |
278 | * memory. Do this on a per-card basis so that we choose the right | |
279 | * root bridge. | |
280 | * Note that the returned IO or memory base is a physical address | |
281 | */ | |
282 | ||
283 | long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) | |
284 | { | |
285 | struct pci_controller* hose; | |
286 | long result = -EOPNOTSUPP; | |
287 | ||
e05b3b4a PM |
288 | hose = pci_bus_to_hose(bus); |
289 | if (!hose) | |
290 | return -ENODEV; | |
291 | ||
292 | switch (which) { | |
293 | case IOBASE_BRIDGE_NUMBER: | |
294 | return (long)hose->first_busno; | |
295 | case IOBASE_MEMORY: | |
3fd47f06 | 296 | return (long)hose->mem_offset[0]; |
e05b3b4a PM |
297 | case IOBASE_IO: |
298 | return (long)hose->io_base_phys; | |
299 | case IOBASE_ISA_IO: | |
300 | return (long)isa_io_base; | |
301 | case IOBASE_ISA_MEM: | |
302 | return (long)isa_mem_base; | |
303 | } | |
304 | ||
305 | return result; | |
306 | } | |
307 | ||
e05b3b4a | 308 |