Commit | Line | Data |
---|---|---|
e05b3b4a PM |
1 | /* |
2 | * Common pmac/prep/chrp pci routines. -- Cort | |
3 | */ | |
4 | ||
e05b3b4a PM |
5 | #include <linux/kernel.h> |
6 | #include <linux/pci.h> | |
7 | #include <linux/delay.h> | |
8 | #include <linux/string.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/capability.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/bootmem.h> | |
6e99e458 | 14 | #include <linux/irq.h> |
f90bb153 | 15 | #include <linux/list.h> |
66524b22 | 16 | #include <linux/of.h> |
e05b3b4a PM |
17 | |
18 | #include <asm/processor.h> | |
19 | #include <asm/io.h> | |
20 | #include <asm/prom.h> | |
21 | #include <asm/sections.h> | |
22 | #include <asm/pci-bridge.h> | |
23 | #include <asm/byteorder.h> | |
e05b3b4a PM |
24 | #include <asm/uaccess.h> |
25 | #include <asm/machdep.h> | |
26 | ||
27 | #undef DEBUG | |
28 | ||
29 | #ifdef DEBUG | |
30 | #define DBG(x...) printk(x) | |
31 | #else | |
32 | #define DBG(x...) | |
33 | #endif | |
34 | ||
35 | unsigned long isa_io_base = 0; | |
e05b3b4a PM |
36 | unsigned long pci_dram_offset = 0; |
37 | int pcibios_assign_bus_offset = 1; | |
38 | ||
39 | void pcibios_make_OF_bus_map(void); | |
40 | ||
e05b3b4a | 41 | static void fixup_broken_pcnet32(struct pci_dev* dev); |
e05b3b4a PM |
42 | static void fixup_cpc710_pci64(struct pci_dev* dev); |
43 | #ifdef CONFIG_PPC_OF | |
44 | static u8* pci_to_OF_bus_map; | |
45 | #endif | |
46 | ||
47 | /* By default, we don't re-assign bus numbers. We do this only on | |
48 | * some pmacs | |
49 | */ | |
fc3fb71c | 50 | static int pci_assign_all_buses; |
e05b3b4a | 51 | |
a4c9e328 | 52 | LIST_HEAD(hose_list); |
e05b3b4a PM |
53 | |
54 | static int pci_bus_count; | |
55 | ||
2052d6d2 KG |
56 | static void |
57 | fixup_hide_host_resource_fsl(struct pci_dev* dev) | |
58 | { | |
59 | int i, class = dev->class >> 8; | |
60 | ||
61 | if ((class == PCI_CLASS_PROCESSOR_POWERPC) && | |
62 | (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) && | |
63 | (dev->bus->parent == NULL)) { | |
64 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | |
65 | dev->resource[i].start = 0; | |
66 | dev->resource[i].end = 0; | |
67 | dev->resource[i].flags = 0; | |
68 | } | |
69 | } | |
70 | } | |
71 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl); | |
72 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); | |
73 | ||
e05b3b4a PM |
74 | static void |
75 | fixup_broken_pcnet32(struct pci_dev* dev) | |
76 | { | |
77 | if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { | |
78 | dev->vendor = PCI_VENDOR_ID_AMD; | |
79 | pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); | |
80 | } | |
81 | } | |
82 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); | |
83 | ||
84 | static void | |
85 | fixup_cpc710_pci64(struct pci_dev* dev) | |
86 | { | |
87 | /* Hide the PCI64 BARs from the kernel as their content doesn't | |
88 | * fit well in the resource management | |
89 | */ | |
90 | dev->resource[0].start = dev->resource[0].end = 0; | |
91 | dev->resource[0].flags = 0; | |
92 | dev->resource[1].start = dev->resource[1].end = 0; | |
93 | dev->resource[1].flags = 0; | |
94 | } | |
95 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); | |
96 | ||
e05b3b4a PM |
97 | #ifdef CONFIG_PPC_OF |
98 | /* | |
99 | * Functions below are used on OpenFirmware machines. | |
100 | */ | |
101 | static void | |
102 | make_one_node_map(struct device_node* node, u8 pci_bus) | |
103 | { | |
a7f67bdf | 104 | const int *bus_range; |
e05b3b4a PM |
105 | int len; |
106 | ||
107 | if (pci_bus >= pci_bus_count) | |
108 | return; | |
e2eb6392 | 109 | bus_range = of_get_property(node, "bus-range", &len); |
e05b3b4a PM |
110 | if (bus_range == NULL || len < 2 * sizeof(int)) { |
111 | printk(KERN_WARNING "Can't get bus-range for %s, " | |
112 | "assuming it starts at 0\n", node->full_name); | |
113 | pci_to_OF_bus_map[pci_bus] = 0; | |
114 | } else | |
115 | pci_to_OF_bus_map[pci_bus] = bus_range[0]; | |
116 | ||
66524b22 | 117 | for_each_child_of_node(node, node) { |
e05b3b4a | 118 | struct pci_dev* dev; |
a7f67bdf | 119 | const unsigned int *class_code, *reg; |
e05b3b4a | 120 | |
e2eb6392 | 121 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
122 | if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
123 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) | |
124 | continue; | |
e2eb6392 | 125 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
126 | if (!reg) |
127 | continue; | |
ab462768 AC |
128 | dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff)); |
129 | if (!dev || !dev->subordinate) { | |
130 | pci_dev_put(dev); | |
e05b3b4a | 131 | continue; |
ab462768 | 132 | } |
e05b3b4a | 133 | make_one_node_map(node, dev->subordinate->number); |
ab462768 | 134 | pci_dev_put(dev); |
e05b3b4a PM |
135 | } |
136 | } | |
137 | ||
138 | void | |
139 | pcibios_make_OF_bus_map(void) | |
140 | { | |
141 | int i; | |
a4c9e328 | 142 | struct pci_controller *hose, *tmp; |
a7f67bdf | 143 | struct property *map_prop; |
8c8dc322 | 144 | struct device_node *dn; |
e05b3b4a | 145 | |
5cbded58 | 146 | pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL); |
e05b3b4a PM |
147 | if (!pci_to_OF_bus_map) { |
148 | printk(KERN_ERR "Can't allocate OF bus map !\n"); | |
149 | return; | |
150 | } | |
151 | ||
152 | /* We fill the bus map with invalid values, that helps | |
153 | * debugging. | |
154 | */ | |
155 | for (i=0; i<pci_bus_count; i++) | |
156 | pci_to_OF_bus_map[i] = 0xff; | |
157 | ||
158 | /* For each hose, we begin searching bridges */ | |
a4c9e328 | 159 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
44ef3390 SR |
160 | struct device_node* node = hose->dn; |
161 | ||
e05b3b4a PM |
162 | if (!node) |
163 | continue; | |
164 | make_one_node_map(node, hose->first_busno); | |
165 | } | |
8c8dc322 SR |
166 | dn = of_find_node_by_path("/"); |
167 | map_prop = of_find_property(dn, "pci-OF-bus-map", NULL); | |
a7f67bdf JK |
168 | if (map_prop) { |
169 | BUG_ON(pci_bus_count > map_prop->length); | |
170 | memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count); | |
171 | } | |
8c8dc322 | 172 | of_node_put(dn); |
e05b3b4a PM |
173 | #ifdef DEBUG |
174 | printk("PCI->OF bus map:\n"); | |
175 | for (i=0; i<pci_bus_count; i++) { | |
176 | if (pci_to_OF_bus_map[i] == 0xff) | |
177 | continue; | |
178 | printk("%d -> %d\n", i, pci_to_OF_bus_map[i]); | |
179 | } | |
180 | #endif | |
181 | } | |
182 | ||
183 | typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data); | |
184 | ||
185 | static struct device_node* | |
66524b22 | 186 | scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data) |
e05b3b4a | 187 | { |
66524b22 | 188 | struct device_node *node; |
e05b3b4a PM |
189 | struct device_node* sub_node; |
190 | ||
66524b22 | 191 | for_each_child_of_node(parent, node) { |
a7f67bdf | 192 | const unsigned int *class_code; |
e05b3b4a | 193 | |
66524b22 SR |
194 | if (filter(node, data)) { |
195 | of_node_put(node); | |
e05b3b4a | 196 | return node; |
66524b22 | 197 | } |
e05b3b4a PM |
198 | |
199 | /* For PCI<->PCI bridges or CardBus bridges, we go down | |
200 | * Note: some OFs create a parent node "multifunc-device" as | |
201 | * a fake root for all functions of a multi-function device, | |
202 | * we go down them as well. | |
203 | */ | |
e2eb6392 | 204 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
205 | if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
206 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) && | |
207 | strcmp(node->name, "multifunc-device")) | |
208 | continue; | |
66524b22 SR |
209 | sub_node = scan_OF_pci_childs(node, filter, data); |
210 | if (sub_node) { | |
211 | of_node_put(node); | |
e05b3b4a | 212 | return sub_node; |
66524b22 | 213 | } |
e05b3b4a PM |
214 | } |
215 | return NULL; | |
216 | } | |
217 | ||
dae4828d BH |
218 | static struct device_node *scan_OF_for_pci_dev(struct device_node *parent, |
219 | unsigned int devfn) | |
e05b3b4a | 220 | { |
85e99b9f | 221 | struct device_node *np; |
dae4828d BH |
222 | const u32 *reg; |
223 | unsigned int psize; | |
224 | ||
85e99b9f | 225 | for_each_child_of_node(parent, np) { |
e2eb6392 | 226 | reg = of_get_property(np, "reg", &psize); |
dae4828d BH |
227 | if (reg == NULL || psize < 4) |
228 | continue; | |
229 | if (((reg[0] >> 8) & 0xff) == devfn) | |
230 | return np; | |
231 | } | |
232 | return NULL; | |
e05b3b4a PM |
233 | } |
234 | ||
dae4828d BH |
235 | |
236 | static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus) | |
e05b3b4a | 237 | { |
dae4828d BH |
238 | struct device_node *parent, *np; |
239 | ||
240 | /* Are we a root bus ? */ | |
241 | if (bus->self == NULL || bus->parent == NULL) { | |
0b1d40c4 | 242 | struct pci_controller *hose = pci_bus_to_host(bus); |
dae4828d BH |
243 | if (hose == NULL) |
244 | return NULL; | |
44ef3390 | 245 | return of_node_get(hose->dn); |
dae4828d BH |
246 | } |
247 | ||
248 | /* not a root bus, we need to get our parent */ | |
249 | parent = scan_OF_for_pci_bus(bus->parent); | |
250 | if (parent == NULL) | |
251 | return NULL; | |
252 | ||
253 | /* now iterate for children for a match */ | |
254 | np = scan_OF_for_pci_dev(parent, bus->self->devfn); | |
255 | of_node_put(parent); | |
256 | ||
dae4828d | 257 | return np; |
e05b3b4a PM |
258 | } |
259 | ||
260 | /* | |
261 | * Scans the OF tree for a device node matching a PCI device | |
262 | */ | |
263 | struct device_node * | |
264 | pci_busdev_to_OF_node(struct pci_bus *bus, int devfn) | |
265 | { | |
dae4828d | 266 | struct device_node *parent, *np; |
e05b3b4a PM |
267 | |
268 | if (!have_of) | |
269 | return NULL; | |
e05b3b4a | 270 | |
dae4828d BH |
271 | DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn); |
272 | parent = scan_OF_for_pci_bus(bus); | |
273 | if (parent == NULL) | |
e05b3b4a | 274 | return NULL; |
dae4828d BH |
275 | DBG(" parent is %s\n", parent ? parent->full_name : "<NULL>"); |
276 | np = scan_OF_for_pci_dev(parent, devfn); | |
277 | of_node_put(parent); | |
278 | DBG(" result is %s\n", np ? np->full_name : "<NULL>"); | |
279 | ||
280 | /* XXX most callers don't release the returned node | |
281 | * mostly because ppc64 doesn't increase the refcount, | |
282 | * we need to fix that. | |
e05b3b4a | 283 | */ |
dae4828d | 284 | return np; |
e05b3b4a PM |
285 | } |
286 | EXPORT_SYMBOL(pci_busdev_to_OF_node); | |
287 | ||
288 | struct device_node* | |
289 | pci_device_to_OF_node(struct pci_dev *dev) | |
290 | { | |
291 | return pci_busdev_to_OF_node(dev->bus, dev->devfn); | |
292 | } | |
293 | EXPORT_SYMBOL(pci_device_to_OF_node); | |
294 | ||
e05b3b4a PM |
295 | static int |
296 | find_OF_pci_device_filter(struct device_node* node, void* data) | |
297 | { | |
298 | return ((void *)node == data); | |
299 | } | |
300 | ||
301 | /* | |
302 | * Returns the PCI device matching a given OF node | |
303 | */ | |
304 | int | |
305 | pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn) | |
306 | { | |
a7f67bdf | 307 | const unsigned int *reg; |
e05b3b4a PM |
308 | struct pci_controller* hose; |
309 | struct pci_dev* dev = NULL; | |
310 | ||
311 | if (!have_of) | |
312 | return -ENODEV; | |
313 | /* Make sure it's really a PCI device */ | |
314 | hose = pci_find_hose_for_OF_device(node); | |
44ef3390 | 315 | if (!hose || !hose->dn) |
e05b3b4a | 316 | return -ENODEV; |
66524b22 | 317 | if (!scan_OF_pci_childs(hose->dn, |
e05b3b4a PM |
318 | find_OF_pci_device_filter, (void *)node)) |
319 | return -ENODEV; | |
e2eb6392 | 320 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
321 | if (!reg) |
322 | return -ENODEV; | |
323 | *bus = (reg[0] >> 16) & 0xff; | |
324 | *devfn = ((reg[0] >> 8) & 0xff); | |
325 | ||
326 | /* Ok, here we need some tweak. If we have already renumbered | |
327 | * all busses, we can't rely on the OF bus number any more. | |
328 | * the pci_to_OF_bus_map is not enough as several PCI busses | |
329 | * may match the same OF bus number. | |
330 | */ | |
331 | if (!pci_to_OF_bus_map) | |
332 | return 0; | |
333 | ||
334 | for_each_pci_dev(dev) | |
335 | if (pci_to_OF_bus_map[dev->bus->number] == *bus && | |
336 | dev->devfn == *devfn) { | |
337 | *bus = dev->bus->number; | |
338 | pci_dev_put(dev); | |
339 | return 0; | |
340 | } | |
341 | ||
342 | return -ENODEV; | |
343 | } | |
344 | EXPORT_SYMBOL(pci_device_from_OF_node); | |
345 | ||
e05b3b4a PM |
346 | /* We create the "pci-OF-bus-map" property now so it appears in the |
347 | * /proc device tree | |
348 | */ | |
349 | void __init | |
350 | pci_create_OF_bus_map(void) | |
351 | { | |
352 | struct property* of_prop; | |
8c8dc322 SR |
353 | struct device_node *dn; |
354 | ||
e05b3b4a | 355 | of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256); |
8c8dc322 SR |
356 | if (!of_prop) |
357 | return; | |
358 | dn = of_find_node_by_path("/"); | |
359 | if (dn) { | |
e05b3b4a PM |
360 | memset(of_prop, -1, sizeof(struct property) + 256); |
361 | of_prop->name = "pci-OF-bus-map"; | |
362 | of_prop->length = 256; | |
1a38147e | 363 | of_prop->value = &of_prop[1]; |
8c8dc322 SR |
364 | prom_add_property(dn, of_prop); |
365 | of_node_put(dn); | |
e05b3b4a PM |
366 | } |
367 | } | |
368 | ||
e05b3b4a PM |
369 | #else /* CONFIG_PPC_OF */ |
370 | void pcibios_make_OF_bus_map(void) | |
371 | { | |
372 | } | |
373 | #endif /* CONFIG_PPC_OF */ | |
374 | ||
3fd94c6b | 375 | static int __init pcibios_init(void) |
e05b3b4a | 376 | { |
a4c9e328 | 377 | struct pci_controller *hose, *tmp; |
e05b3b4a | 378 | struct pci_bus *bus; |
a4c9e328 | 379 | int next_busno = 0; |
e05b3b4a PM |
380 | |
381 | printk(KERN_INFO "PCI: Probing PCI hardware\n"); | |
382 | ||
fc3fb71c BH |
383 | if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS) |
384 | pci_assign_all_buses = 1; | |
385 | ||
e05b3b4a | 386 | /* Scan all of the recorded PCI controllers. */ |
a4c9e328 | 387 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
e05b3b4a PM |
388 | if (pci_assign_all_buses) |
389 | hose->first_busno = next_busno; | |
390 | hose->last_busno = 0xff; | |
803d4573 BH |
391 | bus = pci_scan_bus_parented(hose->parent, hose->first_busno, |
392 | hose->ops, hose); | |
b1b166b7 | 393 | if (bus) { |
803d4573 | 394 | pci_bus_add_devices(bus); |
b1b166b7 BH |
395 | hose->last_busno = bus->subordinate; |
396 | } | |
e05b3b4a PM |
397 | if (pci_assign_all_buses || next_busno <= hose->last_busno) |
398 | next_busno = hose->last_busno + pcibios_assign_bus_offset; | |
399 | } | |
400 | pci_bus_count = next_busno; | |
401 | ||
402 | /* OpenFirmware based machines need a map of OF bus | |
403 | * numbers vs. kernel bus numbers since we may have to | |
404 | * remap them. | |
405 | */ | |
406 | if (pci_assign_all_buses && have_of) | |
407 | pcibios_make_OF_bus_map(); | |
408 | ||
3fd94c6b BH |
409 | /* Call common code to handle resource allocation */ |
410 | pcibios_resource_survey(); | |
e05b3b4a PM |
411 | |
412 | /* Call machine dependent post-init code */ | |
413 | if (ppc_md.pcibios_after_init) | |
414 | ppc_md.pcibios_after_init(); | |
415 | ||
416 | return 0; | |
417 | } | |
418 | ||
419 | subsys_initcall(pcibios_init); | |
420 | ||
bf5e2ba2 | 421 | void __devinit pcibios_do_bus_setup(struct pci_bus *bus) |
e05b3b4a PM |
422 | { |
423 | struct pci_controller *hose = (struct pci_controller *) bus->sysdata; | |
424 | unsigned long io_offset; | |
425 | struct resource *res; | |
426 | int i; | |
427 | ||
bf5e2ba2 | 428 | /* Hookup PHB resources */ |
e05b3b4a PM |
429 | io_offset = (unsigned long)hose->io_base_virt - isa_io_base; |
430 | if (bus->parent == NULL) { | |
431 | /* This is a host bridge - fill in its resources */ | |
432 | hose->bus = bus; | |
433 | ||
434 | bus->resource[0] = res = &hose->io_resource; | |
435 | if (!res->flags) { | |
436 | if (io_offset) | |
437 | printk(KERN_ERR "I/O resource not set for host" | |
5516b540 | 438 | " bridge %d\n", hose->global_number); |
e05b3b4a PM |
439 | res->start = 0; |
440 | res->end = IO_SPACE_LIMIT; | |
441 | res->flags = IORESOURCE_IO; | |
442 | } | |
05d3957e BH |
443 | res->start = (res->start + io_offset) & 0xffffffffu; |
444 | res->end = (res->end + io_offset) & 0xffffffffu; | |
e05b3b4a PM |
445 | |
446 | for (i = 0; i < 3; ++i) { | |
447 | res = &hose->mem_resources[i]; | |
448 | if (!res->flags) { | |
449 | if (i > 0) | |
450 | continue; | |
451 | printk(KERN_ERR "Memory resource not set for " | |
5516b540 | 452 | "host bridge %d\n", hose->global_number); |
e05b3b4a PM |
453 | res->start = hose->pci_mem_offset; |
454 | res->end = ~0U; | |
455 | res->flags = IORESOURCE_MEM; | |
456 | } | |
457 | bus->resource[i+1] = res; | |
458 | } | |
f90bb153 | 459 | } |
e05b3b4a PM |
460 | } |
461 | ||
e05b3b4a PM |
462 | /* the next one is stolen from the alpha port... */ |
463 | void __init | |
464 | pcibios_update_irq(struct pci_dev *dev, int irq) | |
465 | { | |
466 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); | |
467 | /* XXX FIXME - update OF device tree node interrupt property */ | |
468 | } | |
469 | ||
0b1d40c4 | 470 | static struct pci_controller* |
e05b3b4a PM |
471 | pci_bus_to_hose(int bus) |
472 | { | |
a4c9e328 | 473 | struct pci_controller *hose, *tmp; |
e05b3b4a | 474 | |
a4c9e328 | 475 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) |
e05b3b4a PM |
476 | if (bus >= hose->first_busno && bus <= hose->last_busno) |
477 | return hose; | |
478 | return NULL; | |
479 | } | |
480 | ||
e05b3b4a PM |
481 | /* Provide information on locations of various I/O regions in physical |
482 | * memory. Do this on a per-card basis so that we choose the right | |
483 | * root bridge. | |
484 | * Note that the returned IO or memory base is a physical address | |
485 | */ | |
486 | ||
487 | long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) | |
488 | { | |
489 | struct pci_controller* hose; | |
490 | long result = -EOPNOTSUPP; | |
491 | ||
e05b3b4a PM |
492 | hose = pci_bus_to_hose(bus); |
493 | if (!hose) | |
494 | return -ENODEV; | |
495 | ||
496 | switch (which) { | |
497 | case IOBASE_BRIDGE_NUMBER: | |
498 | return (long)hose->first_busno; | |
499 | case IOBASE_MEMORY: | |
500 | return (long)hose->pci_mem_offset; | |
501 | case IOBASE_IO: | |
502 | return (long)hose->io_base_phys; | |
503 | case IOBASE_ISA_IO: | |
504 | return (long)isa_io_base; | |
505 | case IOBASE_ISA_MEM: | |
506 | return (long)isa_mem_base; | |
507 | } | |
508 | ||
509 | return result; | |
510 | } | |
511 | ||
e05b3b4a PM |
512 | unsigned long pci_address_to_pio(phys_addr_t address) |
513 | { | |
a4c9e328 | 514 | struct pci_controller *hose, *tmp; |
e05b3b4a | 515 | |
a4c9e328 | 516 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
e05b3b4a PM |
517 | unsigned int size = hose->io_resource.end - |
518 | hose->io_resource.start + 1; | |
519 | if (address >= hose->io_base_phys && | |
520 | address < (hose->io_base_phys + size)) { | |
521 | unsigned long base = | |
522 | (unsigned long)hose->io_base_virt - _IO_BASE; | |
523 | return base + (address - hose->io_base_phys); | |
524 | } | |
525 | } | |
526 | return (unsigned int)-1; | |
527 | } | |
528 | EXPORT_SYMBOL(pci_address_to_pio); | |
529 | ||
530 | /* | |
531 | * Null PCI config access functions, for the case when we can't | |
532 | * find a hose. | |
533 | */ | |
534 | #define NULL_PCI_OP(rw, size, type) \ | |
535 | static int \ | |
536 | null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \ | |
537 | { \ | |
538 | return PCIBIOS_DEVICE_NOT_FOUND; \ | |
539 | } | |
540 | ||
541 | static int | |
542 | null_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | |
543 | int len, u32 *val) | |
544 | { | |
545 | return PCIBIOS_DEVICE_NOT_FOUND; | |
546 | } | |
547 | ||
548 | static int | |
549 | null_write_config(struct pci_bus *bus, unsigned int devfn, int offset, | |
550 | int len, u32 val) | |
551 | { | |
552 | return PCIBIOS_DEVICE_NOT_FOUND; | |
553 | } | |
554 | ||
555 | static struct pci_ops null_pci_ops = | |
556 | { | |
6127d1c0 NL |
557 | .read = null_read_config, |
558 | .write = null_write_config, | |
e05b3b4a PM |
559 | }; |
560 | ||
561 | /* | |
562 | * These functions are used early on before PCI scanning is done | |
563 | * and all of the pci_dev and pci_bus structures have been created. | |
564 | */ | |
565 | static struct pci_bus * | |
566 | fake_pci_bus(struct pci_controller *hose, int busnr) | |
567 | { | |
568 | static struct pci_bus bus; | |
569 | ||
570 | if (hose == 0) { | |
571 | hose = pci_bus_to_hose(busnr); | |
572 | if (hose == 0) | |
573 | printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr); | |
574 | } | |
575 | bus.number = busnr; | |
576 | bus.sysdata = hose; | |
577 | bus.ops = hose? hose->ops: &null_pci_ops; | |
578 | return &bus; | |
579 | } | |
580 | ||
581 | #define EARLY_PCI_OP(rw, size, type) \ | |
582 | int early_##rw##_config_##size(struct pci_controller *hose, int bus, \ | |
583 | int devfn, int offset, type value) \ | |
584 | { \ | |
585 | return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \ | |
586 | devfn, offset, value); \ | |
587 | } | |
588 | ||
589 | EARLY_PCI_OP(read, byte, u8 *) | |
590 | EARLY_PCI_OP(read, word, u16 *) | |
591 | EARLY_PCI_OP(read, dword, u32 *) | |
592 | EARLY_PCI_OP(write, byte, u8) | |
593 | EARLY_PCI_OP(write, word, u16) | |
594 | EARLY_PCI_OP(write, dword, u32) | |
38805e5f KG |
595 | |
596 | extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap); | |
597 | int early_find_capability(struct pci_controller *hose, int bus, int devfn, | |
598 | int cap) | |
599 | { | |
600 | return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap); | |
601 | } |