[POWERPC] iseries: remove const warning
[deliverable/linux.git] / arch / powerpc / kernel / rtas_pci.c
CommitLineData
c5a3c2e5 1/*
c5a3c2e5
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2 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
3 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
4 *
5 * RTAS specific routines for PCI.
ae65a391 6 *
c5a3c2e5
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7 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
ae65a391 13 *
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14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
ae65a391 18 *
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19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#include <linux/kernel.h>
25#include <linux/threads.h>
26#include <linux/pci.h>
27#include <linux/string.h>
28#include <linux/init.h>
29#include <linux/bootmem.h>
30
31#include <asm/io.h>
32#include <asm/pgtable.h>
33#include <asm/irq.h>
34#include <asm/prom.h>
35#include <asm/machdep.h>
36#include <asm/pci-bridge.h>
37#include <asm/iommu.h>
38#include <asm/rtas.h>
bbeb3f4c 39#include <asm/mpic.h>
d387899f 40#include <asm/ppc-pci.h>
c5a3c2e5
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41
42/* RTAS tokens */
43static int read_pci_config;
44static int write_pci_config;
45static int ibm_read_pci_config;
46static int ibm_write_pci_config;
47
ae65a391 48static inline int config_access_valid(struct pci_dn *dn, int where)
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49{
50 if (where < 256)
51 return 1;
52 if (where < 4096 && dn->pci_ext_config_space)
53 return 1;
54
55 return 0;
56}
57
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58static int of_device_available(struct device_node * dn)
59{
a7f67bdf 60 const char *status;
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61
62 status = get_property(dn, "status", NULL);
63
64 if (!status)
65 return 1;
66
67 if (!strcmp(status, "okay"))
68 return 1;
69
70 return 0;
71}
72
7684b40c 73int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
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74{
75 int returnval = -1;
76 unsigned long buid, addr;
77 int ret;
78
ae65a391 79 if (!pdn)
c5a3c2e5 80 return PCIBIOS_DEVICE_NOT_FOUND;
1635317f 81 if (!config_access_valid(pdn, where))
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82 return PCIBIOS_BAD_REGISTER_NUMBER;
83
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84 addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
85 (pdn->devfn << 8) | (where & 0xff);
86 buid = pdn->phb->buid;
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87 if (buid) {
88 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
ae65a391 89 addr, BUID_HI(buid), BUID_LO(buid), size);
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90 } else {
91 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
92 }
93 *val = returnval;
94
95 if (ret)
96 return PCIBIOS_DEVICE_NOT_FOUND;
97
1635317f 98 if (returnval == EEH_IO_ERROR_VALUE(size) &&
ae65a391 99 eeh_dn_check_failure (pdn->node, NULL))
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100 return PCIBIOS_DEVICE_NOT_FOUND;
101
102 return PCIBIOS_SUCCESSFUL;
103}
104
105static int rtas_pci_read_config(struct pci_bus *bus,
106 unsigned int devfn,
107 int where, int size, u32 *val)
108{
109 struct device_node *busdn, *dn;
110
111 if (bus->self)
112 busdn = pci_device_to_OF_node(bus->self);
113 else
114 busdn = bus->sysdata; /* must be a phb */
115
116 /* Search only direct children of the bus */
ae65a391 117 for (dn = busdn->child; dn; dn = dn->sibling) {
118 struct pci_dn *pdn = PCI_DN(dn);
119 if (pdn && pdn->devfn == devfn
1635317f 120 && of_device_available(dn))
ae65a391 121 return rtas_read_config(pdn, where, size, val);
122 }
1635317f 123
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124 return PCIBIOS_DEVICE_NOT_FOUND;
125}
126
ae65a391 127int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
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128{
129 unsigned long buid, addr;
130 int ret;
131
ae65a391 132 if (!pdn)
c5a3c2e5 133 return PCIBIOS_DEVICE_NOT_FOUND;
1635317f 134 if (!config_access_valid(pdn, where))
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135 return PCIBIOS_BAD_REGISTER_NUMBER;
136
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137 addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
138 (pdn->devfn << 8) | (where & 0xff);
139 buid = pdn->phb->buid;
c5a3c2e5 140 if (buid) {
ae65a391 141 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
142 BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
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143 } else {
144 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
145 }
146
147 if (ret)
148 return PCIBIOS_DEVICE_NOT_FOUND;
149
150 return PCIBIOS_SUCCESSFUL;
151}
152
153static int rtas_pci_write_config(struct pci_bus *bus,
154 unsigned int devfn,
155 int where, int size, u32 val)
156{
157 struct device_node *busdn, *dn;
158
159 if (bus->self)
160 busdn = pci_device_to_OF_node(bus->self);
161 else
162 busdn = bus->sysdata; /* must be a phb */
163
164 /* Search only direct children of the bus */
ae65a391 165 for (dn = busdn->child; dn; dn = dn->sibling) {
166 struct pci_dn *pdn = PCI_DN(dn);
167 if (pdn && pdn->devfn == devfn
1635317f 168 && of_device_available(dn))
ae65a391 169 return rtas_write_config(pdn, where, size, val);
170 }
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171 return PCIBIOS_DEVICE_NOT_FOUND;
172}
173
174struct pci_ops rtas_pci_ops = {
175 rtas_pci_read_config,
176 rtas_pci_write_config
177};
178
179int is_python(struct device_node *dev)
180{
a7f67bdf 181 const char *model = get_property(dev, "model", NULL);
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182
183 if (model && strstr(model, "Python"))
184 return 1;
185
186 return 0;
187}
188
cc5d0189 189static void python_countermeasures(struct device_node *dev)
c5a3c2e5 190{
cc5d0189 191 struct resource registers;
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192 void __iomem *chip_regs;
193 volatile u32 val;
194
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195 if (of_address_to_resource(dev, 0, &registers)) {
196 printk(KERN_ERR "Can't get address for Python workarounds !\n");
c5a3c2e5 197 return;
cc5d0189 198 }
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199
200 /* Python's register file is 1 MB in size. */
cc5d0189 201 chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
c5a3c2e5 202
ae65a391 203 /*
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204 * Firmware doesn't always clear this bit which is critical
205 * for good performance - Anton
206 */
207
208#define PRG_CL_RESET_VALID 0x00010000
209
210 val = in_be32(chip_regs + 0xf6030);
211 if (val & PRG_CL_RESET_VALID) {
212 printk(KERN_INFO "Python workaround: ");
213 val &= ~PRG_CL_RESET_VALID;
214 out_be32(chip_regs + 0xf6030, val);
215 /*
216 * We must read it back for changes to
217 * take effect
218 */
219 val = in_be32(chip_regs + 0xf6030);
220 printk("reg0: %x\n", val);
221 }
222
223 iounmap(chip_regs);
224}
225
226void __init init_pci_config_tokens (void)
227{
228 read_pci_config = rtas_token("read-pci-config");
229 write_pci_config = rtas_token("write-pci-config");
230 ibm_read_pci_config = rtas_token("ibm,read-pci-config");
231 ibm_write_pci_config = rtas_token("ibm,write-pci-config");
232}
233
234unsigned long __devinit get_phb_buid (struct device_node *phb)
235{
236 int addr_cells;
a7f67bdf 237 const unsigned int *buid_vals;
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238 unsigned int len;
239 unsigned long buid;
240
241 if (ibm_read_pci_config == -1) return 0;
242
243 /* PHB's will always be children of the root node,
244 * or so it is promised by the current firmware. */
245 if (phb->parent == NULL)
246 return 0;
247 if (phb->parent->parent)
248 return 0;
249
a7f67bdf 250 buid_vals = get_property(phb, "reg", &len);
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251 if (buid_vals == NULL)
252 return 0;
253
254 addr_cells = prom_n_addr_cells(phb);
255 if (addr_cells == 1) {
256 buid = (unsigned long) buid_vals[0];
257 } else {
258 buid = (((unsigned long)buid_vals[0]) << 32UL) |
259 (((unsigned long)buid_vals[1]) & 0xffffffff);
260 }
261 return buid;
262}
263
264static int phb_set_bus_ranges(struct device_node *dev,
265 struct pci_controller *phb)
266{
a7f67bdf 267 const int *bus_range;
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268 unsigned int len;
269
a7f67bdf 270 bus_range = get_property(dev, "bus-range", &len);
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271 if (bus_range == NULL || len < 2 * sizeof(int)) {
272 return 1;
273 }
ae65a391 274
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275 phb->first_busno = bus_range[0];
276 phb->last_busno = bus_range[1];
277
278 return 0;
279}
280
92eb4602 281int __devinit setup_phb(struct device_node *dev, struct pci_controller *phb)
c5a3c2e5 282{
c5a3c2e5 283 if (is_python(dev))
cc5d0189 284 python_countermeasures(dev);
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285
286 if (phb_set_bus_ranges(dev, phb))
287 return 1;
288
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289 phb->ops = &rtas_pci_ops;
290 phb->buid = get_phb_buid(dev);
291
292 return 0;
293}
294
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295unsigned long __init find_and_init_phbs(void)
296{
297 struct device_node *node;
298 struct pci_controller *phb;
c5a3c2e5 299 unsigned int index;
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300 struct device_node *root = of_find_node_by_path("/");
301
c5a3c2e5 302 index = 0;
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303 for (node = of_get_next_child(root, NULL);
304 node != NULL;
305 node = of_get_next_child(root, node)) {
bb53bb3d
JM
306
307 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
308 strcmp(node->type, "pciex") != 0))
c5a3c2e5
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309 continue;
310
b5166cc2 311 phb = pcibios_alloc_controller(node);
c5a3c2e5
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312 if (!phb)
313 continue;
cc5d0189 314 setup_phb(node, phb);
f7abbc19 315 pci_process_bridge_OF_ranges(phb, node, 0);
c5a3c2e5 316 pci_setup_phb_io(phb, index == 0);
c5a3c2e5
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317 index++;
318 }
319
320 of_node_put(root);
321 pci_devs_phb_init();
322
323 /*
324 * pci_probe_only and pci_assign_all_buses can be set via properties
325 * in chosen.
326 */
327 if (of_chosen) {
a7f67bdf 328 const int *prop;
c5a3c2e5 329
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330 prop = get_property(of_chosen,
331 "linux,pci-probe-only", NULL);
c5a3c2e5
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332 if (prop)
333 pci_probe_only = *prop;
334
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335 prop = get_property(of_chosen,
336 "linux,pci-assign-all-buses", NULL);
c5a3c2e5
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337 if (prop)
338 pci_assign_all_buses = *prop;
339 }
340
341 return 0;
342}
343
c5a3c2e5
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344/* RPA-specific bits for removing PHBs */
345int pcibios_remove_root_bus(struct pci_controller *phb)
346{
347 struct pci_bus *b = phb->bus;
348 struct resource *res;
349 int rc, i;
350
351 res = b->resource[0];
352 if (!res->flags) {
353 printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
354 b->name);
355 return 1;
356 }
357
358 rc = unmap_bus_range(b);
359 if (rc) {
360 printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
361 __FUNCTION__, b->name);
362 return 1;
363 }
364
365 if (release_resource(res)) {
366 printk(KERN_ERR "%s: failed to release IO on bus %s\n",
367 __FUNCTION__, b->name);
368 return 1;
369 }
370
371 for (i = 1; i < 3; ++i) {
372 res = b->resource[i];
373 if (!res->flags && i == 0) {
374 printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
375 __FUNCTION__, b->name);
376 return 1;
377 }
378 if (res->flags && release_resource(res)) {
379 printk(KERN_ERR
380 "%s: failed to release IO %d on bus %s\n",
381 __FUNCTION__, i, b->name);
382 return 1;
383 }
384 }
385
386 list_del(&phb->list_node);
b5166cc2 387 pcibios_free_controller(phb);
c5a3c2e5
AB
388
389 return 0;
390}
391EXPORT_SYMBOL(pcibios_remove_root_bus);
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