Commit | Line | Data |
---|---|---|
03501dab PM |
1 | /* |
2 | * Common boot and setup code for both 32-bit and 64-bit. | |
3 | * Extracted from arch/powerpc/kernel/setup_64.c. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
e8222502 BH |
12 | |
13 | #undef DEBUG | |
14 | ||
4b16f8e2 | 15 | #include <linux/export.h> |
03501dab PM |
16 | #include <linux/string.h> |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
e5c6c8e4 | 23 | #include <linux/platform_device.h> |
03501dab PM |
24 | #include <linux/seq_file.h> |
25 | #include <linux/ioport.h> | |
26 | #include <linux/console.h> | |
894673ee | 27 | #include <linux/screen_info.h> |
03501dab PM |
28 | #include <linux/root_dev.h> |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
94a3807c | 34 | #include <linux/debugfs.h> |
8d089085 | 35 | #include <linux/percpu.h> |
95f72d1e | 36 | #include <linux/memblock.h> |
d746286c | 37 | #include <linux/of_platform.h> |
03501dab | 38 | #include <asm/io.h> |
1426d5a3 | 39 | #include <asm/paca.h> |
03501dab PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
a7f290da | 42 | #include <asm/vdso_datapage.h> |
03501dab | 43 | #include <asm/pgtable.h> |
03501dab PM |
44 | #include <asm/smp.h> |
45 | #include <asm/elf.h> | |
46 | #include <asm/machdep.h> | |
47 | #include <asm/time.h> | |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
e8222502 | 50 | #include <asm/firmware.h> |
03501dab PM |
51 | #include <asm/btext.h> |
52 | #include <asm/nvram.h> | |
53 | #include <asm/setup.h> | |
03501dab PM |
54 | #include <asm/rtas.h> |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
fca5dcd4 | 60 | #include <asm/xmon.h> |
8d089085 | 61 | #include <asm/cputhreads.h> |
f465df81 | 62 | #include <mm/mmu_decl.h> |
ebaeb5ae | 63 | #include <asm/fadump.h> |
03501dab | 64 | |
03501dab | 65 | #ifdef DEBUG |
f9e4ec57 | 66 | #include <asm/udbg.h> |
03501dab PM |
67 | #define DBG(fmt...) udbg_printf(fmt) |
68 | #else | |
69 | #define DBG(fmt...) | |
70 | #endif | |
71 | ||
e8222502 BH |
72 | /* The main machine-dep calls structure |
73 | */ | |
74 | struct machdep_calls ppc_md; | |
75 | EXPORT_SYMBOL(ppc_md); | |
76 | struct machdep_calls *machine_id; | |
77 | EXPORT_SYMBOL(machine_id); | |
799d6046 | 78 | |
36ae37e3 BH |
79 | int boot_cpuid = -1; |
80 | EXPORT_SYMBOL_GPL(boot_cpuid); | |
81 | ||
49b09853 PM |
82 | unsigned long klimit = (unsigned long) _end; |
83 | ||
03501dab PM |
84 | /* |
85 | * This still seems to be needed... -- paulus | |
86 | */ | |
87 | struct screen_info screen_info = { | |
88 | .orig_x = 0, | |
89 | .orig_y = 25, | |
90 | .orig_video_cols = 80, | |
91 | .orig_video_lines = 25, | |
92 | .orig_video_isVGA = 1, | |
93 | .orig_video_points = 16 | |
94 | }; | |
e1802b06 AB |
95 | #if defined(CONFIG_FB_VGA16_MODULE) |
96 | EXPORT_SYMBOL(screen_info); | |
97 | #endif | |
03501dab | 98 | |
540c6c39 MW |
99 | /* Variables required to store legacy IO irq routing */ |
100 | int of_i8042_kbd_irq; | |
ee110066 | 101 | EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); |
540c6c39 | 102 | int of_i8042_aux_irq; |
ee110066 | 103 | EXPORT_SYMBOL_GPL(of_i8042_aux_irq); |
540c6c39 | 104 | |
03501dab PM |
105 | #ifdef __DO_IRQ_CANON |
106 | /* XXX should go elsewhere eventually */ | |
107 | int ppc_do_canonicalize_irqs; | |
108 | EXPORT_SYMBOL(ppc_do_canonicalize_irqs); | |
109 | #endif | |
110 | ||
111 | /* also used by kexec */ | |
112 | void machine_shutdown(void) | |
113 | { | |
67b43b9d MS |
114 | #ifdef CONFIG_FA_DUMP |
115 | /* | |
116 | * if fadump is active, cleanup the fadump registration before we | |
117 | * shutdown. | |
118 | */ | |
119 | fadump_cleanup(); | |
120 | #endif | |
121 | ||
3d1229d6 ME |
122 | if (ppc_md.machine_shutdown) |
123 | ppc_md.machine_shutdown(); | |
03501dab PM |
124 | } |
125 | ||
126 | void machine_restart(char *cmd) | |
127 | { | |
128 | machine_shutdown(); | |
b8e383d5 KG |
129 | if (ppc_md.restart) |
130 | ppc_md.restart(cmd); | |
03501dab | 131 | smp_send_stop(); |
03501dab PM |
132 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); |
133 | local_irq_disable(); | |
134 | while (1) ; | |
135 | } | |
136 | ||
137 | void machine_power_off(void) | |
138 | { | |
139 | machine_shutdown(); | |
9178ba29 AG |
140 | if (pm_power_off) |
141 | pm_power_off(); | |
03501dab | 142 | smp_send_stop(); |
03501dab PM |
143 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); |
144 | local_irq_disable(); | |
145 | while (1) ; | |
146 | } | |
147 | /* Used by the G5 thermal driver */ | |
148 | EXPORT_SYMBOL_GPL(machine_power_off); | |
149 | ||
9178ba29 | 150 | void (*pm_power_off)(void); |
03501dab PM |
151 | EXPORT_SYMBOL_GPL(pm_power_off); |
152 | ||
153 | void machine_halt(void) | |
154 | { | |
155 | machine_shutdown(); | |
b8e383d5 KG |
156 | if (ppc_md.halt) |
157 | ppc_md.halt(); | |
03501dab | 158 | smp_send_stop(); |
03501dab PM |
159 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); |
160 | local_irq_disable(); | |
161 | while (1) ; | |
162 | } | |
163 | ||
164 | ||
165 | #ifdef CONFIG_TAU | |
166 | extern u32 cpu_temp(unsigned long cpu); | |
167 | extern u32 cpu_temp_both(unsigned long cpu); | |
168 | #endif /* CONFIG_TAU */ | |
169 | ||
170 | #ifdef CONFIG_SMP | |
6b7487fc | 171 | DEFINE_PER_CPU(unsigned int, cpu_pvr); |
03501dab PM |
172 | #endif |
173 | ||
2c2df038 AB |
174 | static void show_cpuinfo_summary(struct seq_file *m) |
175 | { | |
176 | struct device_node *root; | |
177 | const char *model = NULL; | |
178 | #if defined(CONFIG_SMP) && defined(CONFIG_PPC32) | |
179 | unsigned long bogosum = 0; | |
180 | int i; | |
181 | for_each_online_cpu(i) | |
182 | bogosum += loops_per_jiffy; | |
183 | seq_printf(m, "total bogomips\t: %lu.%02lu\n", | |
184 | bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); | |
185 | #endif /* CONFIG_SMP && CONFIG_PPC32 */ | |
186 | seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); | |
187 | if (ppc_md.name) | |
188 | seq_printf(m, "platform\t: %s\n", ppc_md.name); | |
189 | root = of_find_node_by_path("/"); | |
190 | if (root) | |
191 | model = of_get_property(root, "model", NULL); | |
192 | if (model) | |
193 | seq_printf(m, "model\t\t: %s\n", model); | |
194 | of_node_put(root); | |
195 | ||
196 | if (ppc_md.show_cpuinfo != NULL) | |
197 | ppc_md.show_cpuinfo(m); | |
198 | ||
199 | #ifdef CONFIG_PPC32 | |
200 | /* Display the amount of memory */ | |
201 | seq_printf(m, "Memory\t\t: %d MB\n", | |
202 | (unsigned int)(total_memory / (1024 * 1024))); | |
203 | #endif | |
204 | } | |
205 | ||
03501dab PM |
206 | static int show_cpuinfo(struct seq_file *m, void *v) |
207 | { | |
208 | unsigned long cpu_id = (unsigned long)v - 1; | |
209 | unsigned int pvr; | |
2299d03a | 210 | unsigned long proc_freq; |
03501dab PM |
211 | unsigned short maj; |
212 | unsigned short min; | |
213 | ||
03501dab PM |
214 | /* We only show online cpus: disable preempt (overzealous, I |
215 | * knew) to prevent cpu going down. */ | |
216 | preempt_disable(); | |
217 | if (!cpu_online(cpu_id)) { | |
218 | preempt_enable(); | |
219 | return 0; | |
220 | } | |
221 | ||
222 | #ifdef CONFIG_SMP | |
6b7487fc | 223 | pvr = per_cpu(cpu_pvr, cpu_id); |
03501dab PM |
224 | #else |
225 | pvr = mfspr(SPRN_PVR); | |
226 | #endif | |
227 | maj = (pvr >> 8) & 0xFF; | |
228 | min = pvr & 0xFF; | |
229 | ||
230 | seq_printf(m, "processor\t: %lu\n", cpu_id); | |
231 | seq_printf(m, "cpu\t\t: "); | |
232 | ||
233 | if (cur_cpu_spec->pvr_mask) | |
234 | seq_printf(m, "%s", cur_cpu_spec->cpu_name); | |
235 | else | |
236 | seq_printf(m, "unknown (%08x)", pvr); | |
237 | ||
238 | #ifdef CONFIG_ALTIVEC | |
239 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
240 | seq_printf(m, ", altivec supported"); | |
241 | #endif /* CONFIG_ALTIVEC */ | |
242 | ||
243 | seq_printf(m, "\n"); | |
244 | ||
245 | #ifdef CONFIG_TAU | |
246 | if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { | |
247 | #ifdef CONFIG_TAU_AVERAGE | |
248 | /* more straightforward, but potentially misleading */ | |
249 | seq_printf(m, "temperature \t: %u C (uncalibrated)\n", | |
bccfd588 | 250 | cpu_temp(cpu_id)); |
03501dab PM |
251 | #else |
252 | /* show the actual temp sensor range */ | |
253 | u32 temp; | |
bccfd588 | 254 | temp = cpu_temp_both(cpu_id); |
03501dab PM |
255 | seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", |
256 | temp & 0xff, temp >> 16); | |
257 | #endif | |
258 | } | |
259 | #endif /* CONFIG_TAU */ | |
260 | ||
261 | /* | |
2299d03a GS |
262 | * Platforms that have variable clock rates, should implement |
263 | * the method ppc_md.get_proc_freq() that reports the clock | |
264 | * rate of a given cpu. The rest can use ppc_proc_freq to | |
265 | * report the clock rate that is same across all cpus. | |
03501dab | 266 | */ |
2299d03a GS |
267 | if (ppc_md.get_proc_freq) |
268 | proc_freq = ppc_md.get_proc_freq(cpu_id); | |
269 | else | |
270 | proc_freq = ppc_proc_freq; | |
271 | ||
272 | if (proc_freq) | |
03501dab | 273 | seq_printf(m, "clock\t\t: %lu.%06luMHz\n", |
2299d03a | 274 | proc_freq / 1000000, proc_freq % 1000000); |
03501dab PM |
275 | |
276 | if (ppc_md.show_percpuinfo != NULL) | |
277 | ppc_md.show_percpuinfo(m, cpu_id); | |
278 | ||
279 | /* If we are a Freescale core do a simple check so | |
280 | * we dont have to keep adding cases in the future */ | |
281 | if (PVR_VER(pvr) & 0x8000) { | |
a501d8f3 ML |
282 | switch (PVR_VER(pvr)) { |
283 | case 0x8000: /* 7441/7450/7451, Voyager */ | |
284 | case 0x8001: /* 7445/7455, Apollo 6 */ | |
285 | case 0x8002: /* 7447/7457, Apollo 7 */ | |
286 | case 0x8003: /* 7447A, Apollo 7 PM */ | |
287 | case 0x8004: /* 7448, Apollo 8 */ | |
288 | case 0x800c: /* 7410, Nitro */ | |
289 | maj = ((pvr >> 8) & 0xF); | |
290 | min = PVR_MIN(pvr); | |
291 | break; | |
292 | default: /* e500/book-e */ | |
293 | maj = PVR_MAJ(pvr); | |
294 | min = PVR_MIN(pvr); | |
295 | break; | |
296 | } | |
03501dab PM |
297 | } else { |
298 | switch (PVR_VER(pvr)) { | |
299 | case 0x0020: /* 403 family */ | |
300 | maj = PVR_MAJ(pvr) + 1; | |
301 | min = PVR_MIN(pvr); | |
302 | break; | |
303 | case 0x1008: /* 740P/750P ?? */ | |
304 | maj = ((pvr >> 8) & 0xFF) - 1; | |
305 | min = pvr & 0xFF; | |
306 | break; | |
307 | default: | |
308 | maj = (pvr >> 8) & 0xFF; | |
309 | min = pvr & 0xFF; | |
310 | break; | |
311 | } | |
312 | } | |
313 | ||
314 | seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", | |
315 | maj, min, PVR_VER(pvr), PVR_REV(pvr)); | |
316 | ||
317 | #ifdef CONFIG_PPC32 | |
318 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
319 | loops_per_jiffy / (500000/HZ), | |
320 | (loops_per_jiffy / (5000/HZ)) % 100); | |
321 | #endif | |
322 | ||
323 | #ifdef CONFIG_SMP | |
324 | seq_printf(m, "\n"); | |
325 | #endif | |
326 | ||
327 | preempt_enable(); | |
e6532c63 AB |
328 | |
329 | /* If this is the last cpu, print the summary */ | |
330 | if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) | |
331 | show_cpuinfo_summary(m); | |
332 | ||
03501dab PM |
333 | return 0; |
334 | } | |
335 | ||
336 | static void *c_start(struct seq_file *m, loff_t *pos) | |
337 | { | |
e6532c63 AB |
338 | if (*pos == 0) /* just in case, cpu 0 is not the first */ |
339 | *pos = cpumask_first(cpu_online_mask); | |
340 | else | |
341 | *pos = cpumask_next(*pos - 1, cpu_online_mask); | |
342 | if ((*pos) < nr_cpu_ids) | |
343 | return (void *)(unsigned long)(*pos + 1); | |
344 | return NULL; | |
03501dab PM |
345 | } |
346 | ||
347 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
348 | { | |
e6532c63 | 349 | (*pos)++; |
03501dab PM |
350 | return c_start(m, pos); |
351 | } | |
352 | ||
353 | static void c_stop(struct seq_file *m, void *v) | |
354 | { | |
355 | } | |
356 | ||
88e9d34c | 357 | const struct seq_operations cpuinfo_op = { |
03501dab PM |
358 | .start =c_start, |
359 | .next = c_next, | |
360 | .stop = c_stop, | |
361 | .show = show_cpuinfo, | |
362 | }; | |
363 | ||
a82765b6 DW |
364 | void __init check_for_initrd(void) |
365 | { | |
366 | #ifdef CONFIG_BLK_DEV_INITRD | |
30437b3e DG |
367 | DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", |
368 | initrd_start, initrd_end); | |
a82765b6 DW |
369 | |
370 | /* If we were passed an initrd, set the ROOT_DEV properly if the values | |
371 | * look sensible. If not, clear initrd reference. | |
372 | */ | |
51fae6de | 373 | if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && |
a82765b6 DW |
374 | initrd_end > initrd_start) |
375 | ROOT_DEV = Root_RAM0; | |
6761c4a0 | 376 | else |
a82765b6 | 377 | initrd_start = initrd_end = 0; |
a82765b6 DW |
378 | |
379 | if (initrd_start) | |
a7696b36 | 380 | pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); |
a82765b6 DW |
381 | |
382 | DBG(" <- check_for_initrd()\n"); | |
383 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
384 | } | |
385 | ||
5ad57078 PM |
386 | #ifdef CONFIG_SMP |
387 | ||
5853aef1 | 388 | int threads_per_core, threads_per_subcore, threads_shift; |
8d089085 | 389 | cpumask_t threads_core_mask; |
de56a948 | 390 | EXPORT_SYMBOL_GPL(threads_per_core); |
5853aef1 | 391 | EXPORT_SYMBOL_GPL(threads_per_subcore); |
de56a948 PM |
392 | EXPORT_SYMBOL_GPL(threads_shift); |
393 | EXPORT_SYMBOL_GPL(threads_core_mask); | |
8d089085 BH |
394 | |
395 | static void __init cpu_init_thread_core_maps(int tpc) | |
396 | { | |
397 | int i; | |
398 | ||
399 | threads_per_core = tpc; | |
5853aef1 | 400 | threads_per_subcore = tpc; |
104699c0 | 401 | cpumask_clear(&threads_core_mask); |
8d089085 BH |
402 | |
403 | /* This implementation only supports power of 2 number of threads | |
404 | * for simplicity and performance | |
405 | */ | |
406 | threads_shift = ilog2(tpc); | |
407 | BUG_ON(tpc != (1 << threads_shift)); | |
408 | ||
409 | for (i = 0; i < tpc; i++) | |
104699c0 | 410 | cpumask_set_cpu(i, &threads_core_mask); |
8d089085 BH |
411 | |
412 | printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", | |
413 | tpc, tpc > 1 ? "s" : ""); | |
414 | printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); | |
415 | } | |
416 | ||
417 | ||
5ad57078 PM |
418 | /** |
419 | * setup_cpu_maps - initialize the following cpu maps: | |
828a6986 AB |
420 | * cpu_possible_mask |
421 | * cpu_present_mask | |
5ad57078 PM |
422 | * |
423 | * Having the possible map set up early allows us to restrict allocations | |
8657ae28 | 424 | * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. |
5ad57078 PM |
425 | * |
426 | * We do not initialize the online map here; cpus set their own bits in | |
828a6986 | 427 | * cpu_online_mask as they come up. |
5ad57078 PM |
428 | * |
429 | * This function is valid only for Open Firmware systems. finish_device_tree | |
430 | * must be called before using this. | |
431 | * | |
432 | * While we're here, we may as well set the "physical" cpu ids in the paca. | |
4df20460 AB |
433 | * |
434 | * NOTE: This must match the parsing done in early_init_dt_scan_cpus. | |
5ad57078 PM |
435 | */ |
436 | void __init smp_setup_cpu_maps(void) | |
437 | { | |
438 | struct device_node *dn = NULL; | |
439 | int cpu = 0; | |
8d089085 BH |
440 | int nthreads = 1; |
441 | ||
442 | DBG("smp_setup_cpu_maps()\n"); | |
5ad57078 | 443 | |
8657ae28 | 444 | while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) { |
ac13282d | 445 | const __be32 *intserv; |
43f88120 | 446 | __be32 cpu_be; |
8d089085 BH |
447 | int j, len; |
448 | ||
449 | DBG(" * %s...\n", dn->full_name); | |
5ad57078 | 450 | |
e2eb6392 SR |
451 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", |
452 | &len); | |
8d089085 | 453 | if (intserv) { |
8d089085 BH |
454 | DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", |
455 | nthreads); | |
456 | } else { | |
457 | DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); | |
e16c8765 | 458 | intserv = of_get_property(dn, "reg", &len); |
43f88120 AP |
459 | if (!intserv) { |
460 | cpu_be = cpu_to_be32(cpu); | |
461 | intserv = &cpu_be; /* assume logical == phys */ | |
e16c8765 | 462 | len = 4; |
43f88120 | 463 | } |
5ad57078 PM |
464 | } |
465 | ||
e16c8765 AF |
466 | nthreads = len / sizeof(int); |
467 | ||
8657ae28 | 468 | for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { |
6663a4fa SW |
469 | bool avail; |
470 | ||
8d089085 | 471 | DBG(" thread %d -> cpu %d (hard id %d)\n", |
ac13282d | 472 | j, cpu, be32_to_cpu(intserv[j])); |
6663a4fa SW |
473 | |
474 | avail = of_device_is_available(dn); | |
475 | if (!avail) | |
476 | avail = !of_property_match_string(dn, | |
477 | "enable-method", "spin-table"); | |
478 | ||
479 | set_cpu_present(cpu, avail); | |
ac13282d | 480 | set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j])); |
ea0f1cab | 481 | set_cpu_possible(cpu, true); |
5ad57078 PM |
482 | cpu++; |
483 | } | |
484 | } | |
485 | ||
8d089085 BH |
486 | /* If no SMT supported, nthreads is forced to 1 */ |
487 | if (!cpu_has_feature(CPU_FTR_SMT)) { | |
488 | DBG(" SMT disabled ! nthreads forced to 1\n"); | |
489 | nthreads = 1; | |
490 | } | |
491 | ||
5ad57078 PM |
492 | #ifdef CONFIG_PPC64 |
493 | /* | |
494 | * On pSeries LPAR, we need to know how many cpus | |
495 | * could possibly be added to this partition. | |
496 | */ | |
e8222502 | 497 | if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) && |
799d6046 | 498 | (dn = of_find_node_by_path("/rtas"))) { |
5ad57078 | 499 | int num_addr_cell, num_size_cell, maxcpus; |
01666c8e | 500 | const __be32 *ireg; |
5ad57078 | 501 | |
a8bda5dd | 502 | num_addr_cell = of_n_addr_cells(dn); |
9213feea | 503 | num_size_cell = of_n_size_cells(dn); |
5ad57078 | 504 | |
e2eb6392 | 505 | ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); |
5ad57078 PM |
506 | |
507 | if (!ireg) | |
508 | goto out; | |
509 | ||
01666c8e | 510 | maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); |
5ad57078 PM |
511 | |
512 | /* Double maxcpus for processors which have SMT capability */ | |
513 | if (cpu_has_feature(CPU_FTR_SMT)) | |
8d089085 | 514 | maxcpus *= nthreads; |
5ad57078 | 515 | |
8657ae28 | 516 | if (maxcpus > nr_cpu_ids) { |
5ad57078 PM |
517 | printk(KERN_WARNING |
518 | "Partition configured for %d cpus, " | |
519 | "operating system maximum is %d.\n", | |
8657ae28 MM |
520 | maxcpus, nr_cpu_ids); |
521 | maxcpus = nr_cpu_ids; | |
5ad57078 PM |
522 | } else |
523 | printk(KERN_INFO "Partition configured for %d cpus.\n", | |
524 | maxcpus); | |
525 | ||
526 | for (cpu = 0; cpu < maxcpus; cpu++) | |
ea0f1cab | 527 | set_cpu_possible(cpu, true); |
5ad57078 PM |
528 | out: |
529 | of_node_put(dn); | |
530 | } | |
d5a7430d MT |
531 | vdso_data->processorCount = num_present_cpus(); |
532 | #endif /* CONFIG_PPC64 */ | |
8d089085 BH |
533 | |
534 | /* Initialize CPU <=> thread mapping/ | |
535 | * | |
536 | * WARNING: We assume that the number of threads is the same for | |
537 | * every CPU in the system. If that is not the case, then some code | |
538 | * here will have to be reworked | |
539 | */ | |
540 | cpu_init_thread_core_maps(nthreads); | |
1426d5a3 | 541 | |
c1854e00 | 542 | /* Now that possible cpus are set, set nr_cpu_ids for later use */ |
aa79bc21 | 543 | setup_nr_cpu_ids(); |
c1854e00 | 544 | |
1426d5a3 | 545 | free_unused_pacas(); |
d5a7430d | 546 | } |
5ad57078 | 547 | #endif /* CONFIG_SMP */ |
fca5dcd4 | 548 | |
d33b78df | 549 | #ifdef CONFIG_PCSPKR_PLATFORM |
e5c6c8e4 MN |
550 | static __init int add_pcspkr(void) |
551 | { | |
552 | struct device_node *np; | |
553 | struct platform_device *pd; | |
554 | int ret; | |
555 | ||
556 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); | |
557 | of_node_put(np); | |
558 | if (!np) | |
559 | return -ENODEV; | |
560 | ||
561 | pd = platform_device_alloc("pcspkr", -1); | |
562 | if (!pd) | |
563 | return -ENOMEM; | |
564 | ||
565 | ret = platform_device_add(pd); | |
566 | if (ret) | |
567 | platform_device_put(pd); | |
568 | ||
569 | return ret; | |
570 | } | |
571 | device_initcall(add_pcspkr); | |
d33b78df | 572 | #endif /* CONFIG_PCSPKR_PLATFORM */ |
95d465fd | 573 | |
e8222502 BH |
574 | void probe_machine(void) |
575 | { | |
576 | extern struct machdep_calls __machine_desc_start; | |
577 | extern struct machdep_calls __machine_desc_end; | |
578 | ||
579 | /* | |
580 | * Iterate all ppc_md structures until we find the proper | |
581 | * one for the current machine type | |
582 | */ | |
583 | DBG("Probing machine type ...\n"); | |
584 | ||
585 | for (machine_id = &__machine_desc_start; | |
586 | machine_id < &__machine_desc_end; | |
587 | machine_id++) { | |
588 | DBG(" %s ...", machine_id->name); | |
589 | memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); | |
590 | if (ppc_md.probe()) { | |
591 | DBG(" match !\n"); | |
592 | break; | |
593 | } | |
594 | DBG("\n"); | |
595 | } | |
596 | /* What can we do if we didn't find ? */ | |
597 | if (machine_id >= &__machine_desc_end) { | |
598 | DBG("No suitable machine found !\n"); | |
599 | for (;;); | |
600 | } | |
601 | ||
602 | printk(KERN_INFO "Using %s machine description\n", ppc_md.name); | |
603 | } | |
1269277a | 604 | |
8d8a0241 | 605 | /* Match a class of boards, not a specific device configuration. */ |
1269277a DW |
606 | int check_legacy_ioport(unsigned long base_port) |
607 | { | |
8d8a0241 OH |
608 | struct device_node *parent, *np = NULL; |
609 | int ret = -ENODEV; | |
610 | ||
611 | switch(base_port) { | |
612 | case I8042_DATA_REG: | |
db0dbae9 WF |
613 | if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) |
614 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); | |
615 | if (np) { | |
616 | parent = of_get_parent(np); | |
540c6c39 MW |
617 | |
618 | of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); | |
619 | if (!of_i8042_kbd_irq) | |
620 | of_i8042_kbd_irq = 1; | |
621 | ||
622 | of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); | |
623 | if (!of_i8042_aux_irq) | |
624 | of_i8042_aux_irq = 12; | |
625 | ||
db0dbae9 WF |
626 | of_node_put(np); |
627 | np = parent; | |
628 | break; | |
629 | } | |
8d8a0241 | 630 | np = of_find_node_by_type(NULL, "8042"); |
f5d834fc AC |
631 | /* Pegasos has no device_type on its 8042 node, look for the |
632 | * name instead */ | |
633 | if (!np) | |
634 | np = of_find_node_by_name(NULL, "8042"); | |
2c78027a GP |
635 | if (np) { |
636 | of_i8042_kbd_irq = 1; | |
637 | of_i8042_aux_irq = 12; | |
638 | } | |
8d8a0241 OH |
639 | break; |
640 | case FDC_BASE: /* FDC1 */ | |
641 | np = of_find_node_by_type(NULL, "fdc"); | |
642 | break; | |
8d8a0241 OH |
643 | default: |
644 | /* ipmi is supposed to fail here */ | |
645 | break; | |
646 | } | |
647 | if (!np) | |
648 | return ret; | |
649 | parent = of_get_parent(np); | |
650 | if (parent) { | |
651 | if (strcmp(parent->type, "isa") == 0) | |
652 | ret = 0; | |
653 | of_node_put(parent); | |
654 | } | |
655 | of_node_put(np); | |
656 | return ret; | |
1269277a DW |
657 | } |
658 | EXPORT_SYMBOL(check_legacy_ioport); | |
7e990266 KG |
659 | |
660 | static int ppc_panic_event(struct notifier_block *this, | |
661 | unsigned long event, void *ptr) | |
662 | { | |
ebaeb5ae MS |
663 | /* |
664 | * If firmware-assisted dump has been registered then trigger | |
665 | * firmware-assisted dump and let firmware handle everything else. | |
666 | */ | |
667 | crash_fadump(NULL, ptr); | |
7e990266 KG |
668 | ppc_md.panic(ptr); /* May not return */ |
669 | return NOTIFY_DONE; | |
670 | } | |
671 | ||
672 | static struct notifier_block ppc_panic_block = { | |
673 | .notifier_call = ppc_panic_event, | |
674 | .priority = INT_MIN /* may not return; must be done last */ | |
675 | }; | |
676 | ||
677 | void __init setup_panic(void) | |
678 | { | |
679 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); | |
680 | } | |
06cce43c DF |
681 | |
682 | #ifdef CONFIG_CHECK_CACHE_COHERENCY | |
683 | /* | |
684 | * For platforms that have configurable cache-coherency. This function | |
685 | * checks that the cache coherency setting of the kernel matches the setting | |
686 | * left by the firmware, as indicated in the device tree. Since a mismatch | |
687 | * will eventually result in DMA failures, we print * and error and call | |
688 | * BUG() in that case. | |
689 | */ | |
690 | ||
691 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
692 | #define KERNEL_COHERENCY 0 | |
693 | #else | |
694 | #define KERNEL_COHERENCY 1 | |
695 | #endif | |
696 | ||
697 | static int __init check_cache_coherency(void) | |
698 | { | |
699 | struct device_node *np; | |
700 | const void *prop; | |
701 | int devtree_coherency; | |
702 | ||
703 | np = of_find_node_by_path("/"); | |
704 | prop = of_get_property(np, "coherency-off", NULL); | |
705 | of_node_put(np); | |
706 | ||
707 | devtree_coherency = prop ? 0 : 1; | |
708 | ||
709 | if (devtree_coherency != KERNEL_COHERENCY) { | |
710 | printk(KERN_ERR | |
711 | "kernel coherency:%s != device tree_coherency:%s\n", | |
712 | KERNEL_COHERENCY ? "on" : "off", | |
713 | devtree_coherency ? "on" : "off"); | |
714 | BUG(); | |
715 | } | |
716 | ||
717 | return 0; | |
718 | } | |
719 | ||
720 | late_initcall(check_cache_coherency); | |
721 | #endif /* CONFIG_CHECK_CACHE_COHERENCY */ | |
94a3807c ME |
722 | |
723 | #ifdef CONFIG_DEBUG_FS | |
724 | struct dentry *powerpc_debugfs_root; | |
907b1f45 | 725 | EXPORT_SYMBOL(powerpc_debugfs_root); |
94a3807c ME |
726 | |
727 | static int powerpc_debugfs_init(void) | |
728 | { | |
729 | powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); | |
730 | ||
731 | return powerpc_debugfs_root == NULL; | |
732 | } | |
733 | arch_initcall(powerpc_debugfs_init); | |
734 | #endif | |
d746286c | 735 | |
a9c0f41b | 736 | void ppc_printk_progress(char *s, unsigned short hex) |
d746286c | 737 | { |
a9c0f41b | 738 | pr_info("%s\n", s); |
d746286c KG |
739 | } |
740 | ||
314b02f5 | 741 | void arch_setup_pdev_archdata(struct platform_device *pdev) |
d746286c | 742 | { |
314b02f5 KG |
743 | pdev->archdata.dma_mask = DMA_BIT_MASK(32); |
744 | pdev->dev.dma_mask = &pdev->archdata.dma_mask; | |
745 | set_dma_ops(&pdev->dev, &dma_direct_ops); | |
d746286c | 746 | } |