Commit | Line | Data |
---|---|---|
40ef8cbc PM |
1 | /* |
2 | * | |
3 | * Common boot and setup code. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
40ef8cbc PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
40ef8cbc PM |
23 | #include <linux/seq_file.h> |
24 | #include <linux/ioport.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/utsname.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/root_dev.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
7a0268fa | 34 | #include <linux/bootmem.h> |
12d04eef | 35 | #include <linux/pci.h> |
945feb17 | 36 | #include <linux/lockdep.h> |
d9b2b2a2 | 37 | #include <linux/lmb.h> |
40ef8cbc | 38 | #include <asm/io.h> |
0cc4746c | 39 | #include <asm/kdump.h> |
40ef8cbc PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
42 | #include <asm/pgtable.h> | |
40ef8cbc PM |
43 | #include <asm/smp.h> |
44 | #include <asm/elf.h> | |
45 | #include <asm/machdep.h> | |
46 | #include <asm/paca.h> | |
40ef8cbc PM |
47 | #include <asm/time.h> |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
50 | #include <asm/btext.h> | |
51 | #include <asm/nvram.h> | |
52 | #include <asm/setup.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/rtas.h> | |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
40ef8cbc | 60 | #include <asm/firmware.h> |
f78541dc | 61 | #include <asm/xmon.h> |
dcad47fc | 62 | #include <asm/udbg.h> |
593e537b | 63 | #include <asm/kexec.h> |
40ef8cbc | 64 | |
66ba135c SR |
65 | #include "setup.h" |
66 | ||
40ef8cbc PM |
67 | #ifdef DEBUG |
68 | #define DBG(fmt...) udbg_printf(fmt) | |
69 | #else | |
70 | #define DBG(fmt...) | |
71 | #endif | |
72 | ||
40ef8cbc | 73 | int boot_cpuid = 0; |
40ef8cbc PM |
74 | u64 ppc64_pft_size; |
75 | ||
dabcafd3 OJ |
76 | /* Pick defaults since we might want to patch instructions |
77 | * before we've read this from the device tree. | |
78 | */ | |
79 | struct ppc64_caches ppc64_caches = { | |
5a2fe38d OJ |
80 | .dline_size = 0x40, |
81 | .log_dline_size = 6, | |
82 | .iline_size = 0x40, | |
83 | .log_iline_size = 6 | |
dabcafd3 | 84 | }; |
40ef8cbc PM |
85 | EXPORT_SYMBOL_GPL(ppc64_caches); |
86 | ||
87 | /* | |
88 | * These are used in binfmt_elf.c to put aux entries on the stack | |
89 | * for each elf executable being started. | |
90 | */ | |
91 | int dcache_bsize; | |
92 | int icache_bsize; | |
93 | int ucache_bsize; | |
94 | ||
40ef8cbc PM |
95 | #ifdef CONFIG_SMP |
96 | ||
97 | static int smt_enabled_cmdline; | |
98 | ||
99 | /* Look for ibm,smt-enabled OF option */ | |
100 | static void check_smt_enabled(void) | |
101 | { | |
102 | struct device_node *dn; | |
a7f67bdf | 103 | const char *smt_option; |
40ef8cbc PM |
104 | |
105 | /* Allow the command line to overrule the OF option */ | |
106 | if (smt_enabled_cmdline) | |
107 | return; | |
108 | ||
109 | dn = of_find_node_by_path("/options"); | |
110 | ||
111 | if (dn) { | |
e2eb6392 | 112 | smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); |
40ef8cbc PM |
113 | |
114 | if (smt_option) { | |
115 | if (!strcmp(smt_option, "on")) | |
116 | smt_enabled_at_boot = 1; | |
117 | else if (!strcmp(smt_option, "off")) | |
118 | smt_enabled_at_boot = 0; | |
119 | } | |
120 | } | |
121 | } | |
122 | ||
123 | /* Look for smt-enabled= cmdline option */ | |
124 | static int __init early_smt_enabled(char *p) | |
125 | { | |
126 | smt_enabled_cmdline = 1; | |
127 | ||
128 | if (!p) | |
129 | return 0; | |
130 | ||
131 | if (!strcmp(p, "on") || !strcmp(p, "1")) | |
132 | smt_enabled_at_boot = 1; | |
133 | else if (!strcmp(p, "off") || !strcmp(p, "0")) | |
134 | smt_enabled_at_boot = 0; | |
135 | ||
136 | return 0; | |
137 | } | |
138 | early_param("smt-enabled", early_smt_enabled); | |
139 | ||
5ad57078 PM |
140 | #else |
141 | #define check_smt_enabled() | |
40ef8cbc PM |
142 | #endif /* CONFIG_SMP */ |
143 | ||
4ba99b97 ME |
144 | /* Put the paca pointer into r13 and SPRG3 */ |
145 | void __init setup_paca(int cpu) | |
146 | { | |
147 | local_paca = &paca[cpu]; | |
148 | mtspr(SPRN_SPRG3, local_paca); | |
149 | } | |
150 | ||
40ef8cbc PM |
151 | /* |
152 | * Early initialization entry point. This is called by head.S | |
153 | * with MMU translation disabled. We rely on the "feature" of | |
154 | * the CPU that ignores the top 2 bits of the address in real | |
155 | * mode so we can access kernel globals normally provided we | |
156 | * only toy with things in the RMO region. From here, we do | |
157 | * some early parsing of the device-tree to setup out LMB | |
158 | * data structures, and allocate & initialize the hash table | |
159 | * and segment tables so we can start running with translation | |
160 | * enabled. | |
161 | * | |
162 | * It is this function which will call the probe() callback of | |
163 | * the various platform types and copy the matching one to the | |
164 | * global ppc_md structure. Your platform can eventually do | |
165 | * some very early initializations from the probe() routine, but | |
166 | * this is not recommended, be very careful as, for example, the | |
167 | * device-tree is not accessible via normal means at this point. | |
168 | */ | |
169 | ||
170 | void __init early_setup(unsigned long dt_ptr) | |
171 | { | |
24d96495 BH |
172 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
173 | ||
90035fe3 TB |
174 | /* Fill in any unititialised pacas */ |
175 | initialise_pacas(); | |
176 | ||
42c4aaad | 177 | /* Identify CPU type */ |
974a76f5 | 178 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 179 | |
33dbcf72 ME |
180 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
181 | setup_paca(0); | |
182 | ||
945feb17 BH |
183 | /* Initialize lockdep early or else spinlocks will blow */ |
184 | lockdep_init(); | |
185 | ||
24d96495 BH |
186 | /* -------- printk is now safe to use ------- */ |
187 | ||
f2fd2513 BH |
188 | /* Enable early debugging if any specified (see udbg.h) */ |
189 | udbg_early_init(); | |
190 | ||
e8222502 | 191 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
40ef8cbc | 192 | |
40ef8cbc | 193 | /* |
3c607ce2 LV |
194 | * Do early initialization using the flattened device |
195 | * tree, such as retrieving the physical memory map or | |
196 | * calculating/retrieving the hash table size. | |
40ef8cbc PM |
197 | */ |
198 | early_init_devtree(__va(dt_ptr)); | |
199 | ||
4df20460 | 200 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
4ba99b97 | 201 | setup_paca(boot_cpuid); |
4df20460 AB |
202 | |
203 | /* Fix up paca fields required for the boot cpu */ | |
204 | get_paca()->cpu_start = 1; | |
4df20460 | 205 | |
e8222502 BH |
206 | /* Probe the machine type */ |
207 | probe_machine(); | |
40ef8cbc | 208 | |
47310413 | 209 | setup_kdump_trampoline(); |
0cc4746c | 210 | |
40ef8cbc PM |
211 | DBG("Found, Initializing memory management...\n"); |
212 | ||
757c74d2 BH |
213 | /* Initialize the hash table or TLB handling */ |
214 | early_init_mmu(); | |
40ef8cbc PM |
215 | |
216 | DBG(" <- early_setup()\n"); | |
217 | } | |
218 | ||
799d6046 PM |
219 | #ifdef CONFIG_SMP |
220 | void early_setup_secondary(void) | |
221 | { | |
d04c56f7 | 222 | /* Mark interrupts enabled in PACA */ |
757c74d2 | 223 | get_paca()->soft_enabled = 0; |
799d6046 | 224 | |
757c74d2 BH |
225 | /* Initialize the hash table or TLB handling */ |
226 | early_init_mmu_secondary(); | |
799d6046 PM |
227 | } |
228 | ||
229 | #endif /* CONFIG_SMP */ | |
40ef8cbc | 230 | |
b8f51021 | 231 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
1f6a93e4 PM |
232 | extern unsigned long __secondary_hold_spinloop; |
233 | extern void generic_secondary_smp_init(void); | |
234 | ||
b8f51021 ME |
235 | void smp_release_cpus(void) |
236 | { | |
758438a7 | 237 | unsigned long *ptr; |
b8f51021 ME |
238 | |
239 | DBG(" -> smp_release_cpus()\n"); | |
240 | ||
241 | /* All secondary cpus are spinning on a common spinloop, release them | |
242 | * all now so they can start to spin on their individual paca | |
243 | * spinloops. For non SMP kernels, the secondary cpus never get out | |
244 | * of the common spinloop. | |
1f6a93e4 | 245 | */ |
b8f51021 | 246 | |
758438a7 ME |
247 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
248 | - PHYSICAL_START); | |
1f6a93e4 | 249 | *ptr = __pa(generic_secondary_smp_init); |
b8f51021 ME |
250 | mb(); |
251 | ||
252 | DBG(" <- smp_release_cpus()\n"); | |
253 | } | |
254 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ | |
255 | ||
40ef8cbc | 256 | /* |
799d6046 PM |
257 | * Initialize some remaining members of the ppc64_caches and systemcfg |
258 | * structures | |
40ef8cbc PM |
259 | * (at least until we get rid of them completely). This is mostly some |
260 | * cache informations about the CPU that will be used by cache flush | |
261 | * routines and/or provided to userland | |
262 | */ | |
263 | static void __init initialize_cache_info(void) | |
264 | { | |
265 | struct device_node *np; | |
266 | unsigned long num_cpus = 0; | |
267 | ||
268 | DBG(" -> initialize_cache_info()\n"); | |
269 | ||
270 | for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { | |
271 | num_cpus += 1; | |
272 | ||
273 | /* We're assuming *all* of the CPUs have the same | |
274 | * d-cache and i-cache sizes... -Peter | |
275 | */ | |
276 | ||
277 | if ( num_cpus == 1 ) { | |
a7f67bdf | 278 | const u32 *sizep, *lsizep; |
40ef8cbc | 279 | u32 size, lsize; |
40ef8cbc PM |
280 | |
281 | size = 0; | |
282 | lsize = cur_cpu_spec->dcache_bsize; | |
e2eb6392 | 283 | sizep = of_get_property(np, "d-cache-size", NULL); |
40ef8cbc PM |
284 | if (sizep != NULL) |
285 | size = *sizep; | |
20474abd BH |
286 | lsizep = of_get_property(np, "d-cache-block-size", NULL); |
287 | /* fallback if block size missing */ | |
288 | if (lsizep == NULL) | |
289 | lsizep = of_get_property(np, "d-cache-line-size", NULL); | |
40ef8cbc PM |
290 | if (lsizep != NULL) |
291 | lsize = *lsizep; | |
292 | if (sizep == 0 || lsizep == 0) | |
293 | DBG("Argh, can't find dcache properties ! " | |
294 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
295 | ||
a7f290da BH |
296 | ppc64_caches.dsize = size; |
297 | ppc64_caches.dline_size = lsize; | |
40ef8cbc PM |
298 | ppc64_caches.log_dline_size = __ilog2(lsize); |
299 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; | |
300 | ||
301 | size = 0; | |
302 | lsize = cur_cpu_spec->icache_bsize; | |
e2eb6392 | 303 | sizep = of_get_property(np, "i-cache-size", NULL); |
40ef8cbc PM |
304 | if (sizep != NULL) |
305 | size = *sizep; | |
20474abd BH |
306 | lsizep = of_get_property(np, "i-cache-block-size", NULL); |
307 | if (lsizep == NULL) | |
308 | lsizep = of_get_property(np, "i-cache-line-size", NULL); | |
40ef8cbc PM |
309 | if (lsizep != NULL) |
310 | lsize = *lsizep; | |
311 | if (sizep == 0 || lsizep == 0) | |
312 | DBG("Argh, can't find icache properties ! " | |
313 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
314 | ||
a7f290da BH |
315 | ppc64_caches.isize = size; |
316 | ppc64_caches.iline_size = lsize; | |
40ef8cbc PM |
317 | ppc64_caches.log_iline_size = __ilog2(lsize); |
318 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; | |
319 | } | |
320 | } | |
321 | ||
40ef8cbc PM |
322 | DBG(" <- initialize_cache_info()\n"); |
323 | } | |
324 | ||
40ef8cbc PM |
325 | |
326 | /* | |
327 | * Do some initial setup of the system. The parameters are those which | |
328 | * were passed in from the bootloader. | |
329 | */ | |
330 | void __init setup_system(void) | |
331 | { | |
332 | DBG(" -> setup_system()\n"); | |
333 | ||
826ea8f2 TB |
334 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
335 | * text (nop out sections not relevant to this CPU or this firmware) | |
42c4aaad | 336 | */ |
0909c8c2 | 337 | do_feature_fixups(cur_cpu_spec->cpu_features, |
42c4aaad | 338 | &__start___ftr_fixup, &__stop___ftr_fixup); |
7c03d653 BH |
339 | do_feature_fixups(cur_cpu_spec->mmu_features, |
340 | &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); | |
826ea8f2 TB |
341 | do_feature_fixups(powerpc_firmware_features, |
342 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | |
2d1b2027 KG |
343 | do_lwsync_fixups(cur_cpu_spec->cpu_features, |
344 | &__start___lwsync_fixup, &__stop___lwsync_fixup); | |
42c4aaad | 345 | |
40ef8cbc PM |
346 | /* |
347 | * Unflatten the device-tree passed by prom_init or kexec | |
348 | */ | |
349 | unflatten_device_tree(); | |
350 | ||
351 | /* | |
352 | * Fill the ppc64_caches & systemcfg structures with informations | |
0ebfff14 | 353 | * retrieved from the device-tree. |
40ef8cbc PM |
354 | */ |
355 | initialize_cache_info(); | |
356 | ||
0ebfff14 BH |
357 | /* |
358 | * Initialize irq remapping subsystem | |
359 | */ | |
360 | irq_early_init(); | |
361 | ||
40ef8cbc PM |
362 | #ifdef CONFIG_PPC_RTAS |
363 | /* | |
364 | * Initialize RTAS if available | |
365 | */ | |
366 | rtas_initialize(); | |
367 | #endif /* CONFIG_PPC_RTAS */ | |
40ef8cbc PM |
368 | |
369 | /* | |
370 | * Check if we have an initrd provided via the device-tree | |
371 | */ | |
372 | check_for_initrd(); | |
40ef8cbc PM |
373 | |
374 | /* | |
375 | * Do some platform specific early initializations, that includes | |
376 | * setting up the hash table pointers. It also sets up some interrupt-mapping | |
377 | * related options that will be used by finish_device_tree() | |
378 | */ | |
57744ea9 GL |
379 | if (ppc_md.init_early) |
380 | ppc_md.init_early(); | |
40ef8cbc | 381 | |
463ce0e1 BH |
382 | /* |
383 | * We can discover serial ports now since the above did setup the | |
384 | * hash table management for us, thus ioremap works. We do that early | |
385 | * so that further code can be debugged | |
386 | */ | |
463ce0e1 | 387 | find_legacy_serial_ports(); |
463ce0e1 | 388 | |
40ef8cbc PM |
389 | /* |
390 | * Register early console | |
391 | */ | |
392 | register_early_udbg_console(); | |
40ef8cbc | 393 | |
47679283 ME |
394 | /* |
395 | * Initialize xmon | |
396 | */ | |
397 | xmon_setup(); | |
480f6f35 | 398 | |
5ad57078 PM |
399 | check_smt_enabled(); |
400 | smp_setup_cpu_maps(); | |
40ef8cbc | 401 | |
f018b36f | 402 | #ifdef CONFIG_SMP |
40ef8cbc PM |
403 | /* Release secondary cpus out of their spinloops at 0x60 now that |
404 | * we can map physical -> logical CPU ids | |
405 | */ | |
406 | smp_release_cpus(); | |
f018b36f | 407 | #endif |
40ef8cbc | 408 | |
96b644bd | 409 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
40ef8cbc PM |
410 | |
411 | printk("-----------------------------------------------------\n"); | |
fe333321 IM |
412 | printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
413 | printk("physicalMemorySize = 0x%llx\n", lmb_phys_mem_size()); | |
9697add0 AB |
414 | if (ppc64_caches.dline_size != 0x80) |
415 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | |
416 | ppc64_caches.dline_size); | |
417 | if (ppc64_caches.iline_size != 0x80) | |
418 | printk("ppc64_caches.icache_line_size = 0x%x\n", | |
419 | ppc64_caches.iline_size); | |
420 | if (htab_address) | |
421 | printk("htab_address = 0x%p\n", htab_address); | |
40ef8cbc | 422 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
b160544c MN |
423 | if (PHYSICAL_START > 0) |
424 | printk("physical_start = 0x%lx\n", | |
425 | PHYSICAL_START); | |
40ef8cbc | 426 | printk("-----------------------------------------------------\n"); |
40ef8cbc | 427 | |
40ef8cbc PM |
428 | DBG(" <- setup_system()\n"); |
429 | } | |
430 | ||
40ef8cbc PM |
431 | #ifdef CONFIG_IRQSTACKS |
432 | static void __init irqstack_early_init(void) | |
433 | { | |
434 | unsigned int i; | |
435 | ||
436 | /* | |
437 | * interrupt stacks must be under 256MB, we cannot afford to take | |
438 | * SLB misses on them. | |
439 | */ | |
0e551954 | 440 | for_each_possible_cpu(i) { |
3c726f8d BH |
441 | softirq_ctx[i] = (struct thread_info *) |
442 | __va(lmb_alloc_base(THREAD_SIZE, | |
443 | THREAD_SIZE, 0x10000000)); | |
444 | hardirq_ctx[i] = (struct thread_info *) | |
445 | __va(lmb_alloc_base(THREAD_SIZE, | |
446 | THREAD_SIZE, 0x10000000)); | |
40ef8cbc PM |
447 | } |
448 | } | |
449 | #else | |
450 | #define irqstack_early_init() | |
451 | #endif | |
452 | ||
453 | /* | |
454 | * Stack space used when we detect a bad kernel stack pointer, and | |
455 | * early in SMP boots before relocation is enabled. | |
456 | */ | |
457 | static void __init emergency_stack_init(void) | |
458 | { | |
459 | unsigned long limit; | |
460 | unsigned int i; | |
461 | ||
462 | /* | |
463 | * Emergency stacks must be under 256MB, we cannot afford to take | |
464 | * SLB misses on them. The ABI also requires them to be 128-byte | |
465 | * aligned. | |
466 | * | |
467 | * Since we use these as temporary stacks during secondary CPU | |
468 | * bringup, we need to get at them in real mode. This means they | |
469 | * must also be within the RMO region. | |
470 | */ | |
fe333321 | 471 | limit = min(0x10000000ULL, lmb.rmo_size); |
40ef8cbc | 472 | |
3243d874 ME |
473 | for_each_possible_cpu(i) { |
474 | unsigned long sp; | |
475 | sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); | |
476 | sp += THREAD_SIZE; | |
477 | paca[i].emergency_sp = __va(sp); | |
478 | } | |
40ef8cbc PM |
479 | } |
480 | ||
40ef8cbc PM |
481 | /* |
482 | * Called into from start_kernel, after lock_kernel has been called. | |
483 | * Initializes bootmem, which is unsed to manage page allocation until | |
484 | * mem_init is called. | |
485 | */ | |
486 | void __init setup_arch(char **cmdline_p) | |
487 | { | |
40ef8cbc PM |
488 | ppc64_boot_msg(0x12, "Setup Arch"); |
489 | ||
490 | *cmdline_p = cmd_line; | |
491 | ||
492 | /* | |
493 | * Set cache line size based on type of cpu as a default. | |
494 | * Systems with OF can look in the properties on the cpu node(s) | |
495 | * for a possibly more accurate value. | |
496 | */ | |
497 | dcache_bsize = ppc64_caches.dline_size; | |
498 | icache_bsize = ppc64_caches.iline_size; | |
499 | ||
500 | /* reboot on panic */ | |
501 | panic_timeout = 180; | |
40ef8cbc PM |
502 | |
503 | if (ppc_md.panic) | |
7e990266 | 504 | setup_panic(); |
40ef8cbc | 505 | |
4846c5de | 506 | init_mm.start_code = (unsigned long)_stext; |
40ef8cbc PM |
507 | init_mm.end_code = (unsigned long) _etext; |
508 | init_mm.end_data = (unsigned long) _edata; | |
509 | init_mm.brk = klimit; | |
510 | ||
511 | irqstack_early_init(); | |
512 | emergency_stack_init(); | |
513 | ||
40ef8cbc PM |
514 | stabs_alloc(); |
515 | ||
516 | /* set up the bootmem stuff with available memory */ | |
517 | do_init_bootmem(); | |
518 | sparse_init(); | |
519 | ||
0458060c PM |
520 | #ifdef CONFIG_DUMMY_CONSOLE |
521 | conswitchp = &dummy_con; | |
522 | #endif | |
523 | ||
38db7e74 GL |
524 | if (ppc_md.setup_arch) |
525 | ppc_md.setup_arch(); | |
40ef8cbc | 526 | |
40ef8cbc PM |
527 | paging_init(); |
528 | ppc64_boot_msg(0x15, "Setup Done"); | |
529 | } | |
530 | ||
531 | ||
532 | /* ToDo: do something useful if ppc_md is not yet setup. */ | |
533 | #define PPC64_LINUX_FUNCTION 0x0f000000 | |
534 | #define PPC64_IPL_MESSAGE 0xc0000000 | |
535 | #define PPC64_TERM_MESSAGE 0xb0000000 | |
536 | ||
537 | static void ppc64_do_msg(unsigned int src, const char *msg) | |
538 | { | |
539 | if (ppc_md.progress) { | |
540 | char buf[128]; | |
541 | ||
542 | sprintf(buf, "%08X\n", src); | |
543 | ppc_md.progress(buf, 0); | |
544 | snprintf(buf, 128, "%s", msg); | |
545 | ppc_md.progress(buf, 0); | |
546 | } | |
547 | } | |
548 | ||
549 | /* Print a boot progress message. */ | |
550 | void ppc64_boot_msg(unsigned int src, const char *msg) | |
551 | { | |
552 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); | |
553 | printk("[boot]%04x %s\n", src, msg); | |
554 | } | |
555 | ||
40ef8cbc PM |
556 | void cpu_die(void) |
557 | { | |
558 | if (ppc_md.cpu_die) | |
559 | ppc_md.cpu_die(); | |
560 | } | |
7a0268fa AB |
561 | |
562 | #ifdef CONFIG_SMP | |
563 | void __init setup_per_cpu_areas(void) | |
564 | { | |
565 | int i; | |
566 | unsigned long size; | |
567 | char *ptr; | |
568 | ||
569 | /* Copy section for each CPU (we discard the original) */ | |
b6e3590f | 570 | size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE); |
7a0268fa AB |
571 | #ifdef CONFIG_MODULES |
572 | if (size < PERCPU_ENOUGH_ROOM) | |
573 | size = PERCPU_ENOUGH_ROOM; | |
574 | #endif | |
575 | ||
0e551954 | 576 | for_each_possible_cpu(i) { |
b6e3590f | 577 | ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size); |
7a0268fa AB |
578 | |
579 | paca[i].data_offset = ptr - __per_cpu_start; | |
580 | memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); | |
581 | } | |
582 | } | |
583 | #endif | |
4cb3cee0 BH |
584 | |
585 | ||
586 | #ifdef CONFIG_PPC_INDIRECT_IO | |
587 | struct ppc_pci_io ppc_pci_io; | |
588 | EXPORT_SYMBOL(ppc_pci_io); | |
589 | #endif /* CONFIG_PPC_INDIRECT_IO */ | |
590 |